arm64: dts: ti: k3-am62: Add watchdog nodes

Add nodes for watchdogs :
- 5 in main domain
- 1 in MCU domain
- 1 in wakeup domain

Signed-off-by: Julien Panis <jpanis@baylibre.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20230320165123.80561-3-nm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Julien Panis
2023-03-20 11:51:23 -05:00
committed by Nishanth Menon
parent 0c51ceeebf
commit 4eec5d77d3
3 changed files with 67 additions and 0 deletions

View File

@@ -758,6 +758,51 @@ main_mcan0: can@20701000 {
status = "disabled";
};
main_rti0: watchdog@e000000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e000000 0x00 0x100>;
clocks = <&k3_clks 125 0>;
power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 125 0>;
assigned-clock-parents = <&k3_clks 125 2>;
};
main_rti1: watchdog@e010000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e010000 0x00 0x100>;
clocks = <&k3_clks 126 0>;
power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 126 0>;
assigned-clock-parents = <&k3_clks 126 2>;
};
main_rti2: watchdog@e020000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e020000 0x00 0x100>;
clocks = <&k3_clks 127 0>;
power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 127 0>;
assigned-clock-parents = <&k3_clks 127 2>;
};
main_rti3: watchdog@e030000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e030000 0x00 0x100>;
clocks = <&k3_clks 128 0>;
power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 128 0>;
assigned-clock-parents = <&k3_clks 128 2>;
};
main_rti15: watchdog@e0f0000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e0f0000 0x00 0x100>;
clocks = <&k3_clks 130 0>;
power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 130 0>;
assigned-clock-parents = <&k3_clks 130 2>;
};
epwm0: pwm@23000000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;

View File

@@ -130,4 +130,15 @@ mcu_gpio0: gpio@4201000 {
clocks = <&k3_clks 79 0>;
clock-names = "gpio";
};
mcu_rti0: watchdog@4880000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x04880000 0x00 0x100>;
clocks = <&k3_clks 131 0>;
power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 131 0>;
assigned-clock-parents = <&k3_clks 131 2>;
/* Tightly coupled to M4F */
status = "reserved";
};
};

View File

@@ -50,4 +50,15 @@ wkup_rtc0: rtc@2b1f0000 {
power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
wakeup-source;
};
wkup_rti0: watchdog@2b000000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x2b000000 0x00 0x100>;
clocks = <&k3_clks 132 0>;
power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 132 0>;
assigned-clock-parents = <&k3_clks 132 2>;
/* Used by DM firmware */
status = "reserved";
};
};