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drm/i915: Use cached cdclk_freq for PWM calculations

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No need to read out cdclk from the hardware, we have it already
cached in dev_priv.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1448893432-6978-7-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä
2015-11-30 16:23:47 +02:00
parent fce18c4cf5
commit 4e7f8cfbd2
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/intel_panel.c
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@@ -1345,7 +1345,7 @@ static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
if (IS_PINEVIEW(dev))
clock = MHz(intel_hrawclk(dev));
else
clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
clock = 1000 * dev_priv->cdclk_freq;
return clock / (pwm_freq_hz * 32);
}
@@ -1364,7 +1364,7 @@ static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
if (IS_G4X(dev_priv))
clock = MHz(intel_hrawclk(dev));
else
clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
clock = 1000 * dev_priv->cdclk_freq;
return clock / (pwm_freq_hz * 128);
}