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drm/amdgpu/gfx10: per queue reset only on bare metal
It's not supported under SR-IOV at the moment. Acked-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -9426,6 +9426,9 @@ static int gfx_v10_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)
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u64 addr;
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int r;
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if (amdgpu_sriov_vf(adev))
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return -EINVAL;
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if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
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return -EINVAL;
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@@ -9489,6 +9492,9 @@ static int gfx_v10_0_reset_kcq(struct amdgpu_ring *ring,
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unsigned long flags;
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int i, r;
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if (amdgpu_sriov_vf(adev))
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return -EINVAL;
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if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
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return -EINVAL;
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