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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-13 12:59:33 -04:00
gpio: aspeed: use lock guards
Reduce the code complexity by using automatic lock guards with the raw spinlock. Link: https://lore.kernel.org/r/20250303-gpiochip-set-conversion-v1-12-1d5cceeebf8b@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
@@ -5,6 +5,7 @@
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* Joel Stanley <joel@jms.id.au>
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*/
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#include <linux/cleanup.h>
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#include <linux/clk.h>
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#include <linux/gpio/aspeed.h>
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#include <linux/gpio/driver.h>
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@@ -427,37 +428,33 @@ static void aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset,
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int val)
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{
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struct aspeed_gpio *gpio = gpiochip_get_data(gc);
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unsigned long flags;
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bool copro = false;
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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copro = aspeed_gpio_copro_request(gpio, offset);
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__aspeed_gpio_set(gc, offset, val);
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if (copro)
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aspeed_gpio_copro_release(gpio, offset);
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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}
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static int aspeed_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)
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{
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struct aspeed_gpio *gpio = gpiochip_get_data(gc);
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unsigned long flags;
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bool copro = false;
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if (!have_input(gpio, offset))
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return -ENOTSUPP;
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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copro = aspeed_gpio_copro_request(gpio, offset);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_dir, 0);
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if (copro)
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aspeed_gpio_copro_release(gpio, offset);
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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return 0;
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}
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@@ -465,13 +462,12 @@ static int aspeed_gpio_dir_out(struct gpio_chip *gc,
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unsigned int offset, int val)
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{
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struct aspeed_gpio *gpio = gpiochip_get_data(gc);
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unsigned long flags;
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bool copro = false;
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if (!have_output(gpio, offset))
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return -ENOTSUPP;
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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copro = aspeed_gpio_copro_request(gpio, offset);
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__aspeed_gpio_set(gc, offset, val);
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@@ -479,7 +475,6 @@ static int aspeed_gpio_dir_out(struct gpio_chip *gc,
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if (copro)
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aspeed_gpio_copro_release(gpio, offset);
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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return 0;
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}
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@@ -487,7 +482,6 @@ static int aspeed_gpio_dir_out(struct gpio_chip *gc,
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static int aspeed_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
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{
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struct aspeed_gpio *gpio = gpiochip_get_data(gc);
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unsigned long flags;
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u32 val;
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if (!have_input(gpio, offset))
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@@ -496,12 +490,10 @@ static int aspeed_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
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if (!have_output(gpio, offset))
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return GPIO_LINE_DIRECTION_IN;
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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val = gpio->config->llops->reg_bit_get(gpio, offset, reg_dir);
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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return val ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
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}
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@@ -527,7 +519,6 @@ static inline int irqd_to_aspeed_gpio_data(struct irq_data *d,
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static void aspeed_gpio_irq_ack(struct irq_data *d)
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{
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struct aspeed_gpio *gpio;
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unsigned long flags;
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int rc, offset;
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bool copro = false;
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@@ -535,20 +526,19 @@ static void aspeed_gpio_irq_ack(struct irq_data *d)
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if (rc)
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return;
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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copro = aspeed_gpio_copro_request(gpio, offset);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_status, 1);
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if (copro)
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aspeed_gpio_copro_release(gpio, offset);
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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}
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static void aspeed_gpio_irq_set_mask(struct irq_data *d, bool set)
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{
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struct aspeed_gpio *gpio;
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unsigned long flags;
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int rc, offset;
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bool copro = false;
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@@ -560,14 +550,14 @@ static void aspeed_gpio_irq_set_mask(struct irq_data *d, bool set)
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if (set)
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gpiochip_enable_irq(&gpio->chip, irqd_to_hwirq(d));
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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copro = aspeed_gpio_copro_request(gpio, offset);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_enable, set);
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if (copro)
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aspeed_gpio_copro_release(gpio, offset);
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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/* Masking the IRQ */
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if (!set)
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@@ -591,7 +581,6 @@ static int aspeed_gpio_set_type(struct irq_data *d, unsigned int type)
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u32 type2 = 0;
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irq_flow_handler_t handler;
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struct aspeed_gpio *gpio;
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unsigned long flags;
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int rc, offset;
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bool copro = false;
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@@ -620,16 +609,19 @@ static int aspeed_gpio_set_type(struct irq_data *d, unsigned int type)
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return -EINVAL;
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}
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raw_spin_lock_irqsave(&gpio->lock, flags);
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copro = aspeed_gpio_copro_request(gpio, offset);
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scoped_guard(raw_spinlock_irqsave, &gpio->lock) {
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copro = aspeed_gpio_copro_request(gpio, offset);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type0, type0);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type1, type1);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type2, type2);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type0,
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type0);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type1,
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type1);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type2,
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type2);
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if (copro)
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aspeed_gpio_copro_release(gpio, offset);
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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if (copro)
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aspeed_gpio_copro_release(gpio, offset);
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}
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irq_set_handler_locked(d, handler);
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@@ -686,17 +678,16 @@ static int aspeed_gpio_reset_tolerance(struct gpio_chip *chip,
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unsigned int offset, bool enable)
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{
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struct aspeed_gpio *gpio = gpiochip_get_data(chip);
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unsigned long flags;
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bool copro = false;
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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copro = aspeed_gpio_copro_request(gpio, offset);
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gpio->config->llops->reg_bit_set(gpio, offset, reg_tolerance, enable);
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if (copro)
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aspeed_gpio_copro_release(gpio, offset);
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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return 0;
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}
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@@ -798,7 +789,6 @@ static int enable_debounce(struct gpio_chip *chip, unsigned int offset,
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{
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struct aspeed_gpio *gpio = gpiochip_get_data(chip);
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u32 requested_cycles;
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unsigned long flags;
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int rc;
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int i;
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@@ -812,12 +802,12 @@ static int enable_debounce(struct gpio_chip *chip, unsigned int offset,
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return rc;
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}
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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if (timer_allocation_registered(gpio, offset)) {
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rc = unregister_allocated_timer(gpio, offset);
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if (rc < 0)
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goto out;
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return rc;
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}
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/* Try to find a timer already configured for the debounce period */
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@@ -855,7 +845,7 @@ static int enable_debounce(struct gpio_chip *chip, unsigned int offset,
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* consistency.
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*/
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configure_timer(gpio, offset, 0);
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goto out;
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return rc;
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}
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i = j;
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@@ -863,34 +853,26 @@ static int enable_debounce(struct gpio_chip *chip, unsigned int offset,
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iowrite32(requested_cycles, gpio->base + gpio->config->debounce_timers_array[i]);
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}
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if (WARN(i == 0, "Cannot register index of disabled timer\n")) {
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rc = -EINVAL;
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goto out;
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}
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if (WARN(i == 0, "Cannot register index of disabled timer\n"))
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return -EINVAL;
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register_allocated_timer(gpio, offset, i);
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configure_timer(gpio, offset, i);
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out:
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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return rc;
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}
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static int disable_debounce(struct gpio_chip *chip, unsigned int offset)
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{
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struct aspeed_gpio *gpio = gpiochip_get_data(chip);
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unsigned long flags;
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int rc;
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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rc = unregister_allocated_timer(gpio, offset);
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if (!rc)
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configure_timer(gpio, offset, 0);
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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return rc;
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}
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@@ -961,7 +943,6 @@ int aspeed_gpio_copro_grab_gpio(struct gpio_desc *desc,
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struct aspeed_gpio *gpio = gpiochip_get_data(chip);
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int rc = 0, bindex, offset = gpio_chip_hwgpio(desc);
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const struct aspeed_gpio_bank *bank = to_bank(offset);
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unsigned long flags;
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if (!aspeed_gpio_support_copro(gpio))
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return -EOPNOTSUPP;
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@@ -974,13 +955,12 @@ int aspeed_gpio_copro_grab_gpio(struct gpio_desc *desc,
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return -EINVAL;
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bindex = offset >> 3;
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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/* Sanity check, this shouldn't happen */
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if (gpio->cf_copro_bankmap[bindex] == 0xff) {
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rc = -EIO;
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goto bail;
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}
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if (gpio->cf_copro_bankmap[bindex] == 0xff)
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return -EIO;
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gpio->cf_copro_bankmap[bindex]++;
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/* Switch command source */
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@@ -994,8 +974,6 @@ int aspeed_gpio_copro_grab_gpio(struct gpio_desc *desc,
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*dreg_offset = bank->rdata_reg;
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if (bit)
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*bit = GPIO_OFFSET(offset);
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bail:
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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return rc;
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}
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EXPORT_SYMBOL_GPL(aspeed_gpio_copro_grab_gpio);
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@@ -1009,7 +987,6 @@ int aspeed_gpio_copro_release_gpio(struct gpio_desc *desc)
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struct gpio_chip *chip = gpiod_to_chip(desc);
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struct aspeed_gpio *gpio = gpiochip_get_data(chip);
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int rc = 0, bindex, offset = gpio_chip_hwgpio(desc);
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unsigned long flags;
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if (!aspeed_gpio_support_copro(gpio))
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return -EOPNOTSUPP;
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@@ -1021,21 +998,19 @@ int aspeed_gpio_copro_release_gpio(struct gpio_desc *desc)
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return -EINVAL;
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bindex = offset >> 3;
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raw_spin_lock_irqsave(&gpio->lock, flags);
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guard(raw_spinlock_irqsave)(&gpio->lock);
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/* Sanity check, this shouldn't happen */
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if (gpio->cf_copro_bankmap[bindex] == 0) {
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rc = -EIO;
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goto bail;
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}
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if (gpio->cf_copro_bankmap[bindex] == 0)
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return -EIO;
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gpio->cf_copro_bankmap[bindex]--;
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/* Switch command source */
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if (gpio->cf_copro_bankmap[bindex] == 0)
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aspeed_gpio_change_cmd_source(gpio, offset,
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GPIO_CMDSRC_ARM);
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bail:
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raw_spin_unlock_irqrestore(&gpio->lock, flags);
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return rc;
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}
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EXPORT_SYMBOL_GPL(aspeed_gpio_copro_release_gpio);
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