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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-03-30 01:14:08 -04:00
Merge tag 'i2c-host-fixes-7.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-current
i2c-fixes for v7.0-rc6 designware: fix resume-probe race causing NULL-deref in amdisp imx: fix timeout on repeated reads and extra clock at end
This commit is contained in:
@@ -7,6 +7,7 @@
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include <linux/soc/amd/isp4_misc.h>
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@@ -76,22 +77,20 @@ static int amd_isp_dw_i2c_plat_probe(struct platform_device *pdev)
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device_enable_async_suspend(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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pm_runtime_get_sync(&pdev->dev);
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dev_pm_genpd_resume(&pdev->dev);
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ret = i2c_dw_probe(isp_i2c_dev);
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if (ret) {
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dev_err_probe(&pdev->dev, ret, "i2c_dw_probe failed\n");
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goto error_release_rpm;
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}
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pm_runtime_put_sync(&pdev->dev);
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dev_pm_genpd_suspend(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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return 0;
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error_release_rpm:
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amd_isp_dw_i2c_plat_pm_cleanup(isp_i2c_dev);
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pm_runtime_put_sync(&pdev->dev);
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return ret;
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}
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@@ -1018,8 +1018,9 @@ static inline int i2c_imx_isr_read(struct imx_i2c_struct *i2c_imx)
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return 0;
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}
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static inline void i2c_imx_isr_read_continue(struct imx_i2c_struct *i2c_imx)
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static inline enum imx_i2c_state i2c_imx_isr_read_continue(struct imx_i2c_struct *i2c_imx)
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{
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enum imx_i2c_state next_state = IMX_I2C_STATE_READ_CONTINUE;
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unsigned int temp;
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if ((i2c_imx->msg->len - 1) == i2c_imx->msg_buf_idx) {
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@@ -1033,18 +1034,20 @@ static inline void i2c_imx_isr_read_continue(struct imx_i2c_struct *i2c_imx)
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i2c_imx->stopped = 1;
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temp &= ~(I2CR_MSTA | I2CR_MTX);
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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} else {
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/*
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* For i2c master receiver repeat restart operation like:
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* read -> repeat MSTA -> read/write
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* The controller must set MTX before read the last byte in
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* the first read operation, otherwise the first read cost
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* one extra clock cycle.
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*/
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temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
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temp |= I2CR_MTX;
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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return IMX_I2C_STATE_DONE;
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}
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/*
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* For i2c master receiver repeat restart operation like:
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* read -> repeat MSTA -> read/write
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* The controller must set MTX before read the last byte in
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* the first read operation, otherwise the first read cost
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* one extra clock cycle.
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*/
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temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
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temp |= I2CR_MTX;
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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next_state = IMX_I2C_STATE_DONE;
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} else if (i2c_imx->msg_buf_idx == (i2c_imx->msg->len - 2)) {
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temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
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temp |= I2CR_TXAK;
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@@ -1052,6 +1055,7 @@ static inline void i2c_imx_isr_read_continue(struct imx_i2c_struct *i2c_imx)
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}
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i2c_imx->msg->buf[i2c_imx->msg_buf_idx++] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR);
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return next_state;
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}
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static inline void i2c_imx_isr_read_block_data_len(struct imx_i2c_struct *i2c_imx)
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@@ -1088,11 +1092,9 @@ static irqreturn_t i2c_imx_master_isr(struct imx_i2c_struct *i2c_imx, unsigned i
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break;
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case IMX_I2C_STATE_READ_CONTINUE:
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i2c_imx_isr_read_continue(i2c_imx);
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if (i2c_imx->msg_buf_idx == i2c_imx->msg->len) {
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i2c_imx->state = IMX_I2C_STATE_DONE;
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i2c_imx->state = i2c_imx_isr_read_continue(i2c_imx);
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if (i2c_imx->state == IMX_I2C_STATE_DONE)
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wake_up(&i2c_imx->queue);
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}
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break;
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case IMX_I2C_STATE_READ_BLOCK_DATA:
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@@ -1490,6 +1492,7 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs,
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bool is_lastmsg)
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{
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int block_data = msgs->flags & I2C_M_RECV_LEN;
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int ret = 0;
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dev_dbg(&i2c_imx->adapter.dev,
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"<%s> write slave address: addr=0x%x\n",
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@@ -1522,10 +1525,20 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs,
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dev_err(&i2c_imx->adapter.dev, "<%s> read timedout\n", __func__);
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return -ETIMEDOUT;
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}
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if (!i2c_imx->stopped)
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return i2c_imx_bus_busy(i2c_imx, 0, false);
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if (i2c_imx->is_lastmsg) {
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if (!i2c_imx->stopped)
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ret = i2c_imx_bus_busy(i2c_imx, 0, false);
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/*
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* Only read the last byte of the last message after the bus is
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* not busy. Else the controller generates another clock which
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* might confuse devices.
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*/
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if (!ret)
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i2c_imx->msg->buf[i2c_imx->msg_buf_idx++] = imx_i2c_read_reg(i2c_imx,
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IMX_I2C_I2DR);
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}
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return 0;
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return ret;
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}
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static int i2c_imx_xfer_common(struct i2c_adapter *adapter,
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