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pinctrl: ingenic: jz4730: add pinmux for MII

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The MII interface is used for the Ethernet connection of the Alpha400.

Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Link: https://lore.kernel.org/972b31e1fce03808745e53df17315b29e2bcf696.1740823241.git.hns@goldelico.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
H. Nikolaus Schaller
2025-03-01 11:00:40 +01:00
committed by Linus Walleij
parent 4da56f9c6f
commit 4b490ccbc3
1 changed files with 6 additions and 0 deletions
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6
drivers/pinctrl/pinctrl-ingenic.c
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@@ -210,6 +210,9 @@ static int jz4730_nand_cs5_pins[] = { 0x57, };
static int jz4730_pwm_pwm0_pins[] = { 0x5e, };
static int jz4730_pwm_pwm1_pins[] = { 0x5f, };
static int jz4730_mii_pins[] = { 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76,
0x77, 0x78, 0x19, 0x7a, 0x1b, 0x7c, };
static u8 jz4730_lcd_8bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, };
static const struct group_desc jz4730_groups[] = {
@@ -231,6 +234,7 @@ static const struct group_desc jz4730_groups[] = {
INGENIC_PIN_GROUP("nand-cs5", jz4730_nand_cs5, 1),
INGENIC_PIN_GROUP("pwm0", jz4730_pwm_pwm0, 1),
INGENIC_PIN_GROUP("pwm1", jz4730_pwm_pwm1, 1),
INGENIC_PIN_GROUP("mii", jz4730_mii, 1),
};
static const char *jz4730_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
@@ -246,6 +250,7 @@ static const char *jz4730_nand_groups[] = {
};
static const char *jz4730_pwm0_groups[] = { "pwm0", };
static const char *jz4730_pwm1_groups[] = { "pwm1", };
static const char *jz4730_mii_groups[] = { "mii", };
static const struct function_desc jz4730_functions[] = {
INGENIC_PIN_FUNCTION("mmc", jz4730_mmc),
@@ -257,6 +262,7 @@ static const struct function_desc jz4730_functions[] = {
INGENIC_PIN_FUNCTION("nand", jz4730_nand),
INGENIC_PIN_FUNCTION("pwm0", jz4730_pwm0),
INGENIC_PIN_FUNCTION("pwm1", jz4730_pwm1),
INGENIC_PIN_FUNCTION("mii", jz4730_mii),
};
static const struct ingenic_chip_info jz4730_chip_info = {