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Merge tag 'mvebu-dt-4.1-3' of git://git.infradead.org/linux-mvebu into next/dt
Merge "ARM: mvebu: dt changes for v4.1 (round 3)" from Gregory Clement: mvebu dt changes for v4.1 (part #3) These changes have no influence on the kernel behavior (except removing a warning message), but they allow to have a better representation of the hardware. - conform L2CC node with ePAPR specification by adding cache-level - remove cpuclk resources overlapping coredivclk registers on Armada XP * tag 'mvebu-dt-4.1-3' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Conform L2CC node with ePAPR specification by adding cache-level ARM: mvebu: clk: remove cpuclk resources overlapping coredivclk registers on Armada XP Signed-off-by: Olof Johansson <olof@lixom.net>
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@@ -129,6 +129,7 @@ L2: l2-cache {
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compatible = "marvell,aurora-outer-cache";
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reg = <0x08000 0x1000>;
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cache-id-part = <0x100>;
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cache-level = <2>;
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cache-unified;
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wt-override;
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};
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@@ -79,6 +79,7 @@ L2: l2-cache {
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compatible = "marvell,aurora-system-cache";
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reg = <0x08000 0x1000>;
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cache-id-part = <0x100>;
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cache-level = <2>;
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cache-unified;
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wt-override;
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};
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@@ -150,7 +151,7 @@ thermal@182b0 {
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cpuclk: clock-complex@18700 {
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#clock-cells = <1>;
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compatible = "marvell,armada-xp-cpu-clock";
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reg = <0x18700 0xA0>, <0x1c054 0x10>;
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reg = <0x18700 0x24>, <0x1c054 0x10>;
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clocks = <&coreclk 1>;
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};
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