drm/amd/display: Add gpuvm and hvm params to dml21

[Why & How]
Add missing params to display configuration for dml21

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin
2026-01-23 09:52:40 -05:00
committed by Alex Deucher
parent f373ef3622
commit 49bf43ac98
3 changed files with 9 additions and 2 deletions

View File

@@ -734,8 +734,12 @@ bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_s
memset(&dml_ctx->v21.dml_to_dc_pipe_mapping, 0, sizeof(struct dml2_dml_to_dc_pipe_mapping));
dml_dispcfg->gpuvm_enable = dml_ctx->config.gpuvm_enable;
dml_dispcfg->gpuvm_max_page_table_levels = 4;
dml_dispcfg->hostvm_enable = false;
if (dml_ctx->v21.dml_init.soc_bb.gpuvm_max_page_table_levels)
dml_dispcfg->gpuvm_max_page_table_levels = dml_ctx->v21.dml_init.soc_bb.gpuvm_max_page_table_levels;
else
dml_dispcfg->gpuvm_max_page_table_levels = 4;
dml_dispcfg->hostvm_enable = dml_ctx->config.hostvm_enable;
dml_dispcfg->hostvm_max_non_cached_page_table_levels = dml_ctx->v21.dml_init.soc_bb.hostvm_max_non_cached_page_table_levels;
dml_dispcfg->minimize_det_reallocation = true;
dml_dispcfg->overrides.enable_subvp_implicit_pmo = true;

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@@ -160,6 +160,8 @@ struct dml2_soc_bb {
unsigned long return_bus_width_bytes;
unsigned long hostvm_min_page_size_kbytes;
unsigned long gpuvm_min_page_size_kbytes;
unsigned int hostvm_max_non_cached_page_table_levels;
unsigned int gpuvm_max_page_table_levels;
double phy_downspread_percent;
double dcn_downspread_percent;
double dispclk_dppclk_vco_speed_mhz;

View File

@@ -239,6 +239,7 @@ struct dml2_configuration_options {
bool use_clock_dc_limits;
bool gpuvm_enable;
bool hostvm_enable;
bool force_tdlut_enable;
void *bb_from_dmub;
};