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ARM: dts: qcom: msm8974: sort nodes by reg

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Some nodes weren't sorted by reg, so fix that now. Now all nodes inside
/soc should be sorted correctly.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230627-msm8974-sort-v1-2-75c5800a2e09@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Luca Weiss
2023-06-27 21:45:14 +02:00
committed by Bjorn Andersson
parent 207f4ce365
commit 4960e06d38
1 changed files with 35 additions and 35 deletions
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70
arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
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@@ -346,6 +346,12 @@ apcs: syscon@f9011000 {
reg = <0xf9011000 0x1000>;
};
saw_l2: power-controller@f9012000 {
compatible = "qcom,saw2";
reg = <0xf9012000 0x1000>;
regulator;
};
timer@f9020000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -405,52 +411,46 @@ frame@f9028000 {
};
};
saw0: power-controller@f9089000 {
compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
};
saw1: power-controller@f9099000 {
compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
};
saw2: power-controller@f90a9000 {
compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
};
saw3: power-controller@f90b9000 {
compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
};
saw_l2: power-controller@f9012000 {
compatible = "qcom,saw2";
reg = <0xf9012000 0x1000>;
regulator;
};
acc0: power-manager@f9088000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
};
saw0: power-controller@f9089000 {
compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
};
acc1: power-manager@f9098000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
};
saw1: power-controller@f9099000 {
compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
};
acc2: power-manager@f90a8000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
};
saw2: power-controller@f90a9000 {
compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
};
acc3: power-manager@f90b8000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
};
saw3: power-controller@f90b9000 {
compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
};
sdhc_1: mmc@f9824900 {
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
@@ -1063,6 +1063,15 @@ kpss_out: endpoint {
};
};
bimc: interconnect@fc380000 {
reg = <0xfc380000 0x6a000>;
compatible = "qcom,msm8974-bimc";
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
<&rpmcc RPM_SMD_BIMC_A_CLK>;
};
gcc: clock-controller@fc400000 {
compatible = "qcom,gcc-msm8974";
#clock-cells = <1>;
@@ -1101,15 +1110,6 @@ pronto_master_stats: sram@1f50 {
};
};
bimc: interconnect@fc380000 {
reg = <0xfc380000 0x6a000>;
compatible = "qcom,msm8974-bimc";
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
<&rpmcc RPM_SMD_BIMC_A_CLK>;
};
snoc: interconnect@fc460000 {
reg = <0xfc460000 0x4000>;
compatible = "qcom,msm8974-snoc";