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net: phy: dp83tg720: remove redundant 600ms post-reset delay

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Now that dp83tg720_soft_reset() introduces role-specific delays to avoid
reset synchronization deadlocks, the fixed 600ms post-reset delay in
dp83tg720_read_status() is no longer needed.

The new logic provides both the required MDC timing and link stabilization,
making the old empirical delay redundant and unnecessarily long.

Co-developed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250612104157.2262058-3-o.rempel@pengutronix.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
David Jander
2025-06-12 12:41:56 +02:00
committed by Jakub Kicinski
parent 5f6ec55777
commit 491e991f78
1 changed files with 0 additions and 10 deletions
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10
drivers/net/phy/dp83tg720.c
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@@ -450,21 +450,11 @@ static int dp83tg720_read_status(struct phy_device *phydev)
/* According to the "DP83TC81x, DP83TG72x Software
* Implementation Guide", the PHY needs to be reset after a
* link loss or if no link is created after at least 100ms.
*
* Currently we are polling with the PHY_STATE_TIME (1000ms)
* interval, which is still enough for not automotive use cases.
*/
ret = phy_init_hw(phydev);
if (ret)
return ret;
/* Sleep 600ms for PHY stabilization post-reset.
* Empirically chosen value (not documented).
* Helps reduce reset bounces with link partners having similar
* issues.
*/
msleep(600);
/* After HW reset we need to restore master/slave configuration.
* genphy_c45_pma_baset1_read_master_slave() call will be done
* by the dp83tg720_config_aneg() function.