drm/i915/display: sagv pre/post plane calls to check pmdemand support

For pmdemand cases, no need to even calculate the masks based
on the qgv points index. Though the current logic avoids setting
the registers based on the pmdemand support, some qgv point masks
are compared in vain and do nothing. So leave early if pmdemand
is supported.

Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260615203355.218578-4-vinod.govindapillai@intel.com
This commit is contained in:
Vinod Govindapillai
2026-06-15 23:33:51 +03:00
parent fb8a24c079
commit 490de57216

View File

@@ -275,6 +275,9 @@ void intel_sagv_pre_plane_update(struct intel_atomic_state *state)
if (!intel_has_sagv(display))
return;
if (HAS_PMDEMAND(display))
return;
if (DISPLAY_VER(display) >= 11)
icl_sagv_pre_plane_update(state);
else
@@ -295,6 +298,9 @@ void intel_sagv_post_plane_update(struct intel_atomic_state *state)
if (!intel_has_sagv(display))
return;
if (HAS_PMDEMAND(display))
return;
if (DISPLAY_VER(display) >= 11)
icl_sagv_post_plane_update(state);
else