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drm/i915/g33: Improve reset reliability

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We improved the reset reliablity on gen4 with
stopping all engines before commencing reset, in
commit 2c80353f3c ("drm/i915/g4x: Improve gpu reset reliability")

Evidence indicates that this same trick works with g33.

v2: proper gen naming, comment readability (Chris)

Testcase: igt/gem_busy/*-hang #blb-e6850
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20170522090244.2557-1-mika.kuoppala@intel.com
This commit is contained in:
Mika Kuoppala
2017-05-22 12:02:44 +03:00
committed by Mika Kuoppala
parent 6bdba81979
commit 48f1fc3a30
1 changed files with 3 additions and 0 deletions
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3
drivers/gpu/drm/i915/intel_uncore.c
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@@ -1488,6 +1488,9 @@ static int g33_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask)
{
struct pci_dev *pdev = dev_priv->drm.pdev;
/* Stop engines before we reset; see g4x_do_reset() below for why. */
gen3_stop_rings(dev_priv);
pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
return wait_for(g4x_reset_complete(pdev), 500);
}