Merge branch 'net-stmmac-thead-clean-up-clock-rate-setting'

Russell King says:

====================
net: stmmac: thead: clean up clock rate setting

This series cleans up the thead clock rate setting to use the
rgmii_clock() helper function added to phylib.

The first patch switches over to using the rgmii_clock() helper,
and the second patch cleans up the verification that the desired
clock rate is achievable, allowing the private clock rate
definitions to be removed.
====================

Tested-by: Drew Fustini <drew@pdp7.com>
Link: https://patch.msgid.link/Z7iKdaCp4hLWWgJ2@shell.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
2025-02-24 14:29:59 -08:00

View File

@@ -45,9 +45,6 @@
#define TXCLK_DIR_OUTPUT FIELD_PREP(TXCLK_DIR_MASK, 0)
#define TXCLK_DIR_INPUT FIELD_PREP(TXCLK_DIR_MASK, 1)
#define GMAC_GMII_RGMII_RATE 125000000
#define GMAC_MII_RATE 25000000
struct thead_dwmac {
struct plat_stmmacenet_data *plat;
void __iomem *apb_base;
@@ -109,6 +106,7 @@ static void thead_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
struct plat_stmmacenet_data *plat;
struct thead_dwmac *dwmac = priv;
unsigned long rate;
long tx_rate;
u32 div, reg;
plat = dwmac->plat;
@@ -123,29 +121,21 @@ static void thead_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
rate = clk_get_rate(plat->stmmac_clk);
if (!rate || rate % GMAC_GMII_RGMII_RATE != 0 ||
rate % GMAC_MII_RATE != 0) {
dev_err(dwmac->dev, "invalid gmac rate %ld\n", rate);
return;
}
writel(0, dwmac->apb_base + GMAC_PLLCLK_DIV);
switch (speed) {
case SPEED_1000:
div = rate / GMAC_GMII_RGMII_RATE;
break;
case SPEED_100:
div = rate / GMAC_MII_RATE;
break;
case SPEED_10:
div = rate * 10 / GMAC_MII_RATE;
break;
default:
tx_rate = rgmii_clock(speed);
if (tx_rate < 0) {
dev_err(dwmac->dev, "invalid speed %d\n", speed);
return;
}
div = rate / tx_rate;
if (rate != tx_rate * div) {
dev_err(dwmac->dev, "invalid gmac rate %lu\n", rate);
return;
}
reg = FIELD_PREP(GMAC_PLLCLK_DIV_EN, 1) |
FIELD_PREP(GMAC_PLLCLK_DIV_NUM, div);
writel(reg, dwmac->apb_base + GMAC_PLLCLK_DIV);