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arm64: dts: renesas: r8a7795: Add dynamic power coefficient

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Describe the dynamic power coefficient of A57 and A53 CPUs.

Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Simon Horman
2019-05-23 16:25:38 +02:00
parent 15d8cd83b7
commit 47e1714ab9
1 changed files with 2 additions and 0 deletions
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arch/arm64/boot/dts/renesas/r8a7795.dtsi
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@@ -155,6 +155,7 @@ a57_0: cpu@0 {
power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
dynamic-power-coefficient = <854>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
capacity-dmips-mhz = <1024>;
@@ -208,6 +209,7 @@ a53_0: cpu@100 {
next-level-cache = <&L2_CA53>;
enable-method = "psci";
#cooling-cells = <2>;
dynamic-power-coefficient = <277>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
capacity-dmips-mhz = <535>;