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Merge tag 'socfpga_updates_for_v4.20_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

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SoCFPGA DTS updates for v4.20, part 2
- Fix I2C bus unit-address warning with new DTC checks
- Add reset properties for timers

* tag 'socfpga_updates_for_v4.20_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: socfpga: add timer resets for SoCFPGA platform
  ARM: dts: socfpga: Fix I2C bus unit-address error

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2018-09-25 13:48:25 -07:00
parent 200a00d85c 20373e0cb8
commit 47188a858a
3 changed files with 17 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/boot/dts/socfpga.dtsi
View File

@@ -849,6 +849,8 @@ timer0: timer0@ffc08000 {
reg = <0xffc08000 0x1000>;
clocks = <&l4_sp_clk>;
clock-names = "timer";
resets = <&rst SPTIMER0_RESET>;
reset-names = "timer";
};
timer1: timer1@ffc09000 {
@@ -857,6 +859,8 @@ timer1: timer1@ffc09000 {
reg = <0xffc09000 0x1000>;
clocks = <&l4_sp_clk>;
clock-names = "timer";
resets = <&rst SPTIMER1_RESET>;
reset-names = "timer";
};
timer2: timer2@ffd00000 {
@@ -865,6 +869,8 @@ timer2: timer2@ffd00000 {
reg = <0xffd00000 0x1000>;
clocks = <&osc1>;
clock-names = "timer";
resets = <&rst OSC1TIMER0_RESET>;
reset-names = "timer";
};
timer3: timer3@ffd01000 {
@@ -873,6 +879,8 @@ timer3: timer3@ffd01000 {
reg = <0xffd01000 0x1000>;
clocks = <&osc1>;
clock-names = "timer";
resets = <&rst OSC1TIMER1_RESET>;
reset-names = "timer";
};
uart0: serial0@ffc02000 {

8
arch/arm/boot/dts/socfpga_arria10.dtsi
View File

@@ -786,6 +786,8 @@ timer0: timer0@ffc02700 {
reg = <0xffc02700 0x100>;
clocks = <&l4_sp_clk>;
clock-names = "timer";
resets = <&rst SPTIMER0_RESET>;
reset-names = "timer";
};
timer1: timer1@ffc02800 {
@@ -794,6 +796,8 @@ timer1: timer1@ffc02800 {
reg = <0xffc02800 0x100>;
clocks = <&l4_sp_clk>;
clock-names = "timer";
resets = <&rst SPTIMER1_RESET>;
reset-names = "timer";
};
timer2: timer2@ffd00000 {
@@ -802,6 +806,8 @@ timer2: timer2@ffd00000 {
reg = <0xffd00000 0x100>;
clocks = <&l4_sys_free_clk>;
clock-names = "timer";
resets = <&rst L4SYSTIMER0_RESET>;
reset-names = "timer";
};
timer3: timer3@ffd00100 {
@@ -810,6 +816,8 @@ timer3: timer3@ffd00100 {
reg = <0xffd01000 0x100>;
clocks = <&l4_sys_free_clk>;
clock-names = "timer";
resets = <&rst L4SYSTIMER1_RESET>;
reset-names = "timer";
};
uart0: serial0@ffc02000 {

2
arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dts
View File

@@ -88,7 +88,7 @@ &i2c0 {
status = "okay";
clock-frequency = <100000>;
adxl345: adxl345@0 {
adxl345: adxl345@53 {
compatible = "adi,adxl345";
reg = <0x53>;