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Merge tag 'staging-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Browse Source 
Pull staging driver updates from Greg KH:
 "Here is the big set of staging driver updates for 7.2-rc1.

  Nothing major in here, just constant grind of tiny cleanups and coding
  style fixes and wrapper removals. Overall more code was removed than
  added, always a nice sign that things are progressing forward.

  Changes outside of drivers/staging/ was due to the octeon driver
  changes, which for some reason also lives partially in the mips
  subsystem, someday that all will be untangled and cleaned up, or just
  removed entirely, it's hard to tell which is going to be its fate.

  Other than octeon driver cleanups, in here are the usual:

   - rtl8723bs driver reworking and cleanups, being the bulk of this
     merge window given all of the issues and wrappers involved in that
     beast of a driver

   - most driver cleanups

   - sm750fb driver cleanups (which might be done, as this really should
     be moved to the drm layer one of these days...)

   - other tiny staging driver cleanups and fixes

  All of these have been in linux-next for many weeks with no reported
  issues"

* tag 'staging-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (199 commits)
  staging: most: video: avoid double free on video register failure
  staging: sm750: rename CamelCase variable Bpp to bpp
  staging: rtl8723bs: delete superfluous switch statement
  staging: sm750fb: Mark g_noaccel, g_nomtrr and g_dualview as __ro_after_init
  staging: rtl8723bs: propagate errno through hal xmit path
  staging: rtl8723bs: propagate errno through xmit enqueue path
  staging: rtl8723bs: convert rtw_xmit_classifier to return errno
  staging: rtl8723bs: make rtw_xmit_classifier static
  staging: rtl8723bs: simplify rtw_xmit_classifier control flow
  staging: rtl8723bs: make _rtw_enqueue_cmd return 0 on success
  staging: rtl8723bs: simplify rtw_enqueue_cmd control flow
  staging: rtl8723bs: make _rtw_enqueue_cmd static
  staging: rtl8723bs: simplify _rtw_enqueue_cmd control flow
  staging: rtl8723bs: fix multiple blank lines in more hal/ files
  staging: rtl8723bs: remove unused TXDESC_64_BYTES code
  staging: rtl8723bs: remove unused DBG_XMIT_BUF and DBG_XMIT_BUF_EXT code
  staging: rtl8723bs: fix multiple blank lines in hal/Hal* files
  staging: rtl8723bs: fix multiple blank lines in hal/ files
  staging: rtl8723bs: rtw_mlme: add blank line for readability
  staging: rtl8723bs: rtw_mlme: wrap rtw_sitesurvey_cmd condition
  ...
This commit is contained in:
Linus Torvalds
2026-06-22 12:43:16 -07:00
parent 0000d9ccbc 7cb1c5b32a
commit 4708cac0e2
139 changed files with 1622 additions and 2879 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/mips/cavium-octeon/executive/cvmx-helper-util.c
View File

@@ -52,7 +52,7 @@
*
* Returns String
*/
const char *cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t
const char *cvmx_helper_interface_mode_to_string(enum cvmx_helper_interface_mode
mode)
{
switch (mode) {

8
arch/mips/cavium-octeon/executive/cvmx-helper.c
View File

@@ -95,7 +95,7 @@ EXPORT_SYMBOL_GPL(cvmx_helper_ports_on_interface);
* @INTERNAL
* Return interface mode for CN68xx.
*/
static cvmx_helper_interface_mode_t __cvmx_get_mode_cn68xx(int interface)
static enum cvmx_helper_interface_mode __cvmx_get_mode_cn68xx(int interface)
{
union cvmx_mio_qlmx_cfg qlm_cfg;
switch (interface) {
@@ -147,7 +147,7 @@ static cvmx_helper_interface_mode_t __cvmx_get_mode_cn68xx(int interface)
* @INTERNAL
* Return interface mode for an Octeon II
*/
static cvmx_helper_interface_mode_t __cvmx_get_mode_octeon2(int interface)
static enum cvmx_helper_interface_mode __cvmx_get_mode_octeon2(int interface)
{
union cvmx_gmxx_inf_mode mode;
@@ -247,7 +247,7 @@ static cvmx_helper_interface_mode_t __cvmx_get_mode_octeon2(int interface)
* @INTERNAL
* Return interface mode for CN7XXX.
*/
static cvmx_helper_interface_mode_t __cvmx_get_mode_cn7xxx(int interface)
static enum cvmx_helper_interface_mode __cvmx_get_mode_cn7xxx(int interface)
{
union cvmx_gmxx_inf_mode mode;
@@ -289,7 +289,7 @@ static cvmx_helper_interface_mode_t __cvmx_get_mode_cn7xxx(int interface)
* Returns Mode of the interface. Unknown or unsupported interfaces return
* DISABLED.
*/
cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int interface)
enum cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int interface)
{
union cvmx_gmxx_inf_mode mode;

6
arch/mips/cavium-octeon/executive/cvmx-pko.c
View File

@@ -120,7 +120,7 @@ static void __cvmx_pko_port_map_o68(void)
{
int port;
int interface, index;
cvmx_helper_interface_mode_t mode;
enum cvmx_helper_interface_mode mode;
union cvmx_pko_mem_iport_ptrs config;
/*
@@ -323,11 +323,11 @@ EXPORT_SYMBOL_GPL(cvmx_pko_shutdown);
* queues have higher priority than higher numbered queues.
* There must be num_queues elements in the array.
*/
cvmx_pko_status_t cvmx_pko_config_port(uint64_t port, uint64_t base_queue,
enum cvmx_pko_status cvmx_pko_config_port(uint64_t port, uint64_t base_queue,
uint64_t num_queues,
const uint64_t priority[])
{
cvmx_pko_status_t result_code;
enum cvmx_pko_status result_code;
uint64_t queue;
union cvmx_pko_mem_queue_ptrs config;
union cvmx_pko_reg_queue_ptrs1 config1;

16
arch/mips/cavium-octeon/executive/cvmx-spi.c
View File

@@ -102,7 +102,7 @@ void cvmx_spi_set_callbacks(cvmx_spi_callbacks_t *new_callbacks)
*
* Returns Zero on success, negative of failure.
*/
int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, int timeout,
int cvmx_spi_start_interface(int interface, enum cvmx_spi_mode mode, int timeout,
int num_ports)
{
int res = -1;
@@ -147,7 +147,7 @@ int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, int timeout,
*
* Returns Zero on success, negative of failure.
*/
int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode, int timeout)
int cvmx_spi_restart_interface(int interface, enum cvmx_spi_mode mode, int timeout)
{
int res = -1;
@@ -192,7 +192,7 @@ EXPORT_SYMBOL_GPL(cvmx_spi_restart_interface);
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode)
int cvmx_spi_reset_cb(int interface, enum cvmx_spi_mode mode)
{
union cvmx_spxx_dbg_deskew_ctl spxx_dbg_deskew_ctl;
union cvmx_spxx_clk_ctl spxx_clk_ctl;
@@ -308,7 +308,7 @@ int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode)
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
int cvmx_spi_calendar_setup_cb(int interface, enum cvmx_spi_mode mode,
int num_ports)
{
int port;
@@ -427,7 +427,7 @@ int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode, int timeout)
int cvmx_spi_clock_detect_cb(int interface, enum cvmx_spi_mode mode, int timeout)
{
int clock_transitions;
union cvmx_spxx_clk_stat stat;
@@ -505,7 +505,7 @@ int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode, int timeout)
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout)
int cvmx_spi_training_cb(int interface, enum cvmx_spi_mode mode, int timeout)
{
union cvmx_spxx_trn4_ctl spxx_trn4_ctl;
union cvmx_spxx_clk_stat stat;
@@ -574,7 +574,7 @@ int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout)
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode, int timeout)
int cvmx_spi_calendar_sync_cb(int interface, enum cvmx_spi_mode mode, int timeout)
{
uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;
if (mode & CVMX_SPI_MODE_RX_HALFPLEX) {
@@ -630,7 +630,7 @@ int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode, int timeout)
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
int cvmx_spi_interface_up_cb(int interface, cvmx_spi_mode_t mode)
int cvmx_spi_interface_up_cb(int interface, enum cvmx_spi_mode mode)
{
union cvmx_gmxx_rxx_frm_min gmxx_rxx_frm_min;
union cvmx_gmxx_rxx_frm_max gmxx_rxx_frm_max;

2
arch/mips/include/asm/octeon/cvmx-helper-util.h
View File

@@ -42,7 +42,7 @@
* Returns String
*/
extern const char
*cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t mode);
*cvmx_helper_interface_mode_to_string(enum cvmx_helper_interface_mode mode);
/**
* Setup Random Early Drop to automatically begin dropping packets.

6
arch/mips/include/asm/octeon/cvmx-helper.h
View File

@@ -38,7 +38,7 @@
#include <asm/octeon/cvmx-fpa.h>
#include <asm/octeon/cvmx-wqe.h>
typedef enum {
enum cvmx_helper_interface_mode {
CVMX_HELPER_INTERFACE_MODE_DISABLED,
CVMX_HELPER_INTERFACE_MODE_RGMII,
CVMX_HELPER_INTERFACE_MODE_GMII,
@@ -49,7 +49,7 @@ typedef enum {
CVMX_HELPER_INTERFACE_MODE_PICMG,
CVMX_HELPER_INTERFACE_MODE_NPI,
CVMX_HELPER_INTERFACE_MODE_LOOP,
} cvmx_helper_interface_mode_t;
};
union cvmx_helper_link_info {
uint64_t u64;
@@ -125,7 +125,7 @@ extern int cvmx_helper_get_number_of_interfaces(void);
* Returns Mode of the interface. Unknown or unsupported interfaces return
* DISABLED.
*/
extern cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int
extern enum cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int
interface);
/**

6
arch/mips/include/asm/octeon/cvmx-pip.h
View File

@@ -180,7 +180,7 @@ typedef union {
/**
* Status statistics for a port
*/
typedef struct {
struct cvmx_pip_port_status {
/* Inbound octets marked to be dropped by the IPD */
uint32_t dropped_octets;
/* Inbound packets marked to be dropped by the IPD */
@@ -236,7 +236,7 @@ typedef struct {
uint64_t inb_octets;
/* Number of packets with GMX/SPX/PCI errors received by PIP */
uint16_t inb_errors;
} cvmx_pip_port_status_t;
};
/**
* Definition of the PIP custom header that can be prepended
@@ -365,7 +365,7 @@ static inline void cvmx_pip_config_diffserv_qos(uint64_t diffserv, uint64_t qos)
* @status: Where to put the results.
*/
static inline void cvmx_pip_get_port_status(uint64_t port_num, uint64_t clear,
cvmx_pip_port_status_t *status)
struct cvmx_pip_port_status *status)
{
union cvmx_pip_stat_ctl pip_stat_ctl;
union cvmx_pip_stat0_prtx stat0;

26
arch/mips/include/asm/octeon/cvmx-pko.h
View File

@@ -80,7 +80,7 @@
#define CVMX_PKO_ILLEGAL_QUEUE 0xFFFF
#define CVMX_PKO_MAX_QUEUE_DEPTH 0
typedef enum {
enum cvmx_pko_status {
CVMX_PKO_SUCCESS,
CVMX_PKO_INVALID_PORT,
CVMX_PKO_INVALID_QUEUE,
@@ -88,12 +88,12 @@ typedef enum {
CVMX_PKO_NO_MEMORY,
CVMX_PKO_PORT_ALREADY_SETUP,
CVMX_PKO_CMD_QUEUE_INIT_ERROR
} cvmx_pko_status_t;
};
/**
* This enumeration represents the different locking modes supported by PKO.
*/
typedef enum {
enum cvmx_pko_lock {
/*
* PKO doesn't do any locking. It is the responsibility of the
* application to make sure that no other core is accessing
@@ -112,13 +112,13 @@ typedef enum {
* ll/sc. This is the most portable locking mechanism.
*/
CVMX_PKO_LOCK_CMD_QUEUE = 2,
} cvmx_pko_lock_t;
};
typedef struct {
struct cvmx_pko_port_status {
uint32_t packets;
uint64_t octets;
uint64_t doorbell;
} cvmx_pko_port_status_t;
};
/**
* This structure defines the address to use on a packet enqueue
@@ -306,7 +306,7 @@ extern void cvmx_pko_shutdown(void);
* of a value of 1. There must be num_queues elements in the
* array.
*/
extern cvmx_pko_status_t cvmx_pko_config_port(uint64_t port,
extern enum cvmx_pko_status cvmx_pko_config_port(uint64_t port,
uint64_t base_queue,
uint64_t num_queues,
const uint64_t priority[]);
@@ -374,7 +374,7 @@ static inline void cvmx_pko_doorbell(uint64_t port, uint64_t queue,
*/
static inline void cvmx_pko_send_packet_prepare(uint64_t port, uint64_t queue,
cvmx_pko_lock_t use_locking)
enum cvmx_pko_lock use_locking)
{
if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG) {
/*
@@ -414,12 +414,12 @@ static inline void cvmx_pko_send_packet_prepare(uint64_t port, uint64_t queue,
* Returns: CVMX_PKO_SUCCESS on success, or error code on
* failure of output
*/
static inline cvmx_pko_status_t cvmx_pko_send_packet_finish(
static inline enum cvmx_pko_status cvmx_pko_send_packet_finish(
uint64_t port,
uint64_t queue,
union cvmx_pko_command_word0 pko_command,
union cvmx_buf_ptr packet,
cvmx_pko_lock_t use_locking)
enum cvmx_pko_lock use_locking)
{
cvmx_cmd_queue_result_t result;
if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG)
@@ -457,13 +457,13 @@ static inline cvmx_pko_status_t cvmx_pko_send_packet_finish(
* Returns: CVMX_PKO_SUCCESS on success, or error code on
* failure of output
*/
static inline cvmx_pko_status_t cvmx_pko_send_packet_finish3(
static inline enum cvmx_pko_status cvmx_pko_send_packet_finish3(
uint64_t port,
uint64_t queue,
union cvmx_pko_command_word0 pko_command,
union cvmx_buf_ptr packet,
uint64_t addr,
cvmx_pko_lock_t use_locking)
enum cvmx_pko_lock use_locking)
{
cvmx_cmd_queue_result_t result;
if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG)
@@ -574,7 +574,7 @@ static inline int cvmx_pko_get_num_queues(int port)
* @status: Where to put the results.
*/
static inline void cvmx_pko_get_port_status(uint64_t port_num, uint64_t clear,
cvmx_pko_port_status_t *status)
struct cvmx_pko_port_status *status)
{
union cvmx_pko_reg_read_idx pko_reg_read_idx;
union cvmx_pko_mem_count0 pko_mem_count0;

12
arch/mips/include/asm/octeon/cvmx-pow.h
View File

@@ -84,10 +84,10 @@ enum cvmx_pow_tag_type {
/**
* Wait flag values for pow functions.
*/
typedef enum {
enum cvmx_pow_wait {
CVMX_POW_WAIT = 1,
CVMX_POW_NO_WAIT = 0,
} cvmx_pow_wait_t;
};
/**
* POW tag operations. These are used in the data stored to the POW.
@@ -1348,7 +1348,7 @@ static inline void cvmx_pow_tag_sw_wait(void)
* Returns: the WQE pointer from POW. Returns NULL if no work
* was available.
*/
static inline struct cvmx_wqe *cvmx_pow_work_request_sync_nocheck(cvmx_pow_wait_t
static inline struct cvmx_wqe *cvmx_pow_work_request_sync_nocheck(enum cvmx_pow_wait
wait)
{
cvmx_pow_load_addr_t ptr;
@@ -1382,7 +1382,7 @@ static inline struct cvmx_wqe *cvmx_pow_work_request_sync_nocheck(cvmx_pow_wait_
* Returns: the WQE pointer from POW. Returns NULL if no work
* was available.
*/
static inline struct cvmx_wqe *cvmx_pow_work_request_sync(cvmx_pow_wait_t wait)
static inline struct cvmx_wqe *cvmx_pow_work_request_sync(enum cvmx_pow_wait wait)
{
if (CVMX_ENABLE_POW_CHECKS)
__cvmx_pow_warn_if_pending_switch(__func__);
@@ -1436,7 +1436,7 @@ static inline enum cvmx_pow_tag_type cvmx_pow_work_request_null_rd(void)
* timeout), 0 to cause response to return immediately
*/
static inline void cvmx_pow_work_request_async_nocheck(int scr_addr,
cvmx_pow_wait_t wait)
enum cvmx_pow_wait wait)
{
cvmx_pow_iobdma_store_t data;
@@ -1465,7 +1465,7 @@ static inline void cvmx_pow_work_request_async_nocheck(int scr_addr,
* timeout), 0 to cause response to return immediately
*/
static inline void cvmx_pow_work_request_async(int scr_addr,
cvmx_pow_wait_t wait)
enum cvmx_pow_wait wait)
{
if (CVMX_ENABLE_POW_CHECKS)
__cvmx_pow_warn_if_pending_switch(__func__);

38
arch/mips/include/asm/octeon/cvmx-spi.h
View File

@@ -36,35 +36,35 @@
/* CSR typedefs have been moved to cvmx-csr-*.h */
typedef enum {
enum cvmx_spi_mode {
CVMX_SPI_MODE_UNKNOWN = 0,
CVMX_SPI_MODE_TX_HALFPLEX = 1,
CVMX_SPI_MODE_RX_HALFPLEX = 2,
CVMX_SPI_MODE_DUPLEX = 3
} cvmx_spi_mode_t;
};
/** Callbacks structure to customize SPI4 initialization sequence */
typedef struct {
/** Called to reset SPI4 DLL */
int (*reset_cb) (int interface, cvmx_spi_mode_t mode);
int (*reset_cb)(int interface, enum cvmx_spi_mode mode);
/** Called to setup calendar */
int (*calendar_setup_cb) (int interface, cvmx_spi_mode_t mode,
int num_ports);
int (*calendar_setup_cb)(int interface, enum cvmx_spi_mode mode,
int num_ports);
/** Called for Tx and Rx clock detection */
int (*clock_detect_cb) (int interface, cvmx_spi_mode_t mode,
int timeout);
int (*clock_detect_cb)(int interface, enum cvmx_spi_mode mode,
int timeout);
/** Called to perform link training */
int (*training_cb) (int interface, cvmx_spi_mode_t mode, int timeout);
int (*training_cb)(int interface, enum cvmx_spi_mode mode, int timeout);
/** Called for calendar data synchronization */
int (*calendar_sync_cb) (int interface, cvmx_spi_mode_t mode,
int timeout);
int (*calendar_sync_cb)(int interface, enum cvmx_spi_mode mode,
int timeout);
/** Called when interface is up */
int (*interface_up_cb) (int interface, cvmx_spi_mode_t mode);
int (*interface_up_cb)(int interface, enum cvmx_spi_mode mode);
} cvmx_spi_callbacks_t;
@@ -94,7 +94,7 @@ static inline int cvmx_spi_is_spi_interface(int interface)
*
* Returns Zero on success, negative of failure.
*/
extern int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode,
extern int cvmx_spi_start_interface(int interface, enum cvmx_spi_mode mode,
int timeout, int num_ports);
/**
@@ -110,7 +110,7 @@ extern int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode,
* @timeout: Timeout to wait for clock synchronization in seconds
* Returns Zero on success, negative of failure.
*/
extern int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode,
extern int cvmx_spi_restart_interface(int interface, enum cvmx_spi_mode mode,
int timeout);
/**
@@ -180,7 +180,7 @@ extern void cvmx_spi_set_callbacks(cvmx_spi_callbacks_t *new_callbacks);
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
extern int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode);
extern int cvmx_spi_reset_cb(int interface, enum cvmx_spi_mode mode);
/**
* Callback to setup calendar and miscellaneous settings before clock
@@ -197,7 +197,7 @@ extern int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode);
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
extern int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
extern int cvmx_spi_calendar_setup_cb(int interface, enum cvmx_spi_mode mode,
int num_ports);
/**
@@ -214,7 +214,7 @@ extern int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
extern int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode,
extern int cvmx_spi_clock_detect_cb(int interface, enum cvmx_spi_mode mode,
int timeout);
/**
@@ -231,7 +231,7 @@ extern int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
extern int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode,
extern int cvmx_spi_training_cb(int interface, enum cvmx_spi_mode mode,
int timeout);
/**
@@ -248,7 +248,7 @@ extern int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
extern int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode,
extern int cvmx_spi_calendar_sync_cb(int interface, enum cvmx_spi_mode mode,
int timeout);
/**
@@ -264,6 +264,6 @@ extern int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
extern int cvmx_spi_interface_up_cb(int interface, cvmx_spi_mode_t mode);
extern int cvmx_spi_interface_up_cb(int interface, enum cvmx_spi_mode mode);
#endif /* __CVMX_SPI_H__ */

3
drivers/staging/fbtft/fb_ssd1351.c
View File

@@ -218,8 +218,7 @@ static void register_onboard_backlight(struct fbtft_par *par)
&bl_props);
if (IS_ERR(bd)) {
dev_err(par->info->device,
"cannot register backlight device (%ld)\n",
PTR_ERR(bd));
"cannot register backlight device (%pe)\n", bd);
return;
}
par->info->bl_dev = bd;

3
drivers/staging/fbtft/fbtft-core.c
View File

@@ -187,8 +187,7 @@ void fbtft_register_backlight(struct fbtft_par *par)
&fbtft_bl_ops, &bl_props);
if (IS_ERR(bd)) {
dev_err(par->info->device,
"cannot register backlight device (%ld)\n",
PTR_ERR(bd));
"cannot register backlight device (%pe)\n", bd);
return;
}
par->info->bl_dev = bd;

7
drivers/staging/fbtft/fbtft-io.c
View File

@@ -227,10 +227,3 @@ int fbtft_write_gpio16_wr(struct fbtft_par *par, void *buf, size_t len)
return 0;
}
EXPORT_SYMBOL(fbtft_write_gpio16_wr);
int fbtft_write_gpio16_wr_latched(struct fbtft_par *par, void *buf, size_t len)
{
dev_err(par->info->device, "%s: function not implemented\n", __func__);
return -1;
}
EXPORT_SYMBOL(fbtft_write_gpio16_wr_latched);

1
drivers/staging/fbtft/fbtft.h
View File

@@ -262,7 +262,6 @@ int fbtft_write_spi_emulate_9(struct fbtft_par *par, void *buf, size_t len);
int fbtft_read_spi(struct fbtft_par *par, void *buf, size_t len);
int fbtft_write_gpio8_wr(struct fbtft_par *par, void *buf, size_t len);
int fbtft_write_gpio16_wr(struct fbtft_par *par, void *buf, size_t len);
int fbtft_write_gpio16_wr_latched(struct fbtft_par *par, void *buf, size_t len);
/* fbtft-bus.c */
int fbtft_write_vmem8_bus8(struct fbtft_par *par, size_t offset, size_t len);

2
drivers/staging/greybus/Documentation/firmware/authenticate.c
View File

@@ -85,7 +85,7 @@ int main(int argc, char *argv[])
}
printf("Authenticated, result (%02x), sig-size (%02x)\n",
authenticate.result_code, authenticate.signature_size);
authenticate.result_code, authenticate.signature_size);
close_fd:
close(fd);

2
drivers/staging/greybus/Documentation/sysfs-bus-greybus
View File

@@ -26,7 +26,7 @@ Date: March 2016
KernelVersion: 4.XX
Contact: Greg Kroah-Hartman <greg@kroah.com>
Description:
Writing a non-zero argument to this attibute disables the
Writing a non-zero argument to this attribute disables the
module's interfaces before physically ejecting it.
What: /sys/bus/greybus/devices/N-M/module_id

6
drivers/staging/most/dim2/dim2.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* dim2.c - MediaLB DIM2 Hardware Dependent Module
* MediaLB DIM2 Hardware Dependent Module
*
* Copyright (C) 2015-2016, Microchip Technology Germany II GmbH & Co. KG
*/
@@ -165,7 +165,7 @@ static int try_start_dim_transfer(struct hdm_channel *hdm_ch)
unsigned long flags;
struct dim_ch_state st;
if (!hdm_ch || !hdm_ch->is_initialized)
if (!hdm_ch->is_initialized)
return -EINVAL;
spin_lock_irqsave(&dim_lock, flags);
@@ -271,7 +271,7 @@ static void service_done_flag(struct dim2_hdm *dev, int ch_idx)
unsigned long flags;
u8 *data;
if (!hdm_ch || !hdm_ch->is_initialized)
if (!hdm_ch->is_initialized)
return;
spin_lock_irqsave(&dim_lock, flags);

2
drivers/staging/most/dim2/errors.h
View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* errors.h - Definitions of errors for DIM2 HAL API
* Definitions of errors for DIM2 HAL API
* (MediaLB, Device Interface Macro IP, OS62420)
*
* Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG

2
drivers/staging/most/dim2/hal.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* hal.c - DIM2 HAL implementation
* DIM2 HAL implementation
* (MediaLB, Device Interface Macro IP, OS62420)
*
* Copyright (C) 2015-2016, Microchip Technology Germany II GmbH & Co. KG

2
drivers/staging/most/dim2/hal.h
View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* hal.h - DIM2 HAL interface
* DIM2 HAL interface
* (MediaLB, Device Interface Macro IP, OS62420)
*
* Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG

2
drivers/staging/most/dim2/reg.h
View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* reg.h - Definitions for registers of DIM2
* Definitions for registers of DIM2
* (MediaLB, Device Interface Macro IP, OS62420)
*
* Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG

2
drivers/staging/most/dim2/sysfs.h
View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* sysfs.h - MediaLB sysfs information
* MediaLB sysfs information
*
* Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG
*/

18
drivers/staging/most/net/net.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* net.c - Networking component for Mostcore
* Networking component for Mostcore
*
* Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG
*/
@@ -80,11 +80,6 @@ static int skb_to_mamac(const struct sk_buff *skb, struct mbo *mbo)
unsigned int payload_len = skb->len - ETH_HLEN;
unsigned int mdp_len = payload_len + MDP_HDR_LEN;
if (mdp_len < skb->len) {
pr_err("drop: too large packet! (%u)\n", skb->len);
return -EINVAL;
}
if (mbo->buffer_length < mdp_len) {
pr_err("drop: too small buffer! (%d for %d)\n",
mbo->buffer_length, mdp_len);
@@ -132,11 +127,6 @@ static int skb_to_mep(const struct sk_buff *skb, struct mbo *mbo)
u8 *buff = mbo->virt_address;
unsigned int mep_len = skb->len + MEP_HDR_LEN;
if (mep_len < skb->len) {
pr_err("drop: too large packet! (%u)\n", skb->len);
return -EINVAL;
}
if (mbo->buffer_length < mep_len) {
pr_err("drop: too small buffer! (%d for %d)\n",
mbo->buffer_length, mep_len);
@@ -339,13 +329,13 @@ static int comp_probe_channel(struct most_interface *iface, int channel_idx,
} else {
ch = ccfg->direction == MOST_CH_TX ? &nd->tx : &nd->rx;
if (ch->linked) {
pr_err("direction is allocated\n");
netdev_err(nd->dev, "direction is allocated\n");
ret = -EINVAL;
goto unlock;
}
if (register_netdev(nd->dev)) {
pr_err("register_netdev() failed\n");
netdev_err(nd->dev, "register_netdev() failed\n");
ret = -EINVAL;
goto unlock;
}
@@ -464,7 +454,7 @@ static int comp_rx_data(struct mbo *mbo)
if (!skb) {
dev->stats.rx_dropped++;
pr_err_once("drop packet: no memory for skb\n");
netdev_err_once(dev, "drop packet: no memory for skb\n");
goto out;
}

30
drivers/staging/most/video/video.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* video.c - V4L2 component for Mostcore
* V4L2 component for Mostcore
*
* Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG
*/
@@ -420,6 +420,7 @@ static int comp_register_videodev(struct most_video_dev *mdev)
/* Fill the video capture device struct */
*mdev->vdev = comp_videodev_template;
mdev->vdev->release = video_device_release_empty;
mdev->vdev->v4l2_dev = &mdev->v4l2_dev;
mdev->vdev->lock = &mdev->lock;
snprintf(mdev->vdev->name, sizeof(mdev->vdev->name), "MOST: %s",
@@ -432,9 +433,13 @@ static int comp_register_videodev(struct most_video_dev *mdev)
v4l2_err(&mdev->v4l2_dev, "video_register_device failed (%d)\n",
ret);
video_device_release(mdev->vdev);
return ret;
}
return ret;
mdev->vdev->release = video_device_release;
return 0;
}
static void comp_unregister_videodev(struct most_video_dev *mdev)
@@ -555,29 +560,8 @@ static int __init comp_init(void)
static void __exit comp_exit(void)
{
struct most_video_dev *mdev, *tmp;
LIST_HEAD(free_list);
/*
* As the mostcore currently doesn't call disconnect_channel()
* for linked channels while we call most_deregister_component()
* we simulate this call here.
* This must be fixed in core.
*/
spin_lock_irq(&list_lock);
list_replace_init(&video_devices, &free_list);
spin_unlock_irq(&list_lock);
list_for_each_entry_safe(mdev, tmp, &free_list, list) {
list_del_init(&mdev->list);
comp_unregister_videodev(mdev);
v4l2_device_disconnect(&mdev->v4l2_dev);
v4l2_device_put(&mdev->v4l2_dev);
}
most_deregister_configfs_subsys(&comp);
most_deregister_component(&comp);
BUG_ON(!list_empty(&video_devices));
}
module_init(comp_init);

8
drivers/staging/nvec/nvec.c
View File

@@ -494,6 +494,8 @@ static void nvec_tx_completed(struct nvec_chip *nvec)
static void nvec_rx_completed(struct nvec_chip *nvec)
{
if (nvec->rx->pos != nvec_msg_size(nvec->rx)) {
unsigned char msg_type = nvec->rx->data[0];
dev_err(nvec->dev, "RX incomplete: Expected %u bytes, got %u\n",
(uint)nvec_msg_size(nvec->rx),
(uint)nvec->rx->pos);
@@ -502,7 +504,7 @@ static void nvec_rx_completed(struct nvec_chip *nvec)
nvec->state = 0;
/* Battery quirk - Often incomplete, and likes to crash */
if (nvec->rx->data[0] == NVEC_BAT)
if (msg_type == NVEC_BAT)
complete(&nvec->ec_transfer);
return;
@@ -904,8 +906,8 @@ static void tegra_nvec_remove(struct platform_device *pdev)
nvec_unregister_notifier(nvec, &nvec->nvec_status_notifier);
cancel_work_sync(&nvec->rx_work);
cancel_work_sync(&nvec->tx_work);
/* FIXME: needs check whether nvec is responsible for power off */
pm_power_off = NULL;
if (pm_power_off == nvec_power_off)
pm_power_off = NULL;
}
#ifdef CONFIG_PM_SLEEP

43
drivers/staging/octeon/ethernet-mem.c
View File

@@ -5,6 +5,7 @@
* Copyright (c) 2003-2010 Cavium Networks
*/
#include <linux/platform_device.h>
#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/slab.h>
@@ -40,11 +41,13 @@ static int cvm_oct_fill_hw_skbuff(int pool, int size, int elements)
/**
* cvm_oct_free_hw_skbuff- free hardware pool skbuffs
* @pdev: Platform device for logging
* @pool: Pool to allocate an skbuff for
* @size: Size of the buffer needed for the pool
* @elements: Number of buffers to allocate
*/
static void cvm_oct_free_hw_skbuff(int pool, int size, int elements)
static void cvm_oct_free_hw_skbuff(struct platform_device *pdev,
int pool, int size, int elements)
{
char *memory;
@@ -59,22 +62,24 @@ static void cvm_oct_free_hw_skbuff(int pool, int size, int elements)
} while (memory);
if (elements < 0)
pr_warn("Freeing of pool %u had too many skbuffs (%d)\n",
pool, elements);
dev_warn(&pdev->dev, "Freeing of pool %u had too many skbuffs (%d)\n",
pool, elements);
else if (elements > 0)
pr_warn("Freeing of pool %u is missing %d skbuffs\n",
pool, elements);
dev_warn(&pdev->dev, "Freeing of pool %u is missing %d skbuffs\n",
pool, elements);
}
/**
* cvm_oct_fill_hw_memory - fill a hardware pool with memory.
* @pdev: Platform device for logging
* @pool: Pool to populate
* @size: Size of each buffer in the pool
* @elements: Number of buffers to allocate
*
* Returns the actual number of buffers allocated.
*/
static int cvm_oct_fill_hw_memory(int pool, int size, int elements)
static int cvm_oct_fill_hw_memory(struct platform_device *pdev, int pool, int size,
int elements)
{
char *memory;
char *fpa;
@@ -93,8 +98,8 @@ static int cvm_oct_fill_hw_memory(int pool, int size, int elements)
*/
memory = kmalloc(size + 256, GFP_ATOMIC);
if (unlikely(!memory)) {
pr_warn("Unable to allocate %u bytes for FPA pool %d\n",
elements * size, pool);
dev_warn(&pdev->dev, "Unable to allocate %u bytes for FPA pool %d\n",
elements * size, pool);
break;
}
fpa = (char *)(((unsigned long)memory + 256) & ~0x7fUL);
@@ -107,11 +112,13 @@ static int cvm_oct_fill_hw_memory(int pool, int size, int elements)
/**
* cvm_oct_free_hw_memory - Free memory allocated by cvm_oct_fill_hw_memory
* @pdev: Platform device for logging
* @pool: FPA pool to free
* @size: Size of each buffer in the pool
* @elements: Number of buffers that should be in the pool
*/
static void cvm_oct_free_hw_memory(int pool, int size, int elements)
static void cvm_oct_free_hw_memory(struct platform_device *pdev,
int pool, int size, int elements)
{
char *memory;
char *fpa;
@@ -127,28 +134,28 @@ static void cvm_oct_free_hw_memory(int pool, int size, int elements)
} while (fpa);
if (elements < 0)
pr_warn("Freeing of pool %u had too many buffers (%d)\n",
pool, elements);
dev_warn(&pdev->dev, "Freeing of pool %u had too many buffers (%d)\n",
pool, elements);
else if (elements > 0)
pr_warn("Warning: Freeing of pool %u is missing %d buffers\n",
pool, elements);
dev_warn(&pdev->dev, "Freeing of pool %u is missing %d buffers\n",
pool, elements);
}
int cvm_oct_mem_fill_fpa(int pool, int size, int elements)
int cvm_oct_mem_fill_fpa(struct platform_device *pdev, int pool, int size, int elements)
{
int freed;
if (pool == CVMX_FPA_PACKET_POOL)
freed = cvm_oct_fill_hw_skbuff(pool, size, elements);
else
freed = cvm_oct_fill_hw_memory(pool, size, elements);
freed = cvm_oct_fill_hw_memory(pdev, pool, size, elements);
return freed;
}
void cvm_oct_mem_empty_fpa(int pool, int size, int elements)
void cvm_oct_mem_empty_fpa(struct platform_device *pdev, int pool, int size, int elements)
{
if (pool == CVMX_FPA_PACKET_POOL)
cvm_oct_free_hw_skbuff(pool, size, elements);
cvm_oct_free_hw_skbuff(pdev, pool, size, elements);
else
cvm_oct_free_hw_memory(pool, size, elements);
cvm_oct_free_hw_memory(pdev, pool, size, elements);
}

8
drivers/staging/octeon/ethernet-mem.h
View File

@@ -5,5 +5,9 @@
* Copyright (c) 2003-2007 Cavium Networks
*/
int cvm_oct_mem_fill_fpa(int pool, int size, int elements);
void cvm_oct_mem_empty_fpa(int pool, int size, int elements);
struct platform_device;
int cvm_oct_mem_fill_fpa(struct platform_device *pdev, int pool, int size,
int elements);
void cvm_oct_mem_empty_fpa(struct platform_device *pdev, int pool, int size,
int elements);

49
drivers/staging/octeon/ethernet-rx.c
View File

@@ -5,6 +5,7 @@
* Copyright (c) 2003-2010 Cavium Networks
*/
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/cache.h>
@@ -31,12 +32,6 @@
static atomic_t oct_rx_ready = ATOMIC_INIT(0);
static struct oct_rx_group {
int irq;
int group;
struct napi_struct napi;
} oct_rx_group[16];
/**
* cvm_oct_do_interrupt - interrupt handler.
* @irq: Interrupt number.
@@ -397,7 +392,7 @@ static int cvm_oct_poll(struct oct_rx_group *rx_group, int budget)
/* Restore the scratch area */
cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch);
}
cvm_oct_rx_refill_pool(0);
cvm_oct_rx_refill_pool(rx_group->pdev, 0);
return rx_count;
}
@@ -434,24 +429,28 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget)
*/
void cvm_oct_poll_controller(struct net_device *dev)
{
struct platform_device *pdev = to_platform_device(dev->dev.parent);
struct octeon_ethernet_platform *plat = platform_get_drvdata(pdev);
int i;
if (!atomic_read(&oct_rx_ready))
return;
for (i = 0; i < ARRAY_SIZE(oct_rx_group); i++) {
for (i = 0; i < ARRAY_SIZE(plat->rx_group); i++) {
if (!(pow_receive_groups & BIT(i)))
continue;
cvm_oct_poll(&oct_rx_group[i], 16);
cvm_oct_poll(&plat->rx_group[i], 16);
}
}
#endif
void cvm_oct_rx_initialize(void)
void cvm_oct_rx_initialize(struct platform_device *pdev)
{
int i;
struct net_device *dev_for_napi = NULL;
struct octeon_ethernet_platform *plat = platform_get_drvdata(pdev);
struct oct_rx_group *rx_group = plat->rx_group;
for (i = 0; i < TOTAL_NUMBER_OF_PORTS; i++) {
if (cvm_oct_device[i]) {
@@ -463,27 +462,28 @@ void cvm_oct_rx_initialize(void)
if (!dev_for_napi)
panic("No net_devices were allocated.");
for (i = 0; i < ARRAY_SIZE(oct_rx_group); i++) {
for (i = 0; i < ARRAY_SIZE(plat->rx_group); i++) {
int ret;
if (!(pow_receive_groups & BIT(i)))
continue;
netif_napi_add_weight(dev_for_napi, &oct_rx_group[i].napi,
netif_napi_add_weight(dev_for_napi, &rx_group[i].napi,
cvm_oct_napi_poll, rx_napi_weight);
napi_enable(&oct_rx_group[i].napi);
napi_enable(&rx_group[i].napi);
oct_rx_group[i].irq = OCTEON_IRQ_WORKQ0 + i;
oct_rx_group[i].group = i;
rx_group[i].irq = OCTEON_IRQ_WORKQ0 + i;
rx_group[i].group = i;
rx_group[i].pdev = pdev;
/* Register an IRQ handler to receive POW interrupts */
ret = request_irq(oct_rx_group[i].irq, cvm_oct_do_interrupt, 0,
"Ethernet", &oct_rx_group[i].napi);
ret = request_irq(rx_group[i].irq, cvm_oct_do_interrupt, 0,
"Ethernet", &rx_group[i].napi);
if (ret)
panic("Could not acquire Ethernet IRQ %d\n",
oct_rx_group[i].irq);
rx_group[i].irq);
disable_irq_nosync(oct_rx_group[i].irq);
disable_irq_nosync(rx_group[i].irq);
/* Enable POW interrupt when our port has at least one packet */
if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
@@ -515,16 +515,17 @@ void cvm_oct_rx_initialize(void)
/* Schedule NAPI now. This will indirectly enable the
* interrupt.
*/
napi_schedule(&oct_rx_group[i].napi);
napi_schedule(&rx_group[i].napi);
}
atomic_inc(&oct_rx_ready);
}
void cvm_oct_rx_shutdown(void)
void cvm_oct_rx_shutdown(struct platform_device *pdev)
{
struct octeon_ethernet_platform *plat = platform_get_drvdata(pdev);
int i;
for (i = 0; i < ARRAY_SIZE(oct_rx_group); i++) {
for (i = 0; i < ARRAY_SIZE(plat->rx_group); i++) {
if (!(pow_receive_groups & BIT(i)))
continue;
@@ -535,8 +536,8 @@ void cvm_oct_rx_shutdown(void)
cvmx_write_csr(CVMX_POW_WQ_INT_THRX(i), 0);
/* Free the interrupt handler */
free_irq(oct_rx_group[i].irq, &oct_rx_group[i].napi);
free_irq(plat->rx_group[i].irq, &plat->rx_group[i].napi);
netif_napi_del(&oct_rx_group[i].napi);
netif_napi_del(&plat->rx_group[i].napi);
}
}

13
drivers/staging/octeon/ethernet-rx.h
View File

@@ -5,11 +5,14 @@
* Copyright (c) 2003-2007 Cavium Networks
*/
void cvm_oct_poll_controller(struct net_device *dev);
void cvm_oct_rx_initialize(void);
void cvm_oct_rx_shutdown(void);
struct platform_device;
static inline void cvm_oct_rx_refill_pool(int fill_threshold)
void cvm_oct_poll_controller(struct net_device *dev);
void cvm_oct_rx_initialize(struct platform_device *pdev);
void cvm_oct_rx_shutdown(struct platform_device *pdev);
static inline void cvm_oct_rx_refill_pool(struct platform_device *pdev,
int fill_threshold)
{
int number_to_free;
int num_freed;
@@ -20,7 +23,7 @@ static inline void cvm_oct_rx_refill_pool(int fill_threshold)
if (number_to_free > fill_threshold) {
cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE,
-number_to_free);
num_freed = cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL,
num_freed = cvm_oct_mem_fill_fpa(pdev, CVMX_FPA_PACKET_POOL,
CVMX_FPA_PACKET_POOL_SIZE,
number_to_free);
if (num_freed != number_to_free) {

69
drivers/staging/octeon/ethernet.c
View File

@@ -104,11 +104,10 @@ struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS];
u64 cvm_oct_tx_poll_interval;
static void cvm_oct_rx_refill_worker(struct work_struct *work);
static DECLARE_DELAYED_WORK(cvm_oct_rx_refill_work, cvm_oct_rx_refill_worker);
static void cvm_oct_rx_refill_worker(struct work_struct *work)
{
struct octeon_ethernet_platform *plat = container_of(work,
struct octeon_ethernet_platform, rx_refill_work.work);
/*
* FPA 0 may have been drained, try to refill it if we need
* more than num_packet_buffers / 2, otherwise normal receive
@@ -116,10 +115,10 @@ static void cvm_oct_rx_refill_worker(struct work_struct *work)
* could be received so cvm_oct_napi_poll would never be
* invoked to do the refill.
*/
cvm_oct_rx_refill_pool(num_packet_buffers / 2);
cvm_oct_rx_refill_pool(plat->pdev, num_packet_buffers / 2);
if (!atomic_read(&cvm_oct_poll_queue_stopping))
schedule_delayed_work(&cvm_oct_rx_refill_work, HZ);
schedule_delayed_work(&plat->rx_refill_work, HZ);
}
static void cvm_oct_periodic_worker(struct work_struct *work)
@@ -138,16 +137,16 @@ static void cvm_oct_periodic_worker(struct work_struct *work)
schedule_delayed_work(&priv->port_periodic_work, HZ);
}
static void cvm_oct_configure_common_hw(void)
static void cvm_oct_configure_common_hw(struct platform_device *pdev)
{
/* Setup the FPA */
cvmx_fpa_enable();
cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
cvm_oct_mem_fill_fpa(pdev, CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
num_packet_buffers);
cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
cvm_oct_mem_fill_fpa(pdev, CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
num_packet_buffers);
if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
cvm_oct_mem_fill_fpa(pdev, CVMX_FPA_OUTPUT_BUFFER_POOL,
CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 1024);
#ifdef __LITTLE_ENDIAN
@@ -201,8 +200,8 @@ EXPORT_SYMBOL(cvm_oct_free_work);
*/
static struct net_device_stats *cvm_oct_common_get_stats(struct net_device *dev)
{
cvmx_pip_port_status_t rx_status;
cvmx_pko_port_status_t tx_status;
struct cvmx_pip_port_status rx_status;
struct cvmx_pko_port_status tx_status;
struct octeon_ethernet *priv = netdev_priv(dev);
if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) {
@@ -678,6 +677,15 @@ static int cvm_oct_probe(struct platform_device *pdev)
int qos;
struct device_node *pip;
int mtu_overhead = ETH_HLEN + ETH_FCS_LEN;
struct octeon_ethernet_platform *plat;
plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
if (!plat)
return -ENOMEM;
plat->pdev = pdev;
INIT_DELAYED_WORK(&plat->rx_refill_work, cvm_oct_rx_refill_worker);
platform_set_drvdata(pdev, plat);
#if IS_ENABLED(CONFIG_VLAN_8021Q)
mtu_overhead += VLAN_HLEN;
@@ -685,11 +693,11 @@ static int cvm_oct_probe(struct platform_device *pdev)
pip = pdev->dev.of_node;
if (!pip) {
pr_err("Error: No 'pip' in /aliases\n");
dev_err(&pdev->dev, "No 'pip' in /aliases\n");
return -EINVAL;
}
cvm_oct_configure_common_hw();
cvm_oct_configure_common_hw(pdev);
cvmx_helper_initialize_packet_io_global();
@@ -783,22 +791,22 @@ static int cvm_oct_probe(struct platform_device *pdev)
dev->max_mtu = OCTEON_MAX_MTU - mtu_overhead;
if (register_netdev(dev) < 0) {
pr_err("Failed to register ethernet device for POW\n");
netdev_err(dev, "Failed to register ethernet device for POW\n");
free_netdev(dev);
} else {
cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev;
pr_info("%s: POW send group %d, receive group %d\n",
dev->name, pow_send_group,
pow_receive_group);
netdev_info(dev, "POW send group %d, receive group %d\n",
pow_send_group,
pow_receive_group);
}
} else {
pr_err("Failed to allocate ethernet device for POW\n");
dev_err(&pdev->dev, "Failed to allocate ethernet device for POW\n");
}
}
num_interfaces = cvmx_helper_get_number_of_interfaces();
for (interface = 0; interface < num_interfaces; interface++) {
cvmx_helper_interface_mode_t imode =
enum cvmx_helper_interface_mode imode =
cvmx_helper_interface_get_mode(interface);
int num_ports = cvmx_helper_ports_on_interface(interface);
int port;
@@ -812,8 +820,8 @@ static int cvm_oct_probe(struct platform_device *pdev)
struct net_device *dev =
alloc_etherdev(sizeof(struct octeon_ethernet));
if (!dev) {
pr_err("Failed to allocate ethernet device for port %d\n",
port);
dev_err(&pdev->dev, "Failed to allocate ethernet device for port %d\n",
port);
continue;
}
@@ -897,8 +905,8 @@ static int cvm_oct_probe(struct platform_device *pdev)
if (!dev->netdev_ops) {
free_netdev(dev);
} else if (register_netdev(dev) < 0) {
pr_err("Failed to register ethernet device for interface %d, port %d\n",
interface, priv->port);
netdev_err(dev, "Failed to register ethernet device for interface %d, port %d\n",
interface, priv->port);
free_netdev(dev);
} else {
cvm_oct_device[priv->port] = dev;
@@ -912,28 +920,29 @@ static int cvm_oct_probe(struct platform_device *pdev)
}
cvm_oct_tx_initialize();
cvm_oct_rx_initialize();
cvm_oct_rx_initialize(pdev);
/*
* 150 uS: about 10 1500-byte packets at 1GE.
*/
cvm_oct_tx_poll_interval = 150 * (octeon_get_clock_rate() / 1000000);
schedule_delayed_work(&cvm_oct_rx_refill_work, HZ);
schedule_delayed_work(&plat->rx_refill_work, HZ);
return 0;
}
static void cvm_oct_remove(struct platform_device *pdev)
{
struct octeon_ethernet_platform *plat = platform_get_drvdata(pdev);
int port;
cvmx_ipd_disable();
atomic_inc_return(&cvm_oct_poll_queue_stopping);
cancel_delayed_work_sync(&cvm_oct_rx_refill_work);
cancel_delayed_work_sync(&plat->rx_refill_work);
cvm_oct_rx_shutdown();
cvm_oct_rx_shutdown(pdev);
cvm_oct_tx_shutdown();
cvmx_pko_disable();
@@ -958,12 +967,12 @@ static void cvm_oct_remove(struct platform_device *pdev)
cvmx_ipd_free_ptr();
/* Free the HW pools */
cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
cvm_oct_mem_empty_fpa(pdev, CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
num_packet_buffers);
cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
cvm_oct_mem_empty_fpa(pdev, CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
num_packet_buffers);
if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
cvm_oct_mem_empty_fpa(pdev, CVMX_FPA_OUTPUT_BUFFER_POOL,
CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128);
}

14
drivers/staging/octeon/octeon-ethernet.h
View File

@@ -11,6 +11,7 @@
#ifndef OCTEON_ETHERNET_H
#define OCTEON_ETHERNET_H
#include <linux/netdevice.h>
#include <linux/of.h>
#include <linux/phy.h>
@@ -74,6 +75,19 @@ struct octeon_ethernet {
struct device_node *of_node;
};
struct oct_rx_group {
int irq;
int group;
struct napi_struct napi;
struct platform_device *pdev;
};
struct octeon_ethernet_platform {
struct platform_device *pdev;
struct delayed_work rx_refill_work;
struct oct_rx_group rx_group[16];
};
int cvm_oct_free_work(void *work_queue_entry);
int cvm_oct_rgmii_open(struct net_device *dev);

48
drivers/staging/octeon/octeon-stubs.h
View File

@@ -215,14 +215,14 @@ enum cvmx_fau_op_size {
CVMX_FAU_OP_SIZE_64 = 3
};
typedef enum {
enum cvmx_spi_mode {
CVMX_SPI_MODE_UNKNOWN = 0,
CVMX_SPI_MODE_TX_HALFPLEX = 1,
CVMX_SPI_MODE_RX_HALFPLEX = 2,
CVMX_SPI_MODE_DUPLEX = 3
} cvmx_spi_mode_t;
};
typedef enum {
enum cvmx_helper_interface_mode {
CVMX_HELPER_INTERFACE_MODE_DISABLED,
CVMX_HELPER_INTERFACE_MODE_RGMII,
CVMX_HELPER_INTERFACE_MODE_GMII,
@@ -233,20 +233,20 @@ typedef enum {
CVMX_HELPER_INTERFACE_MODE_PICMG,
CVMX_HELPER_INTERFACE_MODE_NPI,
CVMX_HELPER_INTERFACE_MODE_LOOP,
} cvmx_helper_interface_mode_t;
};
typedef enum {
enum cvmx_pow_wait {
CVMX_POW_WAIT = 1,
CVMX_POW_NO_WAIT = 0,
} cvmx_pow_wait_t;
};
typedef enum {
enum cvmx_pko_lock {
CVMX_PKO_LOCK_NONE = 0,
CVMX_PKO_LOCK_ATOMIC_TAG = 1,
CVMX_PKO_LOCK_CMD_QUEUE = 2,
} cvmx_pko_lock_t;
};
typedef enum {
enum cvmx_pko_status {
CVMX_PKO_SUCCESS,
CVMX_PKO_INVALID_PORT,
CVMX_PKO_INVALID_QUEUE,
@@ -254,7 +254,7 @@ typedef enum {
CVMX_PKO_NO_MEMORY,
CVMX_PKO_PORT_ALREADY_SETUP,
CVMX_PKO_CMD_QUEUE_INIT_ERROR
} cvmx_pko_status_t;
};
enum cvmx_pow_tag_type {
CVMX_POW_TAG_TYPE_ORDERED = 0L,
@@ -386,7 +386,7 @@ union cvmx_ipd_sub_port_qos_cnt {
} s;
};
typedef struct {
struct cvmx_pip_port_status {
u32 dropped_octets;
u32 dropped_packets;
u32 pci_raw_packets;
@@ -409,13 +409,13 @@ typedef struct {
u32 inb_packets;
u64 inb_octets;
u16 inb_errors;
} cvmx_pip_port_status_t;
};
typedef struct {
struct cvmx_pko_port_status {
u32 packets;
u64 octets;
u64 doorbell;
} cvmx_pko_port_status_t;
};
union cvmx_pip_frm_len_chkx {
u64 u64;
@@ -1260,14 +1260,14 @@ static inline int octeon_is_simulation(void)
}
static inline void cvmx_pip_get_port_status(u64 port_num, u64 clear,
cvmx_pip_port_status_t *status)
struct cvmx_pip_port_status *status)
{ }
static inline void cvmx_pko_get_port_status(u64 port_num, u64 clear,
cvmx_pko_port_status_t *status)
struct cvmx_pko_port_status *status)
{ }
static inline cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int
static inline enum cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int
interface)
{
return 0;
@@ -1344,11 +1344,11 @@ static inline unsigned int cvmx_get_core_num(void)
}
static inline void cvmx_pow_work_request_async_nocheck(int scr_addr,
cvmx_pow_wait_t wait)
enum cvmx_pow_wait wait)
{ }
static inline void cvmx_pow_work_request_async(int scr_addr,
cvmx_pow_wait_t wait)
enum cvmx_pow_wait wait)
{ }
static inline struct cvmx_wqe *cvmx_pow_work_response_async(int scr_addr)
@@ -1358,13 +1358,13 @@ static inline struct cvmx_wqe *cvmx_pow_work_response_async(int scr_addr)
return wqe;
}
static inline struct cvmx_wqe *cvmx_pow_work_request_sync(cvmx_pow_wait_t wait)
static inline struct cvmx_wqe *cvmx_pow_work_request_sync(enum cvmx_pow_wait wait)
{
return (void *)(unsigned long)wait;
}
static inline int cvmx_spi_restart_interface(int interface,
cvmx_spi_mode_t mode, int timeout)
enum cvmx_spi_mode mode, int timeout)
{
return 0;
}
@@ -1383,12 +1383,12 @@ static inline union cvmx_gmxx_rxx_rx_inbnd cvmx_spi4000_check_speed(int interfac
}
static inline void cvmx_pko_send_packet_prepare(u64 port, u64 queue,
cvmx_pko_lock_t use_locking)
enum cvmx_pko_lock use_locking)
{ }
static inline cvmx_pko_status_t cvmx_pko_send_packet_finish(u64 port,
static inline enum cvmx_pko_status cvmx_pko_send_packet_finish(u64 port,
u64 queue, union cvmx_pko_command_word0 pko_command,
union cvmx_buf_ptr packet, cvmx_pko_lock_t use_locking)
union cvmx_buf_ptr packet, enum cvmx_pko_lock use_locking)
{
return 0;
}

90
drivers/staging/rtl8723bs/core/rtw_ap.c
View File

@@ -20,8 +20,6 @@ void init_mlme_ap_info(struct adapter *padapter)
INIT_LIST_HEAD(&pacl_list->acl_node_q.queue);
spin_lock_init(&pacl_list->acl_node_q.lock);
/* pmlmeext->bstart_bss = false; */
start_ap_mode(padapter);
}
@@ -32,8 +30,6 @@ void free_mlme_ap_info(struct adapter *padapter)
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
/* stop_ap_mode(padapter); */
pmlmepriv->update_bcn = false;
pmlmeext->bstart_bss = false;
@@ -60,7 +56,7 @@ static void update_BCNTIM(struct adapter *padapter)
/* update TIM IE */
u8 *p, *dst_ie, *premainder_ie = NULL, *pbackup_remainder_ie = NULL;
__le16 tim_bitmap_le;
uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen;
unsigned int offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen;
tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap);
@@ -156,7 +152,7 @@ static void update_BCNTIM(struct adapter *padapter)
kfree(pbackup_remainder_ie);
}
offset = (uint)(dst_ie - pie);
offset = (unsigned int)(dst_ie - pie);
pnetwork_mlmeext->ie_length = offset + remainder_ielen;
}
@@ -301,7 +297,7 @@ void expire_timeout_chk(struct adapter *padapter)
psta->keep_alive_trycnt = 0;
spin_lock_bh(&pstapriv->asoc_list_lock);
if (list_empty(&psta->asoc_list) == false) {
if (!list_empty(&psta->asoc_list)) {
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
updated = ap_free_sta(padapter, psta, false,
@@ -377,7 +373,6 @@ void update_bmc_sta(struct adapter *padapter)
if (psta) {
psta->aid = 0;/* default set to 0 */
/* psta->mac_id = psta->aid+4; */
psta->mac_id = psta->aid + 1;/* mac_id = 1 for bc/mc stainfo */
pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta;
@@ -448,12 +443,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta)
struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv;
struct ht_priv *phtpriv_sta = &psta->htpriv;
u8 cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0;
/* set intf_tag to if1 */
/* psta->intf_tag = 0; */
/* psta->mac_id = psta->aid+4; */
/* psta->mac_id = psta->aid+1;//alloc macid when call rtw_alloc_stainfo(), */
/* release macid when call rtw_free_stainfo() */
/* ap mode */
rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, true);
@@ -544,9 +533,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta)
memset(&psta->sta_stats, 0, sizeof(struct stainfo_stats));
/* add ratid */
/* add_ratid(padapter, psta); move to ap_sta_info_defer_update() */
spin_lock_bh(&psta->lock);
psta->state |= _FW_LINKED;
spin_unlock_bh(&psta->lock);
@@ -567,9 +553,6 @@ static void update_ap_info(struct adapter *padapter, struct sta_info *psta)
/* HT related cap */
if (phtpriv_ap->ht_option) {
/* check if sta supports rx ampdu */
/* phtpriv_ap->ampdu_enable = phtpriv_ap->ampdu_enable; */
/* check if sta support s Short GI 20M */
if ((phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20))
phtpriv_ap->sgi_20m = true;
@@ -621,11 +604,6 @@ static void update_hw_ht_param(struct adapter *padapter)
pmlmeinfo->SM_PS =
(le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info) &
0x0C) >> 2;
/* */
/* Config current HT Protection mode. */
/* */
/* pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; */
}
void start_bss_network(struct adapter *padapter)
@@ -662,16 +640,11 @@ void start_bss_network(struct adapter *padapter)
pmlmeext->bstart_bss = true;
/* todo: update wmm, ht cap */
/* pmlmeinfo->WMM_enable; */
/* pmlmeinfo->HT_enable; */
if (pmlmepriv->qospriv.qos_option)
pmlmeinfo->WMM_enable = true;
if (pmlmepriv->htpriv.ht_option) {
pmlmeinfo->WMM_enable = true;
pmlmeinfo->HT_enable = true;
/* pmlmeinfo->HT_info_enable = true; */
/* pmlmeinfo->HT_caps_enable = true; */
update_hw_ht_param(padapter);
}
@@ -694,7 +667,6 @@ void start_bss_network(struct adapter *padapter)
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm));
acparm = 0x005E4317; /* VI */
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm));
/* acparm = 0x00105320; // BE */
acparm = 0x005ea42b;
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm));
acparm = 0x0000A444; /* BK */
@@ -711,18 +683,8 @@ void start_bss_network(struct adapter *padapter)
rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL);
if (!pmlmepriv->cur_network.join_res) { /* setting only at first time */
/* u32 initialgain; */
/* initialgain = 0x1e; */
/* disable dynamic functions, such as high power, DIG */
/* Save_DM_Func_Flag(padapter); */
/* Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, false); */
/* turn on all dynamic functions */
Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, true);
/* rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); */
}
/* set channel, bwmode */
@@ -739,21 +701,17 @@ void start_bss_network(struct adapter *padapter)
if ((cbw40_enable) && (pht_info->infos[0] & BIT(2))) {
/* switch to the 40M Hz mode */
/* pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; */
cur_bwmode = CHANNEL_WIDTH_40;
switch (pht_info->infos[0] & 0x3) {
case 1:
/* pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; */
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
break;
case 3:
/* pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; */
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
break;
default:
/* pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; */
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
break;
}
@@ -789,8 +747,6 @@ void start_bss_network(struct adapter *padapter)
/* update bc/mc sta_info */
update_bmc_sta(padapter);
/* pmlmeext->bstart_bss = true; */
}
int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
@@ -798,10 +754,10 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
int ret = _SUCCESS;
u8 *p;
u8 *ht_caps_ie = NULL;
u8 *pHT_info_ie = NULL;
u8 *ht_info_ie = NULL;
struct sta_info *psta = NULL;
u16 cap, ht_cap = false;
uint ie_len = 0;
unsigned int ie_len = 0;
int group_cipher, pairwise_cipher;
u8 channel, network_type, support_rate[NDIS_802_11_LENGTH_RATES_EX];
int support_rate_num = 0;
@@ -836,12 +792,9 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
/* beacon interval */
/* ie + 8; 8: TimeStamp, 2: Beacon Interval 2:Capability */
p = rtw_get_beacon_interval_from_ie(ie);
/* pbss_network->configuration.beacon_period = le16_to_cpu(*(unsigned short*)p); */
pbss_network->configuration.beacon_period = get_unaligned_le16(p);
/* capability */
/* cap = *(unsigned short *)rtw_get_capability_from_ie(ie); */
/* cap = le16_to_cpu(cap); */
cap = get_unaligned_le16(ie);
/* SSID */
@@ -1054,7 +1007,7 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
&ie_len,
(pbss_network->ie_length - _BEACON_IE_OFFSET_));
if (p && ie_len > 0)
pHT_info_ie = p;
ht_info_ie = p;
switch (network_type) {
case WIRELESS_11B:
@@ -1075,12 +1028,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
pmlmepriv->htpriv.ht_option = false;
if ((psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_TKIP) ||
(psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_TKIP)) {
/* todo: */
/* ht_cap = false; */
}
/* ht_cap */
if (pregistrypriv->ht_enable && ht_cap) {
pmlmepriv->htpriv.ht_option = true;
@@ -1091,14 +1038,13 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
HT_caps_handler(padapter, (struct ndis_80211_var_ie *)ht_caps_ie);
HT_info_handler(padapter, (struct ndis_80211_var_ie *)pHT_info_ie);
HT_info_handler(padapter, (struct ndis_80211_var_ie *)ht_info_ie);
}
pbss_network->length =
get_wlan_bssid_ex_sz((struct wlan_bssid_ex *)pbss_network);
/* issue beacon to start bss network */
/* start_bss_network(padapter, (u8 *)pbss_network); */
rtw_startbss_cmd(padapter, RTW_CMDF_WAIT_ACK);
/* alloc sta_info for ap itself */
@@ -1117,9 +1063,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
pmlmepriv->cur_network.join_res = true;/* for check if already set beacon */
/* update bc/mc sta_info */
/* update_bmc_sta(padapter); */
return ret;
}
@@ -1408,7 +1351,7 @@ static void update_bcn_wps_ie(struct adapter *padapter)
u8 *premainder_ie;
u8 *pbackup_remainder_ie = NULL;
uint wps_ielen = 0, wps_offset, remainder_ielen;
unsigned int wps_ielen = 0, wps_offset, remainder_ielen;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
@@ -1428,7 +1371,7 @@ static void update_bcn_wps_ie(struct adapter *padapter)
if (!pwps_ie_src)
return;
wps_offset = (uint)(pwps_ie - ie);
wps_offset = (unsigned int)(pwps_ie - ie);
premainder_ie = pwps_ie + wps_ielen;
@@ -1437,7 +1380,7 @@ static void update_bcn_wps_ie(struct adapter *padapter)
if (remainder_ielen)
pbackup_remainder_ie = kmemdup(premainder_ie, remainder_ielen, GFP_ATOMIC);
wps_ielen = (uint)pwps_ie_src[1];/* to get ie data len */
wps_ielen = (unsigned int)pwps_ie_src[1];/* to get ie data len */
if ((wps_offset + wps_ielen + 2 + remainder_ielen) <= MAX_IE_SZ) {
memcpy(pwps_ie, pwps_ie_src, wps_ielen + 2);
pwps_ie += (wps_ielen + 2);
@@ -1475,14 +1418,12 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
{
struct mlme_priv *pmlmepriv;
struct mlme_ext_priv *pmlmeext;
/* struct mlme_ext_info *pmlmeinfo; */
if (!padapter)
return;
pmlmepriv = &padapter->mlmepriv;
pmlmeext = &padapter->mlmeextpriv;
/* pmlmeinfo = &(pmlmeext->mlmext_info); */
if (!pmlmeext->bstart_bss)
return;
@@ -1540,10 +1481,8 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
spin_unlock_bh(&pmlmepriv->bcn_update_lock);
if (tx) {
/* send_beacon(padapter);//send_beacon must execute on TSR level */
if (tx)
set_tx_beacon_cmd(padapter);
}
}
/*
@@ -1847,8 +1786,6 @@ u8 ap_free_sta(struct adapter *padapter,
psta->htpriv.agg_enable_bitmap = 0x0;/* reset */
psta->htpriv.candidate_tid_bitmap = 0x0;/* reset */
/* report_del_sta_event(padapter, psta->hwaddr, reason); */
/* clear cam entry / key */
rtw_clearstakey_cmd(padapter, psta, true);
@@ -1888,9 +1825,7 @@ void rtw_sta_flush(struct adapter *padapter)
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
/* spin_unlock_bh(&pstapriv->asoc_list_lock); */
ap_free_sta(padapter, psta, true, WLAN_REASON_DEAUTH_LEAVING);
/* spin_lock_bh(&pstapriv->asoc_list_lock); */
}
spin_unlock_bh(&pstapriv->asoc_list_lock);
@@ -2017,7 +1952,6 @@ void start_ap_mode(struct adapter *padapter)
pmlmepriv->update_bcn = false;
/* init_mlme_ap_info(padapter); */
pmlmeext->bstart_bss = false;
pmlmepriv->num_sta_non_erp = 0;
@@ -2105,5 +2039,5 @@ void stop_ap_mode(struct adapter *padapter)
rtw_free_mlme_priv_ie_data(pmlmepriv);
rtw_btcoex_MediaStatusNotify(padapter, 0); /* disconnect */
rtw_btcoex_media_status_notify(padapter, 0); /* disconnect */
}

15
drivers/staging/rtl8723bs/core/rtw_btcoex.c
View File

@@ -8,17 +8,17 @@
#include <rtw_btcoex.h>
#include <hal_btcoex.h>
void rtw_btcoex_MediaStatusNotify(struct adapter *padapter, u8 media_status)
void rtw_btcoex_media_status_notify(struct adapter *padapter, u8 media_status)
{
if ((media_status == RT_MEDIA_CONNECT)
&& (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == true)) {
if ((media_status == RT_MEDIA_CONNECT) &&
check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE)) {
rtw_hal_set_hwreg(padapter, HW_VAR_DL_RSVD_PAGE, NULL);
}
hal_btcoex_MediaStatusNotify(padapter, media_status);
}
void rtw_btcoex_HaltNotify(struct adapter *padapter)
void rtw_btcoex_halt_notify(struct adapter *padapter)
{
if (!padapter->bup)
return;
@@ -32,7 +32,7 @@ void rtw_btcoex_HaltNotify(struct adapter *padapter)
/* ================================================== */
/* Below Functions are called by BT-Coex */
/* ================================================== */
void rtw_btcoex_RejectApAggregatedPacket(struct adapter *padapter, u8 enable)
void rtw_btcoex_reject_ap_aggregated_packet(struct adapter *padapter, u8 enable)
{
struct mlme_ext_info *pmlmeinfo;
struct sta_info *psta;
@@ -49,7 +49,7 @@ void rtw_btcoex_RejectApAggregatedPacket(struct adapter *padapter, u8 enable)
}
}
void rtw_btcoex_LPS_Enter(struct adapter *padapter)
void rtw_btcoex_lps_enter(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv;
u8 lps_val;
@@ -61,11 +61,10 @@ void rtw_btcoex_LPS_Enter(struct adapter *padapter)
rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, lps_val, "BTCOEX");
}
void rtw_btcoex_LPS_Leave(struct adapter *padapter)
void rtw_btcoex_lps_leave(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv;
pwrpriv = adapter_to_pwrctl(padapter);
if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {

48
drivers/staging/rtl8723bs/core/rtw_cmd.c
View File

@@ -184,7 +184,8 @@ int rtw_init_cmd_priv(struct cmd_priv *pcmdpriv)
return -ENOMEM;
}
pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf + 4 - ((SIZE_PTR)(pcmdpriv->rsp_allocated_buf) & 3);
pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf + 4 -
((SIZE_PTR)(pcmdpriv->rsp_allocated_buf) & 3);
pcmdpriv->cmd_issued_cnt = 0;
pcmdpriv->cmd_done_cnt = 0;
@@ -247,12 +248,12 @@ void _rtw_free_cmd_priv(struct cmd_priv *pcmdpriv)
*
*/
int _rtw_enqueue_cmd(struct __queue *queue, struct cmd_obj *obj)
static int _rtw_enqueue_cmd(struct __queue *queue, struct cmd_obj *obj)
{
unsigned long irqL;
if (!obj)
goto exit;
return 0;
/* spin_lock_bh(&queue->lock); */
spin_lock_irqsave(&queue->lock, irqL);
@@ -262,8 +263,7 @@ int _rtw_enqueue_cmd(struct __queue *queue, struct cmd_obj *obj)
/* spin_unlock_bh(&queue->lock); */
spin_unlock_irqrestore(&queue->lock, irqL);
exit:
return _SUCCESS;
return 0;
}
struct cmd_obj *_rtw_dequeue_cmd(struct __queue *queue)
@@ -313,27 +313,28 @@ int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj)
int rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj)
{
int res = _FAIL;
int res;
struct adapter *padapter = pcmdpriv->padapter;
if (!cmd_obj)
goto exit;
return _FAIL;
cmd_obj->padapter = padapter;
res = rtw_cmd_filter(pcmdpriv, cmd_obj);
if (res == _FAIL) {
rtw_free_cmd_obj(cmd_obj);
goto exit;
return _FAIL;
}
res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj);
if (res == _SUCCESS)
if (res == 0) {
complete(&pcmdpriv->cmd_queue_comp);
return _SUCCESS;
}
exit:
return res;
return _FAIL;
}
struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv)
@@ -672,7 +673,7 @@ int rtw_startbss_cmd(struct adapter *padapter, int flags)
u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork)
{
u8 res = _SUCCESS;
uint t_len = 0;
unsigned int t_len = 0;
struct wlan_bssid_ex *psecnetwork;
struct cmd_obj *pcmd;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
@@ -696,7 +697,7 @@ u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork)
t_len = sizeof(struct wlan_bssid_ex);
/* for hidden ap to set fw_state here */
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE) != true) {
if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE)) {
switch (ndis_network_mode) {
case Ndis802_11IBSS:
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
@@ -735,12 +736,19 @@ u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork)
if (!pmlmepriv->assoc_by_bssid)
memcpy(&pmlmepriv->assoc_bssid[0], &pnetwork->network.mac_address[0], ETH_ALEN);
psecnetwork->ie_length = rtw_restruct_sec_ie(padapter, &pnetwork->network.ies[0], &psecnetwork->ies[0], pnetwork->network.ie_length);
psecnetwork->ie_length = rtw_restruct_sec_ie(padapter,
&pnetwork->network.ies[0],
&psecnetwork->ies[0],
pnetwork->network.ie_length);
pqospriv->qos_option = 0;
if (pregistrypriv->wmm_enable) {
tmp_len = rtw_restruct_wmm_ie(padapter, &pnetwork->network.ies[0], &psecnetwork->ies[0], pnetwork->network.ie_length, psecnetwork->ie_length);
tmp_len = rtw_restruct_wmm_ie(padapter,
&pnetwork->network.ies[0],
&psecnetwork->ies[0],
pnetwork->network.ie_length,
psecnetwork->ie_length);
if (psecnetwork->ie_length != tmp_len) {
psecnetwork->ie_length = tmp_len;
@@ -1291,16 +1299,16 @@ void lps_ctrl_wk_hdl(struct adapter *padapter, u8 lps_ctrl_type)
/* Reset LPS Setting */
pwrpriv->LpsIdleCount = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
rtw_btcoex_MediaStatusNotify(padapter, mstatus);
rtw_btcoex_media_status_notify(padapter, mstatus);
break;
case LPS_CTRL_DISCONNECT:
mstatus = 0;/* disconnect */
rtw_btcoex_MediaStatusNotify(padapter, mstatus);
rtw_btcoex_media_status_notify(padapter, mstatus);
LPS_Leave(padapter, "LPS_CTRL_DISCONNECT");
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
break;
case LPS_CTRL_SPECIAL_PACKET:
pwrpriv->DelayLPSLastTimeStamp = jiffies;
pwrpriv->delay_lps_last_time_stamp = jiffies;
hal_btcoex_SpecialPacketNotify(padapter, PACKET_DHCP);
LPS_Leave(padapter, "LPS_CTRL_SPECIAL_PACKET");
break;
@@ -1603,7 +1611,7 @@ static void rtw_btinfo_hdl(struct adapter *adapter, u8 *buf, u16 buf_len)
cmd_idx = info->cid;
if (info->len > buf_len - 2) {
rtw_warn_on(1);
WARN_ON(1);
len = buf_len - 2;
} else {
len = info->len;
@@ -1650,7 +1658,7 @@ u8 rtw_c2h_packet_wk_cmd(struct adapter *padapter, u8 *pbuf, u16 length)
return res;
}
/* dont call R/W in this function, beucase SDIO interrupt have claim host */
/* do not call R/W in this function, because SDIO interrupt have claim host */
/* or deadlock will happen and cause special-systemserver-died in android */
u8 rtw_c2h_wk_cmd(struct adapter *padapter, u8 *c2h_evt)
{

29
drivers/staging/rtl8723bs/core/rtw_efuse.c
View File

@@ -10,7 +10,7 @@
/* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */
u8
Efuse_CalculateWordCnts(u8 word_en)
rtw_efuse_calculate_word_counts(u8 word_en)
{
u8 word_cnts = 0;
@@ -26,7 +26,7 @@ Efuse_CalculateWordCnts(u8 word_en)
}
/*-----------------------------------------------------------------------------
* Function: EFUSE_Read1Byte
* Function: rtw_efuse_read_1_byte
*
* Overview: Copy from WMAC fot EFUSE read 1 byte.
*
@@ -42,7 +42,7 @@ Efuse_CalculateWordCnts(u8 word_en)
*
*/
u8
EFUSE_Read1Byte(
rtw_efuse_read_1_byte(
struct adapter *Adapter,
u16 Address)
{
@@ -76,14 +76,14 @@ u16 Address)
break;
}
return rtw_read8(Adapter, EFUSE_CTRL);
} else
} else {
return 0xFF;
} /* EFUSE_Read1Byte */
}
} /* rtw_efuse_read_1_byte */
/* 11/16/2008 MH Read one byte from real Efuse. */
u8
efuse_OneByteRead(
rtw_efuse_one_byte_read(
struct adapter *padapter,
u16 addr,
u8 *data)
@@ -95,7 +95,7 @@ u8 *data)
/* <20130121, Kordan> For SMIC EFUSE specificatoin. */
/* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */
/* PHY_SetMacReg(padapter, 0x34, BIT11, 0); */
rtw_write16(padapter, 0x34, rtw_read16(padapter, 0x34) & (~BIT11));
rtw_write16(padapter, 0x34, rtw_read16(padapter, 0x34) & (~BIT(11)));
/* -----------------e-fuse reg ctrl --------------------------------- */
/* address */
@@ -201,7 +201,7 @@ static void efuse_ShadowRead4Byte(struct adapter *padapter, u16 Offset, u32 *Val
} /* efuse_ShadowRead4Byte */
/*-----------------------------------------------------------------------------
* Function: EFUSE_ShadowMapUpdate
* Function: rtw_efuse_shadow_map_update
*
* Overview: Transfer current EFUSE content to shadow init and modify map.
*
@@ -216,7 +216,7 @@ static void efuse_ShadowRead4Byte(struct adapter *padapter, u16 Offset, u32 *Val
* 11/13/2008 MHC Create Version 0.
*
*/
void EFUSE_ShadowMapUpdate(struct adapter *padapter, u8 efuseType)
void rtw_efuse_shadow_map_update(struct adapter *padapter, u8 efuseType)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
u16 mapLen = 0;
@@ -230,11 +230,10 @@ void EFUSE_ShadowMapUpdate(struct adapter *padapter, u8 efuseType)
/* PlatformMoveMemory((void *)&pHalData->EfuseMap[EFUSE_MODIFY_MAP][0], */
/* void *)&pHalData->EfuseMap[EFUSE_INIT_MAP][0], mapLen); */
} /* EFUSE_ShadowMapUpdate */
} /* rtw_efuse_shadow_map_update */
/*-----------------------------------------------------------------------------
* Function: EFUSE_ShadowRead
* Function: rtw_efuse_shadow_read
*
* Overview: Read from efuse init map !!!!!
*
@@ -249,7 +248,7 @@ void EFUSE_ShadowMapUpdate(struct adapter *padapter, u8 efuseType)
* 11/12/2008 MHC Create Version 0.
*
*/
void EFUSE_ShadowRead(struct adapter *padapter, u8 Type, u16 Offset, u32 *Value)
void rtw_efuse_shadow_read(struct adapter *padapter, u8 Type, u16 Offset, u32 *Value)
{
if (Type == 1)
efuse_ShadowRead1Byte(padapter, Offset, (u8 *)Value);
@@ -258,4 +257,4 @@ void EFUSE_ShadowRead(struct adapter *padapter, u8 Type, u16 Offset, u32 *Value)
else if (Type == 4)
efuse_ShadowRead4Byte(padapter, Offset, (u32 *)Value);
} /* EFUSE_ShadowRead*/
} /* rtw_efuse_shadow_read*/

3
drivers/staging/rtl8723bs/core/rtw_ieee80211.c
View File

@@ -347,7 +347,7 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv)
/* HT Cap. */
if ((pregistrypriv->wireless_mode & WIRELESS_11_24N) &&
(pregistrypriv->ht_enable == true)) {
pregistrypriv->ht_enable) {
/* todo: */
}
@@ -593,7 +593,6 @@ int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len)
if (wapi_len)
*wapi_len = in_ie[cnt + 1] + 2;
}
cnt += in_ie[cnt + 1] + 2; /* get next */

20
drivers/staging/rtl8723bs/core/rtw_io.c
View File

@@ -27,9 +27,8 @@
u8 rtw_read8(struct adapter *adapter, u32 addr)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
struct intf_hdl *pintfhdl = &pio_priv->intf;
u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
_read8 = pintfhdl->io_ops._read8;
@@ -39,9 +38,8 @@ u8 rtw_read8(struct adapter *adapter, u32 addr)
u16 rtw_read16(struct adapter *adapter, u32 addr)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
struct intf_hdl *pintfhdl = &pio_priv->intf;
u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
_read16 = pintfhdl->io_ops._read16;
@@ -51,9 +49,8 @@ u16 rtw_read16(struct adapter *adapter, u32 addr)
u32 rtw_read32(struct adapter *adapter, u32 addr)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
struct intf_hdl *pintfhdl = &pio_priv->intf;
u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
_read32 = pintfhdl->io_ops._read32;
@@ -63,9 +60,8 @@ u32 rtw_read32(struct adapter *adapter, u32 addr)
int rtw_write8(struct adapter *adapter, u32 addr, u8 val)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
struct intf_hdl *pintfhdl = &pio_priv->intf;
int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
@@ -78,9 +74,8 @@ int rtw_write8(struct adapter *adapter, u32 addr, u8 val)
int rtw_write16(struct adapter *adapter, u32 addr, u16 val)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
struct intf_hdl *pintfhdl = &pio_priv->intf;
int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
@@ -92,9 +87,8 @@ int rtw_write16(struct adapter *adapter, u32 addr, u16 val)
int rtw_write32(struct adapter *adapter, u32 addr, u32 val)
{
/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
struct intf_hdl *pintfhdl = &pio_priv->intf;
int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
@@ -109,7 +103,7 @@ u32 rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
struct intf_hdl *pintfhdl = &pio_priv->intf;
_write_port = pintfhdl->io_ops._write_port;

58
drivers/staging/rtl8723bs/core/rtw_ioctl_set.c
View File

@@ -80,7 +80,7 @@ u8 rtw_do_join(struct adapter *padapter)
pmlmepriv->to_join = false;
_set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
} else {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
/* submit createbss_cmd to change to a ADHOC_MASTER */
/* pmlmepriv->lock has been acquired by caller... */
@@ -120,9 +120,7 @@ u8 rtw_do_join(struct adapter *padapter)
pmlmepriv->to_join = false;
}
}
}
}
exit:
@@ -139,32 +137,32 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid)
netdev_dbg(padapter->pnetdev, "set ssid [%s] fw_state = 0x%08x\n",
ssid->ssid, get_fwstate(pmlmepriv));
if (padapter->hw_init_completed == false) {
if (!padapter->hw_init_completed) {
status = _FAIL;
goto exit;
}
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true)
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
goto handle_tkip_countermeasure;
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == true)
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING))
goto release_mlme_lock;
if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == true) {
if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE)) {
if ((pmlmepriv->assoc_ssid.ssid_length == ssid->ssid_length) &&
(!memcmp(&pmlmepriv->assoc_ssid.ssid, ssid->ssid, ssid->ssid_length))) {
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == false) {
if (rtw_is_same_ibss(padapter, pnetwork) == false) {
if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
if (!rtw_is_same_ibss(padapter, pnetwork)) {
/* if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again */
rtw_disassoc_cmd(padapter, 0, true);
if (check_fwstate(pmlmepriv, _FW_LINKED) == true)
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_indicate_disconnect(padapter);
rtw_free_assoc_resources(padapter, 1);
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true) {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
}
@@ -177,12 +175,12 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid)
} else {
rtw_disassoc_cmd(padapter, 0, true);
if (check_fwstate(pmlmepriv, _FW_LINKED) == true)
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_indicate_disconnect(padapter);
rtw_free_assoc_resources(padapter, 1);
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true) {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
}
@@ -195,7 +193,7 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid)
goto release_mlme_lock;
}
if (rtw_validate_ssid(ssid) == false) {
if (!rtw_validate_ssid(ssid)) {
status = _FAIL;
goto release_mlme_lock;
}
@@ -203,7 +201,7 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid)
memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(struct ndis_802_11_ssid));
pmlmepriv->assoc_by_bssid = false;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true)
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
pmlmepriv->to_join = true;
else
status = rtw_do_join(padapter);
@@ -223,10 +221,10 @@ u8 rtw_set_802_11_connect(struct adapter *padapter, u8 *bssid, struct ndis_802_1
bool ssid_valid = true;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if (!ssid || rtw_validate_ssid(ssid) == false)
if (!ssid || !rtw_validate_ssid(ssid))
ssid_valid = false;
if (!bssid || rtw_validate_bssid(bssid) == false)
if (!bssid || !rtw_validate_bssid(bssid))
bssid_valid = false;
if (!ssid_valid && !bssid_valid) {
@@ -234,7 +232,7 @@ u8 rtw_set_802_11_connect(struct adapter *padapter, u8 *bssid, struct ndis_802_1
goto exit;
}
if (padapter->hw_init_completed == false) {
if (!padapter->hw_init_completed) {
status = _FAIL;
goto exit;
}
@@ -244,9 +242,9 @@ u8 rtw_set_802_11_connect(struct adapter *padapter, u8 *bssid, struct ndis_802_1
netdev_dbg(padapter->pnetdev, FUNC_ADPT_FMT " fw_state = 0x%08x\n",
FUNC_ADPT_ARG(padapter), get_fwstate(pmlmepriv));
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true)
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
goto handle_tkip_countermeasure;
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == true)
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING))
goto release_mlme_lock;
handle_tkip_countermeasure:
@@ -267,7 +265,7 @@ u8 rtw_set_802_11_connect(struct adapter *padapter, u8 *bssid, struct ndis_802_1
pmlmepriv->assoc_by_bssid = false;
}
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true)
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
pmlmepriv->to_join = true;
else
status = rtw_do_join(padapter);
@@ -296,15 +294,15 @@ u8 rtw_set_802_11_infrastructure_mode(struct adapter *padapter,
spin_lock_bh(&pmlmepriv->lock);
if ((check_fwstate(pmlmepriv, _FW_LINKED) == true) || (*pold_state == Ndis802_11IBSS))
if (check_fwstate(pmlmepriv, _FW_LINKED) || (*pold_state == Ndis802_11IBSS))
rtw_disassoc_cmd(padapter, 0, true);
if ((check_fwstate(pmlmepriv, _FW_LINKED) == true) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true))
if (check_fwstate(pmlmepriv, _FW_LINKED) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))
rtw_free_assoc_resources(padapter, 1);
if ((*pold_state == Ndis802_11Infrastructure) || (*pold_state == Ndis802_11IBSS)) {
if (check_fwstate(pmlmepriv, _FW_LINKED) == true)
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_indicate_disconnect(padapter); /* will clr Linked_state; before this function, we must have checked whether issue dis-assoc_cmd or not */
}
@@ -340,14 +338,13 @@ u8 rtw_set_802_11_infrastructure_mode(struct adapter *padapter,
return true;
}
u8 rtw_set_802_11_disassociate(struct adapter *padapter)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, _FW_LINKED) == true) {
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
rtw_disassoc_cmd(padapter, 0, true);
rtw_indicate_disconnect(padapter);
/* modify for CONFIG_IEEE80211W, none 11w can use it */
@@ -369,7 +366,7 @@ u8 rtw_set_802_11_bssid_list_scan(struct adapter *padapter, struct ndis_802_11_s
res = false;
goto exit;
}
if (padapter->hw_init_completed == false) {
if (!padapter->hw_init_completed) {
res = false;
goto exit;
}
@@ -417,7 +414,6 @@ u8 rtw_set_802_11_authentication_mode(struct adapter *padapter, enum ndis_802_11
u8 rtw_set_802_11_add_wep(struct adapter *padapter, struct ndis_802_11_wep *wep)
{
signed int keyid, res;
struct security_priv *psecuritypriv = &(padapter->securitypriv);
u8 ret = _SUCCESS;
@@ -471,8 +467,8 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter)
struct sta_info *psta = NULL;
u8 short_GI = 0;
if ((check_fwstate(pmlmepriv, _FW_LINKED) != true)
&& (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != true))
if (!check_fwstate(pmlmepriv, _FW_LINKED) &&
!check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))
return 0;
psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv));

68
drivers/staging/rtl8723bs/core/rtw_mlme.c
View File

@@ -351,9 +351,6 @@ int is_same_network(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst, u8 fea
u16 s_cap, d_cap;
__le16 tmps, tmpd;
if (rtw_bug_check(dst, src, &s_cap, &d_cap) == false)
return false;
memcpy((u8 *)&tmps, rtw_get_capability_from_ie(src->ies), 2);
memcpy((u8 *)&tmpd, rtw_get_capability_from_ie(dst->ies), 2);
@@ -457,11 +454,6 @@ static void update_current_network(struct adapter *adapter, struct wlan_bssid_ex
{
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
rtw_bug_check(&pmlmepriv->cur_network.network,
&pmlmepriv->cur_network.network,
&pmlmepriv->cur_network.network,
&pmlmepriv->cur_network.network);
if (check_fwstate(pmlmepriv, _FW_LINKED) && (is_same_network(&pmlmepriv->cur_network.network, pnetwork, 0))) {
update_network(&pmlmepriv->cur_network.network, pnetwork, adapter, true);
if (pmlmepriv->cur_network.network.ie_length < sizeof(struct ndis_802_11_fix_ie))
@@ -489,8 +481,6 @@ void rtw_update_scanned_network(struct adapter *adapter, struct wlan_bssid_ex *t
list_for_each(plist, phead) {
pnetwork = list_entry(plist, struct wlan_network, list);
rtw_bug_check(pnetwork, pnetwork, pnetwork, pnetwork);
if (is_same_network(&pnetwork->network, target, feature)) {
target_find = 1;
break;
@@ -611,6 +601,7 @@ static bool rtw_is_desired_network(struct adapter *adapter, struct wlan_network
else
return false;
}
if (adapter->registrypriv.wifi_spec == 1) { /* for correct flow of 8021X to do.... */
u8 *p = NULL;
uint ie_len = 0;
@@ -752,18 +743,18 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf)
rtw_indicate_connect(adapter);
} else {
if (rtw_to_roam(adapter) != 0) {
if (rtw_dec_to_roam(adapter) == 0
|| _SUCCESS != rtw_sitesurvey_cmd(adapter, &pmlmepriv->assoc_ssid, 1, NULL, 0)
) {
if (rtw_dec_to_roam(adapter) == 0 ||
rtw_sitesurvey_cmd(adapter, &pmlmepriv->assoc_ssid,
1, NULL, 0) != _SUCCESS) {
rtw_set_to_roam(adapter, 0);
rtw_free_assoc_resources(adapter, 1);
rtw_indicate_disconnect(adapter);
} else {
pmlmepriv->to_join = true;
}
} else
} else {
rtw_indicate_disconnect(adapter);
}
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
}
@@ -1294,7 +1285,7 @@ void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf)
struct wlan_network *cur_network = &pmlmepriv->cur_network;
struct wlan_network *ptarget_wlan = NULL;
if (rtw_access_ctrl(adapter, pstassoc->macaddr) == false)
if (!rtw_access_ctrl(adapter, pstassoc->macaddr))
return;
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
@@ -1400,7 +1391,7 @@ void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf)
u16 media_status;
media_status = (mac_id << 8) | 0; /* MACID|OPMODE:0 means disconnect */
/* for STA, AP, ADHOC mode, report disconnect stauts to FW */
/* for STA, AP, ADHOC mode, report disconnect status to FW */
rtw_hal_set_hwreg(adapter, HW_VAR_H2C_MEDIA_STATUS_RPT, (u8 *)&media_status);
}
@@ -1576,15 +1567,17 @@ void rtw_mlme_reset_auto_scan_int(struct adapter *adapter)
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
if (pmlmeinfo->VHT_enable) /* disable auto scan when connect to 11AC AP */
if (pmlmeinfo->VHT_enable) {
/* disable auto scan when connect to 11AC AP */
mlme->auto_scan_int_ms = 0;
else if (adapter->registrypriv.wifi_spec && is_client_associated_to_ap(adapter) == true)
} else if (adapter->registrypriv.wifi_spec && is_client_associated_to_ap(adapter)) {
mlme->auto_scan_int_ms = 60 * 1000;
else if (rtw_chk_roam_flags(adapter, RTW_ROAM_ACTIVE)) {
} else if (rtw_chk_roam_flags(adapter, RTW_ROAM_ACTIVE)) {
if (check_fwstate(mlme, WIFI_STATION_STATE) && check_fwstate(mlme, _FW_LINKED))
mlme->auto_scan_int_ms = mlme->roam_scan_int_ms;
} else
} else {
mlme->auto_scan_int_ms = 0; /* disabled */
}
}
static void rtw_auto_scan_handler(struct adapter *padapter)
@@ -1680,10 +1673,10 @@ static int rtw_check_roaming_candidate(struct mlme_priv *mlme
int updated = false;
struct adapter *adapter = container_of(mlme, struct adapter, mlmepriv);
if (is_same_ess(&competitor->network, &mlme->cur_network.network) == false)
if (!is_same_ess(&competitor->network, &mlme->cur_network.network))
goto exit;
if (rtw_is_desired_network(adapter, competitor) == false)
if (!rtw_is_desired_network(adapter, competitor))
goto exit;
/* got specific addr to roam */
@@ -1719,7 +1712,7 @@ int rtw_select_roaming_candidate(struct mlme_priv *mlme)
struct wlan_network *candidate = NULL;
if (!mlme->cur_network_scanned) {
rtw_warn_on(1);
WARN_ON(1);
return ret;
}
@@ -1775,13 +1768,13 @@ static int rtw_check_join_candidate(struct mlme_priv *mlme
goto exit;
}
if (rtw_is_desired_network(adapter, competitor) == false)
if (!rtw_is_desired_network(adapter, competitor))
goto exit;
if (rtw_to_roam(adapter) > 0) {
if (jiffies_to_msecs(jiffies - competitor->last_scanned) >= mlme->roam_scanr_exp_ms
|| is_same_ess(&competitor->network, &mlme->cur_network.network) == false
)
if (jiffies_to_msecs(jiffies - competitor->last_scanned) >=
mlme->roam_scanr_exp_ms ||
!is_same_ess(&competitor->network, &mlme->cur_network.network))
goto exit;
}
@@ -2219,19 +2212,19 @@ void rtw_ht_use_default_setting(struct adapter *padapter)
else
phtpriv->bss_coexist = 0;
phtpriv->sgi_40m = TEST_FLAG(pregistrypriv->short_gi, BIT1) ? true : false;
phtpriv->sgi_20m = TEST_FLAG(pregistrypriv->short_gi, BIT0) ? true : false;
phtpriv->sgi_40m = TEST_FLAG(pregistrypriv->short_gi, BIT(1)) ? true : false;
phtpriv->sgi_20m = TEST_FLAG(pregistrypriv->short_gi, BIT(0)) ? true : false;
/* LDPC support */
rtw_hal_get_def_var(padapter, HAL_DEF_RX_LDPC, (u8 *)&bHwLDPCSupport);
CLEAR_FLAGS(phtpriv->ldpc_cap);
if (bHwLDPCSupport) {
if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT4))
if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT(4)))
SET_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_RX);
}
rtw_hal_get_def_var(padapter, HAL_DEF_TX_LDPC, (u8 *)&bHwLDPCSupport);
if (bHwLDPCSupport) {
if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT5))
if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT(5)))
SET_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX);
}
@@ -2239,12 +2232,12 @@ void rtw_ht_use_default_setting(struct adapter *padapter)
rtw_hal_get_def_var(padapter, HAL_DEF_TX_STBC, (u8 *)&bHwSTBCSupport);
CLEAR_FLAGS(phtpriv->stbc_cap);
if (bHwSTBCSupport) {
if (TEST_FLAG(pregistrypriv->stbc_cap, BIT5))
if (TEST_FLAG(pregistrypriv->stbc_cap, BIT(5)))
SET_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX);
}
rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)&bHwSTBCSupport);
if (bHwSTBCSupport) {
if (TEST_FLAG(pregistrypriv->stbc_cap, BIT4))
if (TEST_FLAG(pregistrypriv->stbc_cap, BIT(4)))
SET_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX);
}
@@ -2252,10 +2245,10 @@ void rtw_ht_use_default_setting(struct adapter *padapter)
rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer);
rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&bHwSupportBeamformee);
CLEAR_FLAGS(phtpriv->beamform_cap);
if (TEST_FLAG(pregistrypriv->beamform_cap, BIT4) && bHwSupportBeamformer)
if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(4)) && bHwSupportBeamformer)
SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMER_ENABLE);
if (TEST_FLAG(pregistrypriv->beamform_cap, BIT5) && bHwSupportBeamformee)
if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(5)) && bHwSupportBeamformee)
SET_FLAG(phtpriv->beamform_cap, BEAMFORMING_HT_BEAMFORMEE_ENABLE);
}
@@ -2304,9 +2297,10 @@ unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie, u8 *out_
operation_bw = padapter->mlmeextpriv.cur_bwmode;
if (operation_bw > CHANNEL_WIDTH_40)
operation_bw = CHANNEL_WIDTH_40;
} else
} else {
/* TDLS: TODO 40? */
operation_bw = CHANNEL_WIDTH_40;
}
} else {
p = rtw_get_ie(in_ie, WLAN_EID_HT_OPERATION, &ielen, in_len);
if (p && (ielen == sizeof(struct ieee80211_ht_addt_info))) {

172
drivers/staging/rtl8723bs/core/rtw_mlme_ext.c
View File

@@ -272,7 +272,6 @@ static void init_channel_list(struct adapter *padapter, struct rt_channel_info *
u8 chanset_size,
struct p2p_channels *channel_list)
{
static const struct p2p_oper_class_map op_class[] = {
{ IEEE80211G, 81, 1, 13, 1, BW20 },
{ IEEE80211G, 82, 14, 14, 1, BW20 },
@@ -317,7 +316,6 @@ static void init_channel_list(struct adapter *padapter, struct rt_channel_info *
}
}
channel_list->reg_classes = cla;
}
static u8 init_channel_set(struct adapter *padapter, u8 ChannelPlan, struct rt_channel_info *channel_set)
@@ -398,10 +396,6 @@ void init_mlme_ext_priv(struct adapter *padapter)
pmlmeext->chan_scan_time = SURVEY_TO;
pmlmeext->mlmeext_init = true;
pmlmeext->active_keep_alive_check = true;
#ifdef DBG_FIXED_CHAN
pmlmeext->fixed_chan = 0xFF;
#endif
}
void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext)
@@ -512,15 +506,14 @@ unsigned int OnProbeReq(struct adapter *padapter, union recv_frame *precv_frame)
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
return _SUCCESS;
if (check_fwstate(pmlmepriv, _FW_LINKED) == false &&
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE) == false) {
if (!check_fwstate(pmlmepriv, _FW_LINKED) &&
!check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_AP_STATE)) {
return _SUCCESS;
}
p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, WLAN_EID_SSID, (int *)&ielen,
len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_);
/* check (wildcard) SSID */
if (p) {
if (is_valid_p2p_probereq)
@@ -539,7 +532,6 @@ unsigned int OnProbeReq(struct adapter *padapter, union recv_frame *precv_frame)
}
return _SUCCESS;
}
unsigned int OnProbeRsp(struct adapter *padapter, union recv_frame *precv_frame)
@@ -552,7 +544,6 @@ unsigned int OnProbeRsp(struct adapter *padapter, union recv_frame *precv_frame)
}
return _SUCCESS;
}
unsigned int OnBeacon(struct adapter *padapter, union recv_frame *precv_frame)
@@ -665,7 +656,6 @@ unsigned int OnBeacon(struct adapter *padapter, union recv_frame *precv_frame)
_END_ONBEACON_:
return _SUCCESS;
}
unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame)
@@ -725,14 +715,13 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame)
goto auth_fail;
}
if (rtw_access_ctrl(padapter, sa) == false) {
if (!rtw_access_ctrl(padapter, sa)) {
status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA;
goto auth_fail;
}
pstat = rtw_get_stainfo(pstapriv, sa);
if (!pstat) {
/* allocate a new one */
pstat = rtw_alloc_stainfo(pstapriv, sa);
if (!pstat) {
@@ -746,9 +735,8 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame)
/* pstat->flags = 0; */
/* pstat->capability = 0; */
} else {
spin_lock_bh(&pstapriv->asoc_list_lock);
if (list_empty(&pstat->asoc_list) == false) {
if (!list_empty(&pstat->asoc_list)) {
list_del_init(&pstat->asoc_list);
pstapriv->asoc_list_cnt--;
if (pstat->expire_to > 0) {
@@ -764,7 +752,6 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame)
spin_lock_bh(&pstapriv->auth_list_lock);
if (list_empty(&pstat->auth_list)) {
list_add_tail(&pstat->auth_list, &pstapriv->auth_list);
pstapriv->auth_list_cnt++;
}
@@ -773,7 +760,6 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame)
if (pstat->auth_seq == 0)
pstat->expire_to = pstapriv->auth_to;
if ((pstat->auth_seq + 1) != seq) {
status = WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION;
goto auth_fail;
@@ -798,7 +784,6 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame)
pstat->state |= WIFI_FW_AUTH_STATE;
pstat->authalg = algorithm;
} else if (seq == 3) {
p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + 4 + _AUTH_IE_OFFSET_, WLAN_EID_CHALLENGE, (int *)&ie_len,
len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_ - 4);
@@ -822,7 +807,6 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame)
}
}
/* Now, we are going to issue_auth... */
pstat->auth_seq = seq + 1;
@@ -831,7 +815,6 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame)
if (pstat->state & WIFI_FW_AUTH_SUCCESS)
pstat->auth_seq = 0;
return _SUCCESS;
auth_fail:
@@ -847,7 +830,6 @@ unsigned int OnAuth(struct adapter *padapter, union recv_frame *precv_frame)
issue_auth(padapter, pstat, (unsigned short)status);
return _FAIL;
}
unsigned int OnAuthClient(struct adapter *padapter, union recv_frame *precv_frame)
@@ -924,7 +906,6 @@ unsigned int OnAuthClient(struct adapter *padapter, union recv_frame *precv_fram
/* pmlmeinfo->state &= ~(WIFI_FW_AUTH_STATE); */
return _FAIL;
}
unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
@@ -958,7 +939,6 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
else /* WIFI_REASSOCREQ */
ie_offset = _REASOCREQ_IE_OFFSET_;
if (pkt_len < sizeof(struct ieee80211_hdr_3addr) + ie_offset)
return _FAIL;
@@ -988,7 +968,6 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
pstat->state |= WIFI_FW_ASSOC_STATE;
}
pstat->capability = capab_info;
/* now parse all ieee802_11 ie to point to elems */
@@ -1038,7 +1017,6 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, WLAN_EID_EXT_SUPP_RATES, &ie_len,
pkt_len - WLAN_HDR_A3_LEN - ie_offset);
if (p) {
if (support_rate_num + ie_len <= sizeof(supportRate)) {
memcpy(supportRate + support_rate_num, p + 2, ie_len);
support_rate_num += ie_len;
@@ -1063,7 +1041,6 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
pstat->wpa2_pairwise_cipher = 0;
memset(pstat->wpa_ie, 0, sizeof(pstat->wpa_ie));
if ((psecuritypriv->wpa_psk & BIT(1)) && elems.rsn_ie) {
int group_cipher = 0, pairwise_cipher = 0;
wpa_ie = elems.rsn_ie;
@@ -1086,7 +1063,6 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
}
} else if ((psecuritypriv->wpa_psk & BIT(0)) && elems.wpa_ie) {
int group_cipher = 0, pairwise_cipher = 0;
wpa_ie = elems.wpa_ie;
@@ -1124,7 +1100,6 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
else
pstat->flags |= WLAN_STA_MAYBE_WPS;
/* AP support WPA/RSN, and sta is going to do WPS, but AP is not ready */
/* that the selected registrar of AP is _FLASE */
if ((psecuritypriv->wpa_psk > 0)
@@ -1149,7 +1124,6 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
status = WLAN_STATUS_INVALID_IE;
goto OnAssocReqFail;
}
if (elems.wps_ie) {
@@ -1159,13 +1133,10 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
copy_len = min(sizeof(pstat->wpa_ie), wpa_ie_len + 2u);
}
if (copy_len > 0)
memcpy(pstat->wpa_ie, wpa_ie-2, copy_len);
}
/* check if there is WMM IE & support WWM-PS */
pstat->flags &= ~WLAN_STA_WME;
pstat->qos_option = 0;
@@ -1219,7 +1190,6 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
pstat->uapsd_be = BIT(0)|BIT(1);
else
pstat->uapsd_be = 0;
}
break;
@@ -1238,13 +1208,11 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
} else
pstat->flags &= ~WLAN_STA_HT;
if ((pmlmepriv->htpriv.ht_option == false) && (pstat->flags&WLAN_STA_HT)) {
if (!pmlmepriv->htpriv.ht_option && (pstat->flags&WLAN_STA_HT)) {
status = WLAN_STATUS_CHALLENGE_FAIL;
goto OnAssocReqFail;
}
if ((pstat->flags & WLAN_STA_HT) &&
((pstat->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) ||
(pstat->wpa_pairwise_cipher&WPA_CIPHER_TKIP))) {
@@ -1278,20 +1246,17 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame)
/* if (pstat->aid > NUM_STA) { */
if (pstat->aid > pstapriv->max_num_sta) {
pstat->aid = 0;
status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA;
goto OnAssocReqFail;
} else {
pstapriv->sta_aid[pstat->aid - 1] = pstat;
}
}
pstat->state &= (~WIFI_FW_ASSOC_STATE);
pstat->state |= WIFI_FW_ASSOC_SUCCESS;
@@ -1474,18 +1439,16 @@ unsigned int OnDeAuth(struct adapter *padapter, union recv_frame *precv_frame)
u8 updated = false;
spin_lock_bh(&pstapriv->asoc_list_lock);
if (list_empty(&psta->asoc_list) == false) {
if (!list_empty(&psta->asoc_list)) {
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
updated = ap_free_sta(padapter, psta, false, reason);
}
spin_unlock_bh(&pstapriv->asoc_list_lock);
associated_clients_update(padapter, updated);
}
return _SUCCESS;
}
@@ -1546,11 +1509,10 @@ unsigned int OnDisassoc(struct adapter *padapter, union recv_frame *precv_frame)
u8 updated = false;
spin_lock_bh(&pstapriv->asoc_list_lock);
if (list_empty(&psta->asoc_list) == false) {
if (!list_empty(&psta->asoc_list)) {
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
updated = ap_free_sta(padapter, psta, false, reason);
}
spin_unlock_bh(&pstapriv->asoc_list_lock);
@@ -1567,7 +1529,6 @@ unsigned int OnDisassoc(struct adapter *padapter, union recv_frame *precv_frame)
pmlmepriv->link_detect_info.busy_traffic = false;
return _SUCCESS;
}
unsigned int OnAtim(struct adapter *padapter, union recv_frame *precv_frame)
@@ -1875,11 +1836,9 @@ unsigned int OnAction(struct adapter *padapter, union recv_frame *precv_frame)
if (category == ptable->num)
ptable->func(padapter, precv_frame);
}
return _SUCCESS;
}
unsigned int DoReserved(struct adapter *padapter, union recv_frame *precv_frame)
@@ -1914,7 +1873,6 @@ static struct xmit_frame *_alloc_mgtxmitframe(struct xmit_priv *pxmitpriv, bool
exit:
return pmgntframe;
}
inline struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv)
@@ -1967,7 +1925,6 @@ void update_mgntframe_attrib(struct adapter *padapter, struct pkt_attrib *pattri
pattrib->retry_ctrl = true;
pattrib->mbssid = 0;
}
void update_mgntframe_attrib_addr(struct adapter *padapter, struct xmit_frame *pmgntframe)
@@ -2115,7 +2072,6 @@ void issue_beacon(struct adapter *padapter, int timeout_ms)
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
pwlanhdr = (struct ieee80211_hdr *)pframe;
fctrl = &(pwlanhdr->frame_control);
*(fctrl) = 0;
@@ -2158,7 +2114,6 @@ void issue_beacon(struct adapter *padapter, int timeout_ms)
}
goto _issue_bcn;
}
/* below for ad-hoc mode */
@@ -2204,12 +2159,10 @@ void issue_beacon(struct adapter *padapter, int timeout_ms)
pframe = rtw_set_ie(pframe, WLAN_EID_ERP_INFO, 1, &erpinfo, &pattrib->pktlen);
}
/* EXTERNDED SUPPORTED RATE */
if (rate_len > 8)
pframe = rtw_set_ie(pframe, WLAN_EID_EXT_SUPP_RATES, (rate_len - 8), (cur_network->supported_rates + 8), &pattrib->pktlen);
/* todo:HT for adhoc */
_issue_bcn:
@@ -2227,7 +2180,6 @@ void issue_beacon(struct adapter *padapter, int timeout_ms)
dump_mgntframe_and_wait(padapter, pmgntframe, timeout_ms);
else
dump_mgntframe(padapter, pmgntframe);
}
void issue_probersp(struct adapter *padapter, unsigned char *da, u8 is_valid_p2p_probereq)
@@ -2281,7 +2233,6 @@ void issue_probersp(struct adapter *padapter, unsigned char *da, u8 is_valid_p2p
pattrib->pktlen = pattrib->hdrlen;
pframe += pattrib->hdrlen;
if (cur_network->ie_length > MAX_IE_SZ)
return;
@@ -2405,23 +2356,16 @@ void issue_probersp(struct adapter *padapter, unsigned char *da, u8 is_valid_p2p
pframe = rtw_set_ie(pframe, WLAN_EID_ERP_INFO, 1, &erpinfo, &pattrib->pktlen);
}
/* EXTERNDED SUPPORTED RATE */
if (rate_len > 8)
pframe = rtw_set_ie(pframe, WLAN_EID_EXT_SUPP_RATES, (rate_len - 8), (cur_network->supported_rates + 8), &pattrib->pktlen);
/* todo:HT for adhoc */
}
pattrib->last_txcmdsz = pattrib->pktlen;
dump_mgntframe(padapter, pmgntframe);
return;
}
static int _issue_probereq(struct adapter *padapter,
@@ -2449,7 +2393,6 @@ static int _issue_probereq(struct adapter *padapter,
pattrib = &pmgntframe->attrib;
update_mgntframe_attrib(padapter, pattrib);
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
@@ -2593,7 +2536,6 @@ void issue_auth(struct adapter *padapter, struct sta_info *psta, unsigned short
pframe += sizeof(struct ieee80211_hdr_3addr);
pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
if (psta) { /* for AP mode */
memcpy(pwlanhdr->addr1, psta->hwaddr, ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
@@ -2654,7 +2596,6 @@ void issue_auth(struct adapter *padapter, struct sta_info *psta, unsigned short
le_tmp = cpu_to_le16(pmlmeinfo->auth_seq);
pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&le_tmp, &(pattrib->pktlen));
/* setting status code... */
le_tmp = cpu_to_le16(status);
pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&le_tmp, &(pattrib->pktlen));
@@ -2672,9 +2613,7 @@ void issue_auth(struct adapter *padapter, struct sta_info *psta, unsigned short
pattrib->icv_len = 4;
pattrib->pktlen += pattrib->icv_len;
}
}
pattrib->last_txcmdsz = pattrib->pktlen;
@@ -2683,7 +2622,6 @@ void issue_auth(struct adapter *padapter, struct sta_info *psta, unsigned short
dump_mgntframe(padapter, pmgntframe);
}
void issue_asocrsp(struct adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type)
{
struct xmit_frame *pmgntframe;
@@ -2708,7 +2646,6 @@ void issue_asocrsp(struct adapter *padapter, unsigned short status, struct sta_i
pattrib = &pmgntframe->attrib;
update_mgntframe_attrib(padapter, pattrib);
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
@@ -2721,7 +2658,6 @@ void issue_asocrsp(struct adapter *padapter, unsigned short status, struct sta_i
memcpy(GetAddr2Ptr(pwlanhdr), myid(&(padapter->eeprompriv)), ETH_ALEN);
memcpy(GetAddr3Ptr(pwlanhdr), get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
pmlmeext->mgnt_seq++;
if ((pkt_type == WIFI_ASSOCRSP) || (pkt_type == WIFI_REASSOCRSP))
@@ -2771,7 +2707,6 @@ void issue_asocrsp(struct adapter *padapter, unsigned short status, struct sta_i
pframe += (ie_len+2);
pattrib->pktlen += (ie_len+2);
}
}
/* FILL WMM IE */
@@ -2792,7 +2727,6 @@ void issue_asocrsp(struct adapter *padapter, unsigned short status, struct sta_i
if (!pbuf || ie_len == 0)
break;
}
}
if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK)
@@ -2880,7 +2814,6 @@ void issue_assocreq(struct adapter *padapter)
if (pmlmeext->cur_channel == 14) /* for JAPAN, channel 14 can only uses B Mode(CCK) */
sta_bssrate_len = 4;
/* for (i = 0; i < sta_bssrate_len; i++) { */
/* */
@@ -2889,12 +2822,10 @@ void issue_assocreq(struct adapter *padapter)
break;
}
for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
if (pmlmeinfo->network.supported_rates[i] == 0)
break;
/* Check if the AP's supported rates are also supported by STA. */
for (j = 0; j < sta_bssrate_len; j++) {
/* Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP */
@@ -2916,7 +2847,6 @@ void issue_assocreq(struct adapter *padapter)
goto exit; /* don't connect to AP if no joint supported rate */
}
if (bssrate_len > 8) {
pframe = rtw_set_ie(pframe, WLAN_EID_SUPP_RATES, 8, bssrate, &(pattrib->pktlen));
pframe = rtw_set_ie(pframe, WLAN_EID_EXT_SUPP_RATES, (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen));
@@ -2973,7 +2903,6 @@ void issue_assocreq(struct adapter *padapter)
if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK)
pframe = rtw_set_ie(pframe, WLAN_EID_VENDOR_SPECIFIC, 6, REALTEK_96B_IE, &(pattrib->pktlen));
pattrib->last_txcmdsz = pattrib->pktlen;
dump_mgntframe(padapter, pmgntframe);
@@ -3070,7 +2999,6 @@ int issue_nulldata(struct adapter *padapter, unsigned char *da, unsigned int pow
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct sta_info *psta;
/* da == NULL, assume it's null data for sta to ap*/
if (!da)
da = get_my_bssid(&(pmlmeinfo->network));
@@ -3082,7 +3010,7 @@ int issue_nulldata(struct adapter *padapter, unsigned char *da, unsigned int pow
else
rtw_hal_macid_wakeup(padapter, psta->mac_id);
} else {
rtw_warn_on(1);
WARN_ON(1);
}
do {
@@ -3120,7 +3048,6 @@ s32 issue_nulldata_in_interrupt(struct adapter *padapter, u8 *da)
struct mlme_ext_priv *pmlmeext;
struct mlme_ext_info *pmlmeinfo;
pmlmeext = &padapter->mlmeextpriv;
pmlmeinfo = &pmlmeext->mlmext_info;
@@ -3289,7 +3216,6 @@ static int _issue_deauth(struct adapter *padapter, unsigned char *da,
pattrib->last_txcmdsz = pattrib->pktlen;
if (wait_ack) {
ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe);
} else {
@@ -3611,7 +3537,6 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter)
pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
/* */
if (pmlmepriv->num_FortyMHzIntolerant > 0) {
u8 iedata = 0;
@@ -3619,10 +3544,8 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter)
iedata |= BIT(2);/* 20 MHz BSS Width Request */
pframe = rtw_set_ie(pframe, WLAN_EID_BSS_COEX_2040, 1, &iedata, &(pattrib->pktlen));
}
/* */
memset(ICS, 0, sizeof(ICS));
if (pmlmepriv->num_sta_no_ht > 0) {
@@ -3658,12 +3581,10 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter)
if (ICS[0][0] == 0)
ICS[0][0] = 1;
}
}
spin_unlock_bh(&(pmlmepriv->scanned_queue.lock));
for (i = 0; i < 8; i++) {
int j, k = 0;
@@ -3686,12 +3607,9 @@ static void issue_action_BSSCoexistPacket(struct adapter *padapter)
}
pframe = rtw_set_ie(pframe, WLAN_EID_BSS_INTOLERANT_CHL_REPORT, k, InfoContent, &(pattrib->pktlen));
}
}
pattrib->last_txcmdsz = pattrib->pktlen;
dump_mgntframe(padapter, pmgntframe);
@@ -3728,13 +3646,11 @@ unsigned int send_delba(struct adapter *padapter, u8 initiator, u8 *addr)
issue_action_BA(padapter, addr, WLAN_ACTION_DELBA, (((tid << 1) | initiator)&0x1F));
psta->htpriv.agg_enable_bitmap &= ~BIT(tid);
psta->htpriv.candidate_tid_bitmap &= ~BIT(tid);
}
}
}
return _SUCCESS;
}
unsigned int send_beacon(struct adapter *padapter)
@@ -3787,25 +3703,11 @@ void site_survey(struct adapter *padapter)
}
if (survey_channel != 0) {
/* PAUSE 4-AC Queue when site_survey */
/* rtw_hal_get_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); */
/* val8 |= 0x0f; */
/* rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); */
if (pmlmeext->sitesurvey_res.channel_idx == 0) {
#ifdef DBG_FIXED_CHAN
if (pmlmeext->fixed_chan != 0xff)
set_channel_bwmode(padapter, pmlmeext->fixed_chan, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
else
#endif
set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
} else {
#ifdef DBG_FIXED_CHAN
if (pmlmeext->fixed_chan != 0xff)
r8723bs_select_channel(padapter, pmlmeext->fixed_chan);
else
#endif
r8723bs_select_channel(padapter, survey_channel);
}
if (pmlmeext->sitesurvey_res.channel_idx == 0)
set_channel_bwmode(padapter, survey_channel,
HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
else
r8723bs_select_channel(padapter, survey_channel);
if (ScanType == SCAN_ACTIVE) { /* obey the channel plan setting... */
{
@@ -3839,7 +3741,6 @@ void site_survey(struct adapter *padapter)
set_survey_timer(pmlmeext, channel_scan_time_ms);
} else {
/* channel number is 0 or this channel is not valid. */
{
@@ -3879,9 +3780,6 @@ void site_survey(struct adapter *padapter)
issue_action_BSSCoexistPacket(padapter);
}
}
return;
}
/* collect bss info from Beacon and Probe request/response frames. */
@@ -4092,7 +3990,6 @@ void start_create_ibss(struct adapter *padapter)
}
/* update bc/mc sta_info */
update_bmc_sta(padapter);
}
void start_clnt_join(struct adapter *padapter)
@@ -4151,7 +4048,6 @@ void start_clnt_join(struct adapter *padapter)
} else {
return;
}
}
void start_clnt_auth(struct adapter *padapter)
@@ -4170,15 +4066,12 @@ void start_clnt_auth(struct adapter *padapter)
pmlmeinfo->link_count = 0;
pmlmeext->retry = 0;
netdev_dbg(padapter->pnetdev, "start auth\n");
issue_auth(padapter, NULL, 0);
set_link_timer(pmlmeext, REAUTH_TO);
}
void start_clnt_assoc(struct adapter *padapter)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
@@ -4225,7 +4118,6 @@ static void process_80211d(struct adapter *padapter, struct wlan_bssid_ex *bssid
u8 channel;
u8 i;
pregistrypriv = &padapter->registrypriv;
pmlmeext = &padapter->mlmeextpriv;
@@ -4311,7 +4203,6 @@ static void process_80211d(struct adapter *padapter, struct wlan_bssid_ex *bssid
while ((i < MAX_CHANNEL_NUM) &&
(chplan_sta[i].ChannelNum != 0) &&
(chplan_sta[i].ChannelNum <= 14)) {
chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum;
chplan_new[k].ScanType = SCAN_PASSIVE;
i++;
@@ -4416,9 +4307,6 @@ void report_survey_event(struct adapter *padapter, union recv_frame *precv_frame
rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
pmlmeext->sitesurvey_res.bss_cnt++;
return;
}
void report_surveydone_event(struct adapter *padapter)
@@ -4460,9 +4348,6 @@ void report_surveydone_event(struct adapter *padapter)
psurveydone_evt->bss_cnt = pmlmeext->sitesurvey_res.bss_cnt;
rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
return;
}
void report_join_res(struct adapter *padapter, int res)
@@ -4505,14 +4390,9 @@ void report_join_res(struct adapter *padapter, int res)
memcpy((unsigned char *)(&(pjoinbss_evt->network.network)), &(pmlmeinfo->network), sizeof(struct wlan_bssid_ex));
pjoinbss_evt->network.join_res = pjoinbss_evt->network.aid = res;
rtw_joinbss_event_prehandle(padapter, (u8 *)&pjoinbss_evt->network);
rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
return;
}
void report_wmm_edca_update(struct adapter *padapter)
@@ -4554,9 +4434,6 @@ void report_wmm_edca_update(struct adapter *padapter)
pwmm_event->wmm = 0;
rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
return;
}
void report_del_sta_event(struct adapter *padapter, unsigned char *MacAddr, unsigned short reason)
@@ -4600,7 +4477,6 @@ void report_del_sta_event(struct adapter *padapter, unsigned char *MacAddr, unsi
memcpy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr, ETH_ALEN);
memcpy((unsigned char *)(pdel_sta_evt->rsvd), (unsigned char *)(&reason), 2);
psta = rtw_get_stainfo(&padapter->stapriv, MacAddr);
if (psta)
mac_id = (int)psta->mac_id;
@@ -4695,7 +4571,6 @@ void update_sta_info(struct adapter *padapter, struct sta_info *psta)
psta->htpriv.sgi_20m = false;
psta->htpriv.sgi_40m = false;
psta->qos_option = false;
}
psta->htpriv.ch_offset = pmlmeext->cur_ch_offset;
@@ -4714,7 +4589,6 @@ void update_sta_info(struct adapter *padapter, struct sta_info *psta)
spin_lock_bh(&psta->lock);
psta->state = _FW_LINKED;
spin_unlock_bh(&psta->lock);
}
static void rtw_mlmeext_disconnect(struct adapter *padapter)
@@ -4760,7 +4634,6 @@ static void rtw_mlmeext_disconnect(struct adapter *padapter)
pmlmepriv->link_detect_info.traffic_transition_count = 0;
pmlmepriv->link_detect_info.low_power_transition_count = 0;
}
void mlmeext_joinbss_event_callback(struct adapter *padapter, int join_res)
@@ -4784,7 +4657,6 @@ void mlmeext_joinbss_event_callback(struct adapter *padapter, int join_res)
/* update bc/mc sta_info */
update_bmc_sta(padapter);
/* turn on dynamic functions */
Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, true);
@@ -4868,7 +4740,6 @@ void mlmeext_sta_add_event_callback(struct adapter *padapter, struct sta_info *p
}
pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
}
join_type = 2;
@@ -4910,7 +4781,6 @@ void _linked_info_dump(struct adapter *padapter)
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
if (padapter->bLinkInfoDump) {
if ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)
rtw_hal_get_def_var(padapter,
HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
@@ -4973,7 +4843,7 @@ void linked_status_chk(struct adapter *padapter)
/* todo: To check why we under miracast session, rx_chk would be false */
psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.mac_address);
if (psta) {
if (chk_ap_is_alive(padapter, psta) == false)
if (!chk_ap_is_alive(padapter, psta))
rx_chk = _FAIL;
if (pxmitpriv->last_tx_pkts == pxmitpriv->tx_pkts)
@@ -5097,7 +4967,6 @@ void link_timer_hdl(struct timer_list *t)
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) {
pmlmeinfo->state = WIFI_FW_NULL_STATE;
report_join_res(padapter, -3);
@@ -5138,7 +5007,6 @@ void addba_timer_hdl(struct timer_list *t)
if (phtpriv->ht_option && phtpriv->ampdu_enable) {
if (phtpriv->candidate_tid_bitmap)
phtpriv->candidate_tid_bitmap = 0x0;
}
}
@@ -5191,7 +5059,7 @@ u8 setopmode_hdl(struct adapter *padapter, u8 *pbuf)
if (psetop->mode == Ndis802_11APMode) {
/* Do this after port switch to */
/* prevent from downloading rsvd page to wrong port */
rtw_btcoex_MediaStatusNotify(padapter, 1); /* connect */
rtw_btcoex_media_status_notify(padapter, 1); /* connect */
}
return H2C_SUCCESS;
@@ -5247,11 +5115,9 @@ u8 createbss_hdl(struct adapter *padapter, u8 *pbuf)
memcpy(pnetwork->ies, ((struct wlan_bssid_ex *)pbuf)->ies, pnetwork->ie_length);
start_create_ibss(padapter);
}
return H2C_SUCCESS;
}
u8 join_cmd_hdl(struct adapter *padapter, u8 *pbuf)
@@ -5283,7 +5149,6 @@ u8 join_cmd_hdl(struct adapter *padapter, u8 *pbuf)
/* set_msr(padapter, _HW_STATE_NOLINK_); */
set_msr(padapter, _HW_STATE_STATION_);
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, NULL);
}
@@ -5395,7 +5260,6 @@ u8 join_cmd_hdl(struct adapter *padapter, u8 *pbuf)
start_clnt_join(padapter);
return H2C_SUCCESS;
}
u8 disconnect_hdl(struct adapter *padapter, unsigned char *pbuf)
@@ -5435,7 +5299,6 @@ static int rtw_scan_ch_decision(struct adapter *padapter, struct rtw_ieee80211_c
/* acquire channels from in */
j = 0;
for (i = 0; i < in_num; i++) {
set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, in[i].hw_value);
if (in[i].hw_value && !(in[i].flags & RTW_IEEE80211_CHAN_DISABLED)
&& set_idx >= 0
@@ -5461,7 +5324,6 @@ static int rtw_scan_ch_decision(struct adapter *padapter, struct rtw_ieee80211_c
/* if out is empty, use channel_set as default */
if (j == 0) {
for (i = 0; i < pmlmeext->max_chan_nums; i++) {
if (j >= out_num) {
netdev_dbg(padapter->pnetdev,
FUNC_ADPT_FMT " out_num:%u not enough\n",
@@ -5592,7 +5454,7 @@ u8 setkey_hdl(struct adapter *padapter, u8 *pbuf)
else
addr = null_addr;
ctrl = BIT(15) | BIT6 | ((pparm->algorithm) << 2) | pparm->keyid;
ctrl = BIT(15) | BIT(6) | ((pparm->algorithm) << 2) | pparm->keyid;
write_cam(padapter, cam_id, ctrl, addr, pparm->key);
netdev_dbg(padapter->pnetdev,
"set group key camid:%d, addr:%pM, kid:%d, type:%s\n",
@@ -5890,7 +5752,7 @@ int rtw_chk_start_clnt_join(struct adapter *padapter, u8 *ch, u8 *bw, u8 *offset
bool connect_allow = true;
if (!ch || !bw || !offset) {
rtw_warn_on(1);
WARN_ON(1);
connect_allow = false;
}

4
drivers/staging/rtl8723bs/core/rtw_pwrctrl.c
View File

@@ -302,7 +302,7 @@ static u8 PS_RDY_CHECK(struct adapter *padapter)
curr_time = jiffies;
delta_time = curr_time - pwrpriv->DelayLPSLastTimeStamp;
delta_time = curr_time - pwrpriv->delay_lps_last_time_stamp;
if (delta_time < LPS_DELAY_TIME)
return false;
@@ -576,7 +576,7 @@ void LPS_Leave_check(struct adapter *padapter)
*
* This will be called when CPWM interrupt is up.
*
* using to update cpwn of drv; and drv willl make a decision to up or down pwr level
* using to update cpwn of drv; and drv will make a decision to up or down pwr level
*/
void cpwm_int_hdl(struct adapter *padapter, struct reportpwrstate_parm *preportpwrstate)
{

186
drivers/staging/rtl8723bs/core/rtw_recv.c
View File

@@ -21,9 +21,6 @@ void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv)
spin_lock_init(&psta_recvpriv->lock);
/* for (i = 0; i<MAX_RX_NUMBLKS; i++) */
/* _rtw_init_queue(&psta_recvpriv->blk_strms[i]); */
INIT_LIST_HEAD(&psta_recvpriv->defrag_q.queue);
spin_lock_init(&psta_recvpriv->defrag_q.lock);
}
@@ -60,7 +57,6 @@ signed int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *pada
precvframe = (union recv_frame *) precvpriv->precv_frame_buf;
for (i = 0; i < NR_RECVFRAME; i++) {
INIT_LIST_HEAD(&(precvframe->u.list));
@@ -73,7 +69,6 @@ signed int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *pada
precvframe->u.hdr.adapter = padapter;
precvframe++;
}
res = rtw_hal_init_recv_priv(padapter);
@@ -115,15 +110,14 @@ void _rtw_free_recv_priv(struct recv_priv *precvpriv)
union recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue)
{
union recv_frame *precvframe;
struct list_head *plist, *phead;
struct adapter *padapter;
struct recv_priv *precvpriv;
if (list_empty(&pfree_recv_queue->queue))
if (list_empty(&pfree_recv_queue->queue)) {
precvframe = NULL;
else {
} else {
phead = get_list_head(pfree_recv_queue);
plist = get_next(phead);
@@ -180,19 +174,14 @@ int rtw_free_recvframe(union recv_frame *precvframe, struct __queue *pfree_recv_
return _SUCCESS;
}
signed int _rtw_enqueue_recvframe(union recv_frame *precvframe, struct __queue *queue)
{
struct adapter *padapter = precvframe->u.hdr.adapter;
struct recv_priv *precvpriv = &padapter->recvpriv;
/* INIT_LIST_HEAD(&(precvframe->u.hdr.list)); */
list_del_init(&(precvframe->u.hdr.list));
list_add_tail(&(precvframe->u.hdr.list), get_list_head(queue));
if (padapter)
@@ -257,7 +246,6 @@ u32 rtw_free_uc_swdec_pending_queue(struct adapter *adapter)
return cnt;
}
signed int rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, struct __queue *queue)
{
spin_lock_bh(&queue->lock);
@@ -279,7 +267,6 @@ signed int rtw_enqueue_recvbuf(struct recv_buf *precvbuf, struct __queue *queue)
list_add_tail(&precvbuf->list, get_list_head(queue));
spin_unlock_bh(&queue->lock);
return _SUCCESS;
}
struct recv_buf *rtw_dequeue_recvbuf(struct __queue *queue)
@@ -289,9 +276,9 @@ struct recv_buf *rtw_dequeue_recvbuf(struct __queue *queue)
spin_lock_bh(&queue->lock);
if (list_empty(&queue->queue))
if (list_empty(&queue->queue)) {
precvbuf = NULL;
else {
} else {
phead = get_list_head(queue);
plist = get_next(phead);
@@ -299,13 +286,11 @@ struct recv_buf *rtw_dequeue_recvbuf(struct __queue *queue)
precvbuf = container_of(plist, struct recv_buf, list);
list_del_init(&precvbuf->list);
}
spin_unlock_bh(&queue->lock);
return precvbuf;
}
static void rtw_handle_tkip_mic_err(struct adapter *padapter, u8 bgroup)
@@ -354,7 +339,6 @@ static void rtw_handle_tkip_mic_err(struct adapter *padapter, u8 bgroup)
static signed int recvframe_chkmic(struct adapter *adapter, union recv_frame *precvframe)
{
signed int i, res = _SUCCESS;
u32 datalen;
u8 miccode[8];
@@ -382,7 +366,7 @@ static signed int recvframe_chkmic(struct adapter *adapter, union recv_frame *p
/* psecuritypriv->dot118021XGrpKeyid, pmlmeinfo->key_index, rxdata_key_idx); */
if (psecuritypriv->binstallGrpkey == false) {
if (!psecuritypriv->binstallGrpkey) {
res = _FAIL;
goto exit;
}
@@ -405,11 +389,11 @@ static signed int recvframe_chkmic(struct adapter *adapter, union recv_frame *p
bmic_err = true;
}
if (bmic_err == true) {
if (bmic_err) {
/* double check key_index for some timing issue , */
/* cannot compare with psecuritypriv->dot118021XGrpKeyid also cause timing issue */
if ((is_multicast_ether_addr(prxattrib->ra) == true) && (prxattrib->key_index != pmlmeinfo->key_index))
if (is_multicast_ether_addr(prxattrib->ra) &&
(prxattrib->key_index != pmlmeinfo->key_index))
brpt_micerror = false;
if (prxattrib->bdecrypted && brpt_micerror)
@@ -426,18 +410,15 @@ static signed int recvframe_chkmic(struct adapter *adapter, union recv_frame *p
}
recvframe_pull_tail(precvframe, 8);
}
exit:
return res;
}
/* decrypt and set the ivlen, icvlen of the recv_frame */
static union recv_frame *decryptor(struct adapter *padapter, union recv_frame *precv_frame)
{
struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
union recv_frame *return_packet = precv_frame;
@@ -463,7 +444,7 @@ static union recv_frame *decryptor(struct adapter *padapter, union recv_frame *p
}
}
if ((prxattrib->encrypt > 0) && ((prxattrib->bdecrypted == 0) || (psecuritypriv->sw_decrypt == true))) {
if ((prxattrib->encrypt > 0) && ((prxattrib->bdecrypted == 0) || psecuritypriv->sw_decrypt)) {
psecuritypriv->hw_decrypted = false;
switch (prxattrib->encrypt) {
@@ -490,8 +471,9 @@ static union recv_frame *decryptor(struct adapter *padapter, union recv_frame *p
if (res == _FAIL) {
rtw_free_recvframe(return_packet, &padapter->recvpriv.free_recv_queue);
return_packet = NULL;
} else
} else {
prxattrib->bdecrypted = true;
}
return return_packet;
}
@@ -537,9 +519,9 @@ static union recv_frame *portctrl(struct adapter *adapter, union recv_frame *pre
memcpy(&be_tmp, ptr, 2);
ether_type = ntohs(be_tmp);
if (ether_type == eapol_type)
if (ether_type == eapol_type) {
prtnframe = precv_frame;
else {
} else {
/* free this frame */
rtw_free_recvframe(precv_frame, &adapter->recvpriv.free_recv_queue);
prtnframe = NULL;
@@ -558,8 +540,9 @@ static union recv_frame *portctrl(struct adapter *adapter, union recv_frame *pre
/* else { */
/* */
}
} else
} else {
prtnframe = precv_frame;
}
return prtnframe;
}
@@ -582,7 +565,6 @@ static signed int recv_decache(union recv_frame *precv_frame, u8 bretry, struct
prxcache->tid_rxseq[tid] = seq_ctrl;
return _SUCCESS;
}
static void process_pwrbit_data(struct adapter *padapter, union recv_frame *precv_frame)
@@ -604,7 +586,6 @@ static void process_pwrbit_data(struct adapter *padapter, union recv_frame *prec
/* pstapriv->sta_dz_bitmap |= BIT(psta->aid); */
stop_sta_xmit(padapter, psta);
}
} else {
if (psta->state & WIFI_SLEEP_STATE) {
@@ -614,7 +595,6 @@ static void process_pwrbit_data(struct adapter *padapter, union recv_frame *prec
wakeup_sta_to_xmit(padapter, psta);
}
}
}
}
@@ -713,9 +693,8 @@ static signed int sta2sta_data_frame(struct adapter *adapter, union recv_frame *
u8 *sta_addr = NULL;
signed int bmcast = is_multicast_ether_addr(pattrib->dst);
if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true)) {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
/* filter packets that SA is myself or multicast or broadcast */
if (!memcmp(myhwaddr, pattrib->src, ETH_ALEN)) {
ret = _FAIL;
@@ -736,7 +715,7 @@ static signed int sta2sta_data_frame(struct adapter *adapter, union recv_frame *
sta_addr = pattrib->src;
} else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) {
} else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
/* For Station mode, sa and bssid should always be BSSID, and DA is my mac-address */
if (memcmp(pattrib->bssid, pattrib->src, ETH_ALEN)) {
ret = _FAIL;
@@ -744,7 +723,7 @@ static signed int sta2sta_data_frame(struct adapter *adapter, union recv_frame *
}
sta_addr = pattrib->bssid;
} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
if (bmcast) {
/* For AP mode, if DA == MCAST, then BSSID should be also MCAST */
if (!is_multicast_ether_addr(pattrib->bssid)) {
@@ -761,7 +740,7 @@ static signed int sta2sta_data_frame(struct adapter *adapter, union recv_frame *
sta_addr = pattrib->src;
}
} else if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == true) {
} else if (check_fwstate(pmlmepriv, WIFI_MP_STATE)) {
memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN);
memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN);
memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN);
@@ -769,10 +748,9 @@ static signed int sta2sta_data_frame(struct adapter *adapter, union recv_frame *
memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
sta_addr = mybssid;
} else
} else {
ret = _FAIL;
}
if (bmcast)
*psta = rtw_get_bcmc_stainfo(adapter);
@@ -800,11 +778,9 @@ static signed int ap2sta_data_frame(struct adapter *adapter, union recv_frame *p
u8 *myhwaddr = myid(&adapter->eeprompriv);
signed int bmcast = is_multicast_ether_addr(pattrib->dst);
if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) &&
(check_fwstate(pmlmepriv, _FW_LINKED) == true ||
check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == true)
) {
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) &&
(check_fwstate(pmlmepriv, _FW_LINKED) ||
check_fwstate(pmlmepriv, _FW_UNDER_LINKING))) {
/* filter packets that SA is myself or multicast or broadcast */
if (!memcmp(myhwaddr, pattrib->src, ETH_ALEN)) {
ret = _FAIL;
@@ -817,12 +793,10 @@ static signed int ap2sta_data_frame(struct adapter *adapter, union recv_frame *p
goto exit;
}
/* check BSSID */
if (is_zero_ether_addr(pattrib->bssid) ||
is_zero_ether_addr(mybssid) ||
(memcmp(pattrib->bssid, mybssid, ETH_ALEN))) {
if (!bmcast)
issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
@@ -847,8 +821,8 @@ static signed int ap2sta_data_frame(struct adapter *adapter, union recv_frame *p
goto exit;
}
} else if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == true) &&
(check_fwstate(pmlmepriv, _FW_LINKED) == true)) {
} else if (check_fwstate(pmlmepriv, WIFI_MP_STATE) &&
check_fwstate(pmlmepriv, _FW_LINKED)) {
memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN);
memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN);
memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN);
@@ -858,15 +832,13 @@ static signed int ap2sta_data_frame(struct adapter *adapter, union recv_frame *p
/* */
memcpy(pattrib->bssid, mybssid, ETH_ALEN);
*psta = rtw_get_stainfo(pstapriv, pattrib->bssid); /* get sta_info */
if (!*psta) {
ret = _FAIL;
goto exit;
}
} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
/* Special case */
ret = RTW_RX_HANDLED;
goto exit;
@@ -874,7 +846,6 @@ static signed int ap2sta_data_frame(struct adapter *adapter, union recv_frame *p
if (!memcmp(myhwaddr, pattrib->dst, ETH_ALEN) && (!bmcast)) {
*psta = rtw_get_stainfo(pstapriv, pattrib->bssid); /* get sta_info */
if (!*psta) {
/* for AP multicast issue , modify by yiwei */
static unsigned long send_issue_deauth_time;
@@ -903,7 +874,7 @@ static signed int sta2ap_data_frame(struct adapter *adapter, union recv_frame *p
unsigned char *mybssid = get_bssid(pmlmepriv);
signed int ret = _SUCCESS;
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
/* For AP mode, RA =BSSID, TX =STA(SRC_ADDR), A3 =DST_ADDR */
if (memcmp(pattrib->bssid, mybssid, ETH_ALEN)) {
ret = _FAIL;
@@ -1067,7 +1038,6 @@ static signed int validate_recv_ctrl_frame(struct adapter *padapter, union recv_
}
return _FAIL;
}
/* perform defrag */
@@ -1109,7 +1079,6 @@ static union recv_frame *recvframe_defrag(struct adapter *adapter,
pnextrframe = (union recv_frame *)plist;
pnfhdr = &pnextrframe->u.hdr;
/* check the fragment sequence (2nd ~n fragment frame) */
if (curfragnum != pnfhdr->attrib.frag_num) {
@@ -1139,7 +1108,6 @@ static union recv_frame *recvframe_defrag(struct adapter *adapter,
pfhdr->attrib.icv_len = pnfhdr->attrib.icv_len;
plist = get_next(plist);
}
/* free the defrag_q queue and return the prframe */
@@ -1179,10 +1147,12 @@ static union recv_frame *recvframe_chk_defrag(struct adapter *padapter, union re
if (type != WIFI_DATA_TYPE) {
psta = rtw_get_bcmc_stainfo(padapter);
pdefrag_q = &psta->sta_recvpriv.defrag_q;
} else
} else {
pdefrag_q = NULL;
} else
}
} else {
pdefrag_q = &psta->sta_recvpriv.defrag_q;
}
if ((ismfrag == 0) && (fragnum == 0))
prtnframe = precv_frame;/* isn't a fragment frame */
@@ -1197,7 +1167,6 @@ static union recv_frame *recvframe_chk_defrag(struct adapter *padapter, union re
/* free current defrag_q */
rtw_free_recvframe_queue(pdefrag_q, pfree_recv_queue);
/* Then enqueue the 0~(n-1) fragment into the defrag_q */
/* spin_lock(&pdefrag_q->lock); */
@@ -1212,7 +1181,6 @@ static union recv_frame *recvframe_chk_defrag(struct adapter *padapter, union re
rtw_free_recvframe(precv_frame, pfree_recv_queue);
prtnframe = NULL;
}
}
if ((ismfrag == 0) && (fragnum != 0)) {
@@ -1233,10 +1201,8 @@ static union recv_frame *recvframe_chk_defrag(struct adapter *padapter, union re
rtw_free_recvframe(precv_frame, pfree_recv_queue);
prtnframe = NULL;
}
}
if ((prtnframe) && (prtnframe->u.hdr.attrib.privacy)) {
/* after defrag we must check tkip mic code */
if (recvframe_chkmic(padapter, prtnframe) == _FAIL) {
@@ -1287,7 +1253,6 @@ static signed int validate_recv_mgnt_frame(struct adapter *padapter, union recv_
mgt_dispatcher(padapter, precv_frame);
return _SUCCESS;
}
static signed int validate_recv_data_frame(struct adapter *adapter, union recv_frame *precv_frame)
@@ -1343,13 +1308,11 @@ static signed int validate_recv_data_frame(struct adapter *adapter, union recv_f
default:
ret = _FAIL;
break;
}
if (ret == _FAIL || ret == RTW_RX_HANDLED)
goto exit;
if (!psta) {
ret = _FAIL;
goto exit;
@@ -1359,7 +1322,6 @@ static signed int validate_recv_data_frame(struct adapter *adapter, union recv_f
/* psta->signal_quality = prxcmd->sq; */
precv_frame->u.hdr.psta = psta;
pattrib->amsdu = 0;
pattrib->ack_policy = 0;
/* parsing QC field */
@@ -1377,7 +1339,6 @@ static signed int validate_recv_data_frame(struct adapter *adapter, union recv_f
pattrib->hdrlen = pattrib->to_fr_ds == 3 ? 30 : 24;
}
if (pattrib->order)/* HT-CTRL 11n */
pattrib->hdrlen += 4;
@@ -1413,7 +1374,7 @@ static signed int validate_80211w_mgmt(struct adapter *adapter, union recv_frame
/* only support station mode */
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) &&
adapter->securitypriv.binstallBIPkey == true) {
adapter->securitypriv.binstallBIPkey) {
/* unicast management frame decrypt */
if (pattrib->privacy && !(is_multicast_ether_addr(GetAddr1Ptr(ptr))) &&
(subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC || subtype == WIFI_ACTION)) {
@@ -1475,7 +1436,6 @@ static signed int validate_80211w_mgmt(struct adapter *adapter, union recv_frame
validate_80211w_fail:
return _FAIL;
}
static signed int validate_recv_frame(struct adapter *adapter, union recv_frame *precv_frame)
@@ -1536,17 +1496,6 @@ static signed int validate_recv_frame(struct adapter *adapter, union recv_frame
struct recv_priv *precvpriv = &adapter->recvpriv;
precvpriv->rx_drop++;
} else if (retval == _SUCCESS) {
#ifdef DBG_RX_DUMP_EAP
u8 bDumpRxPkt;
u16 eth_type;
/* dump eapol */
rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt));
/* get ether_type */
memcpy(&eth_type, ptr + pattrib->hdrlen + pattrib->iv_len + LLC_HEADER_LENGTH, 2);
eth_type = ntohs((unsigned short) eth_type);
#endif
}
break;
default:
@@ -1586,9 +1535,10 @@ static signed int wlanhdr_to_ethhdr(union recv_frame *precvframe)
!memcmp(psnap, bridge_tunnel_header, SNAP_SIZE)) {
/* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */
bsnaphdr = true;
} else
} else {
/* Leave Ethernet header part of hdr and full payload */
bsnaphdr = false;
}
rmv_len = pattrib->hdrlen + pattrib->iv_len + (bsnaphdr ? SNAP_SIZE : 0);
len = precvframe->u.hdr.len - rmv_len;
@@ -1597,7 +1547,7 @@ static signed int wlanhdr_to_ethhdr(union recv_frame *precvframe)
eth_type = ntohs(be_tmp); /* pattrib->ether_type */
pattrib->eth_type = eth_type;
if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == true)) {
if (check_fwstate(pmlmepriv, WIFI_MP_STATE)) {
ptr += rmv_len;
*ptr = 0x87;
*(ptr + 1) = 0x12;
@@ -1672,7 +1622,7 @@ static void rtw_recv_indicate_pkt(struct adapter *padapter, struct sk_buff *pkt,
/* Indicate the packets to upper layer */
if (pkt) {
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
struct sk_buff *pskb2 = NULL;
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
@@ -1735,7 +1685,6 @@ static int amsdu_to_msdu(struct adapter *padapter, union recv_frame *prframe)
pdata = prframe->u.hdr.rx_data;
while (a_len > ETH_HLEN) {
/* Offset 12 denote 2 mac address */
nSubframe_Length = get_unaligned_be16(pdata + 12);
@@ -1827,7 +1776,6 @@ static int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, un
/* spin_lock_irqsave(&ppending_recvframe_queue->lock, irql); */
/* spin_lock(&ppending_recvframe_queue->lock); */
phead = get_list_head(ppending_recvframe_queue);
plist = get_next(phead);
@@ -1843,10 +1791,8 @@ static int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, un
return false;
else
break;
}
/* spin_lock_irqsave(&ppending_recvframe_queue->lock, irql); */
/* spin_lock(&ppending_recvframe_queue->lock); */
@@ -1858,7 +1804,6 @@ static int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, un
/* spin_unlock_irqrestore(&ppending_recvframe_queue->lock, irql); */
return true;
}
static int rtw_recv_indicatepkt(struct adapter *padapter, union recv_frame *precv_frame)
@@ -1915,7 +1860,7 @@ static int recv_indicatepkts_in_order(struct adapter *padapter, struct recv_reor
plist = get_next(phead);
/* Handling some condition for forced indicate case. */
if (bforced == true) {
if (bforced) {
if (list_empty(phead)) {
/* spin_unlock_irqrestore(&ppending_recvframe_queue->lock, irql); */
/* spin_unlock(&ppending_recvframe_queue->lock); */
@@ -1926,13 +1871,11 @@ static int recv_indicatepkts_in_order(struct adapter *padapter, struct recv_reor
pattrib = &prframe->u.hdr.attrib;
preorder_ctrl->indicate_seq = pattrib->seq_num;
}
/* Prepare indication list and indication. */
/* Check if there is any packet need indicate. */
while (!list_empty(phead)) {
prframe = (union recv_frame *)plist;
pattrib = &prframe->u.hdr.attrib;
@@ -1950,8 +1893,8 @@ static int recv_indicatepkts_in_order(struct adapter *padapter, struct recv_reor
/* indicate this recv_frame */
if (!pattrib->amsdu) {
if ((padapter->bDriverStopped == false) &&
(padapter->bSurpriseRemoved == false))
if (!padapter->bDriverStopped &&
!padapter->bSurpriseRemoved)
rtw_recv_indicatepkt(padapter, prframe);/* indicate this recv_frame */
} else if (pattrib->amsdu == 1) {
@@ -1962,7 +1905,6 @@ static int recv_indicatepkts_in_order(struct adapter *padapter, struct recv_reor
/* error condition; */
}
/* Update local variables. */
bPktInBuf = false;
@@ -1970,7 +1912,6 @@ static int recv_indicatepkts_in_order(struct adapter *padapter, struct recv_reor
bPktInBuf = true;
break;
}
}
/* spin_unlock(&ppending_recvframe_queue->lock); */
@@ -1991,18 +1932,16 @@ static int recv_indicatepkt_reorder(struct adapter *padapter, union recv_frame *
wlanhdr_to_ethhdr(prframe);
if (pattrib->qos != 1) {
if ((padapter->bDriverStopped == false) &&
(padapter->bSurpriseRemoved == false)) {
if (!padapter->bDriverStopped &&
!padapter->bSurpriseRemoved) {
rtw_recv_indicatepkt(padapter, prframe);
return _SUCCESS;
}
return _FAIL;
}
if (preorder_ctrl->enable == false) {
if (!preorder_ctrl->enable) {
/* indicate this recv_frame */
preorder_ctrl->indicate_seq = pattrib->seq_num;
@@ -2013,7 +1952,7 @@ static int recv_indicatepkt_reorder(struct adapter *padapter, union recv_frame *
return _SUCCESS;
}
} else if (pattrib->amsdu == 1) { /* temp filter -> means didn't support A-MSDUs in a A-MPDU */
if (preorder_ctrl->enable == false) {
if (!preorder_ctrl->enable) {
preorder_ctrl->indicate_seq = pattrib->seq_num;
retval = amsdu_to_msdu(padapter, prframe);
@@ -2037,7 +1976,6 @@ static int recv_indicatepkt_reorder(struct adapter *padapter, union recv_frame *
goto _err_exit;
}
/* s4. */
/* Indication process. */
/* After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets */
@@ -2049,7 +1987,7 @@ static int recv_indicatepkt_reorder(struct adapter *padapter, union recv_frame *
/* */
/* recv_indicatepkts_in_order(padapter, preorder_ctrl, true); */
if (recv_indicatepkts_in_order(padapter, preorder_ctrl, false) == true) {
if (recv_indicatepkts_in_order(padapter, preorder_ctrl, false)) {
_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);
spin_unlock_bh(&ppending_recvframe_queue->lock);
} else {
@@ -2065,7 +2003,6 @@ static int recv_indicatepkt_reorder(struct adapter *padapter, union recv_frame *
return _FAIL;
}
void rtw_reordering_ctrl_timeout_handler(struct timer_list *t)
{
struct recv_reorder_ctrl *preorder_ctrl =
@@ -2073,17 +2010,15 @@ void rtw_reordering_ctrl_timeout_handler(struct timer_list *t)
struct adapter *padapter = preorder_ctrl->padapter;
struct __queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
if (padapter->bDriverStopped || padapter->bSurpriseRemoved)
return;
spin_lock_bh(&ppending_recvframe_queue->lock);
if (recv_indicatepkts_in_order(padapter, preorder_ctrl, true) == true)
if (recv_indicatepkts_in_order(padapter, preorder_ctrl, true))
_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);
spin_unlock_bh(&ppending_recvframe_queue->lock);
}
static int process_recv_indicatepkts(struct adapter *padapter, union recv_frame *prframe)
@@ -2094,13 +2029,13 @@ static int process_recv_indicatepkts(struct adapter *padapter, union recv_frame
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ht_priv *phtpriv = &pmlmepriv->htpriv;
if (phtpriv->ht_option == true) { /* B/G/N Mode */
if (phtpriv->ht_option) { /* B/G/N Mode */
/* prframe->u.hdr.preorder_ctrl = &precvpriv->recvreorder_ctrl[pattrib->priority]; */
if (recv_indicatepkt_reorder(padapter, prframe) != _SUCCESS) { /* including perform A-MPDU Rx Ordering Buffer Control */
if ((padapter->bDriverStopped == false) &&
(padapter->bSurpriseRemoved == false)) {
if (!padapter->bDriverStopped &&
!padapter->bSurpriseRemoved) {
retval = _FAIL;
return retval;
}
@@ -2110,18 +2045,16 @@ static int process_recv_indicatepkts(struct adapter *padapter, union recv_frame
if (retval != _SUCCESS)
return retval;
if ((padapter->bDriverStopped == false) && (padapter->bSurpriseRemoved == false)) {
if (!padapter->bDriverStopped && !padapter->bSurpriseRemoved) {
/* indicate this recv_frame */
rtw_recv_indicatepkt(padapter, prframe);
} else {
retval = _FAIL;
return retval;
}
}
return retval;
}
static int recv_func_prehandle(struct adapter *padapter, union recv_frame *rframe)
@@ -2195,13 +2128,13 @@ static int recv_func(struct adapter *padapter, union recv_frame *rframe)
ret = recv_func_prehandle(padapter, rframe);
if (ret == _SUCCESS) {
/* check if need to enqueue into uc_swdec_pending_queue*/
if (check_fwstate(mlmepriv, WIFI_STATION_STATE) &&
!is_multicast_ether_addr(prxattrib->ra) && prxattrib->encrypt > 0 &&
(prxattrib->bdecrypted == 0 || psecuritypriv->sw_decrypt == true) &&
psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK &&
!psecuritypriv->busetkipkey) {
!is_multicast_ether_addr(prxattrib->ra) &&
prxattrib->encrypt > 0 &&
(prxattrib->bdecrypted == 0 || psecuritypriv->sw_decrypt) &&
psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK &&
!psecuritypriv->busetkipkey) {
rtw_enqueue_recvframe(rframe, &padapter->recvpriv.uc_swdec_pending_queue);
if (recvpriv->free_recvframe_cnt < NR_RECVFRAME / 4) {
@@ -2221,7 +2154,6 @@ static int recv_func(struct adapter *padapter, union recv_frame *rframe)
return ret;
}
s32 rtw_recv_entry(union recv_frame *precvframe)
{
struct adapter *padapter;
@@ -2263,7 +2195,6 @@ static void rtw_signal_stat_timer_hdl(struct timer_list *t)
adapter->recvpriv.signal_strength = adapter->recvpriv.signal_strength_dbg;
adapter->recvpriv.rssi = (s8)translate_percentage_to_dbm((u8)adapter->recvpriv.signal_strength_dbg);
} else {
if (recvpriv->signal_strength_data.update_req == 0) {/* update_req is clear, means we got rx */
avg_signal_strength = recvpriv->signal_strength_data.avg_val;
num_signal_strength = recvpriv->signal_strength_data.total_num;
@@ -2286,8 +2217,8 @@ static void rtw_signal_stat_timer_hdl(struct timer_list *t)
}
}
if (check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) == true ||
check_fwstate(&adapter->mlmepriv, _FW_LINKED) == false
if (check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) ||
!check_fwstate(&adapter->mlmepriv, _FW_LINKED)
) {
goto set_timer;
}
@@ -2316,5 +2247,4 @@ static void rtw_signal_stat_timer_hdl(struct timer_list *t)
set_timer:
rtw_set_signal_stat_timer(recvpriv);
}

223
drivers/staging/rtl8723bs/core/rtw_security.c
View File

@@ -123,7 +123,6 @@ void rtw_wep_decrypt(struct adapter *padapter, u8 *precvframe)
/* calculate icv and compare the icv */
*((u32 *)crc) = ~crc32_le(~0, payload, length - 4);
}
}
@@ -198,7 +197,6 @@ void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst)
void rtw_seccalctkipmic(u8 *key, u8 *header, u8 *data, u32 data_len, u8 *mic_code, u8 pri)
{
struct mic_data micdata;
u8 priority[4] = {0x0, 0x0, 0x0, 0x0};
@@ -449,47 +447,45 @@ u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe)
pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset;
/* 4 start to encrypt each fragment */
if (pattrib->encrypt == _TKIP_) {
if (pattrib->encrypt != _TKIP_)
return _SUCCESS;
{
if (is_multicast_ether_addr(pattrib->ra))
prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
else
prwskey = pattrib->dot118021x_UncstKey.skey;
if (is_multicast_ether_addr(pattrib->ra))
prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
else
prwskey = pattrib->dot118021x_UncstKey.skey;
for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) {
iv = pframe + pattrib->hdrlen;
payload = pframe + pattrib->iv_len + pattrib->hdrlen;
for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) {
iv = pframe + pattrib->hdrlen;
payload = pframe + pattrib->iv_len + pattrib->hdrlen;
GET_TKIP_PN(iv, dot11txpn);
GET_TKIP_PN(iv, dot11txpn);
pnl = (u16)(dot11txpn.val);
pnh = (u32)(dot11txpn.val >> 16);
pnl = (u16)(dot11txpn.val);
pnh = (u32)(dot11txpn.val >> 16);
phase1((u16 *)&ttkey[0], prwskey, &pattrib->ta[0], pnh);
phase1((u16 *)&ttkey[0], prwskey, &pattrib->ta[0], pnh);
phase2(&rc4key[0], prwskey, (u16 *)&ttkey[0], pnl);
phase2(&rc4key[0], prwskey, (u16 *)&ttkey[0], pnl);
if ((curfragnum + 1) == pattrib->nr_frags) { /* 4 the last fragment */
length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
if ((curfragnum + 1) == pattrib->nr_frags) { /* 4 the last fragment */
length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
arc4_setkey(ctx, rc4key, 16);
arc4_crypt(ctx, payload, payload, length);
arc4_crypt(ctx, payload + length, crc.f1, 4);
arc4_setkey(ctx, rc4key, 16);
arc4_crypt(ctx, payload, payload, length);
arc4_crypt(ctx, payload + length, crc.f1, 4);
} else {
length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
} else {
length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
arc4_setkey(ctx, rc4key, 16);
arc4_crypt(ctx, payload, payload, length);
arc4_crypt(ctx, payload + length, crc.f1, 4);
arc4_setkey(ctx, rc4key, 16);
arc4_crypt(ctx, payload, payload, length);
arc4_crypt(ctx, payload + length, crc.f1, 4);
pframe += pxmitpriv->frag_len;
pframe = (u8 *)round_up((SIZE_PTR)(pframe), 4);
}
}
pframe += pxmitpriv->frag_len;
pframe = (u8 *)round_up((SIZE_PTR)(pframe), 4);
}
}
return res;
@@ -517,82 +513,82 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe)
pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data;
/* 4 start to decrypt recvframe */
if (prxattrib->encrypt == _TKIP_) {
stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]);
if (stainfo) {
if (is_multicast_ether_addr(prxattrib->ra)) {
static unsigned long start;
static u32 no_gkey_bc_cnt;
static u32 no_gkey_mc_cnt;
if (prxattrib->encrypt != _TKIP_)
return _SUCCESS;
if (!psecuritypriv->binstallGrpkey) {
res = _FAIL;
stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]);
if (!stainfo)
return _FAIL;
if (start == 0)
start = jiffies;
if (is_multicast_ether_addr(prxattrib->ra)) {
static unsigned long start;
static u32 no_gkey_bc_cnt;
static u32 no_gkey_mc_cnt;
if (is_broadcast_ether_addr(prxattrib->ra))
no_gkey_bc_cnt++;
else
no_gkey_mc_cnt++;
if (!psecuritypriv->binstallGrpkey) {
res = _FAIL;
if (jiffies_to_msecs(jiffies - start) > 1000) {
if (no_gkey_bc_cnt || no_gkey_mc_cnt) {
netdev_dbg(padapter->pnetdev,
FUNC_ADPT_FMT " no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n",
FUNC_ADPT_ARG(padapter),
no_gkey_bc_cnt,
no_gkey_mc_cnt);
}
start = jiffies;
no_gkey_bc_cnt = 0;
no_gkey_mc_cnt = 0;
}
goto exit;
}
if (start == 0)
start = jiffies;
if (is_broadcast_ether_addr(prxattrib->ra))
no_gkey_bc_cnt++;
else
no_gkey_mc_cnt++;
if (jiffies_to_msecs(jiffies - start) > 1000) {
if (no_gkey_bc_cnt || no_gkey_mc_cnt) {
netdev_dbg(padapter->pnetdev,
FUNC_ADPT_FMT " gkey installed. no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n",
FUNC_ADPT_FMT " no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n",
FUNC_ADPT_ARG(padapter),
no_gkey_bc_cnt,
no_gkey_mc_cnt);
}
start = 0;
start = jiffies;
no_gkey_bc_cnt = 0;
no_gkey_mc_cnt = 0;
prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
} else {
prwskey = &stainfo->dot118021x_UncstKey.skey[0];
}
iv = pframe + prxattrib->hdrlen;
payload = pframe + prxattrib->iv_len + prxattrib->hdrlen;
length = ((union recv_frame *)precvframe)->u.hdr.len - prxattrib->hdrlen - prxattrib->iv_len;
GET_TKIP_PN(iv, dot11txpn);
pnl = (u16)(dot11txpn.val);
pnh = (u32)(dot11txpn.val >> 16);
phase1((u16 *)&ttkey[0], prwskey, &prxattrib->ta[0], pnh);
phase2(&rc4key[0], prwskey, (unsigned short *)&ttkey[0], pnl);
/* 4 decrypt payload include icv */
arc4_setkey(ctx, rc4key, 16);
arc4_crypt(ctx, payload, payload, length);
*((u32 *)crc) = ~crc32_le(~0, payload, length - 4);
if (crc[3] != payload[length - 1] || crc[2] != payload[length - 2] ||
crc[1] != payload[length - 3] || crc[0] != payload[length - 4])
res = _FAIL;
} else {
res = _FAIL;
goto exit;
}
if (no_gkey_bc_cnt || no_gkey_mc_cnt) {
netdev_dbg(padapter->pnetdev,
FUNC_ADPT_FMT " gkey installed. no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n",
FUNC_ADPT_ARG(padapter),
no_gkey_bc_cnt,
no_gkey_mc_cnt);
}
start = 0;
no_gkey_bc_cnt = 0;
no_gkey_mc_cnt = 0;
prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
} else {
prwskey = &stainfo->dot118021x_UncstKey.skey[0];
}
iv = pframe + prxattrib->hdrlen;
payload = pframe + prxattrib->iv_len + prxattrib->hdrlen;
length = ((union recv_frame *)precvframe)->u.hdr.len - prxattrib->hdrlen - prxattrib->iv_len;
GET_TKIP_PN(iv, dot11txpn);
pnl = (u16)(dot11txpn.val);
pnh = (u32)(dot11txpn.val >> 16);
phase1((u16 *)&ttkey[0], prwskey, &prxattrib->ta[0], pnh);
phase2(&rc4key[0], prwskey, (unsigned short *)&ttkey[0], pnl);
/* 4 decrypt payload include icv */
arc4_setkey(ctx, rc4key, 16);
arc4_crypt(ctx, payload, payload, length);
*((u32 *)crc) = ~crc32_le(~0, payload, length - 4);
if (crc[3] != payload[length - 1] || crc[2] != payload[length - 2] ||
crc[1] != payload[length - 3] || crc[0] != payload[length - 4])
res = _FAIL;
exit:
return res;
}
@@ -651,13 +647,8 @@ static void construct_mic_iv(u8 *mic_iv,
for (i = 2; i < 8; i++)
mic_iv[i] = mpdu[i + 8]; /* mic_iv[2:7] = A2[0:5] = mpdu[10:15] */
#ifdef CONSISTENT_PN_ORDER
for (i = 8; i < 14; i++)
mic_iv[i] = pn_vector[i - 8]; /* mic_iv[8:13] = PN[0:5] */
#else
for (i = 8; i < 14; i++)
mic_iv[i] = pn_vector[13 - i]; /* mic_iv[8:13] = PN[5:0] */
#endif
mic_iv[14] = (unsigned char)(payload_length / 256);
mic_iv[15] = (unsigned char)(payload_length % 256);
}
@@ -774,13 +765,8 @@ static void construct_ctr_preload(u8 *ctr_preload,
for (i = 2; i < 8; i++)
ctr_preload[i] = mpdu[i + 8]; /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */
#ifdef CONSISTENT_PN_ORDER
for (i = 8; i < 14; i++)
ctr_preload[i] = pn_vector[i - 8]; /* ctr_preload[8:13] = PN[0:5] */
#else
for (i = 8; i < 14; i++)
ctr_preload[i] = pn_vector[13 - i]; /* ctr_preload[8:13] = PN[5:0] */
#endif
ctr_preload[14] = (unsigned char)(c / 256); /* Ctr */
ctr_preload[15] = (unsigned char)(c % 256);
}
@@ -965,24 +951,25 @@ u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe)
pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset;
/* 4 start to encrypt each fragment */
if (pattrib->encrypt == _AES_) {
if (is_multicast_ether_addr(pattrib->ra))
prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
else
prwskey = pattrib->dot118021x_UncstKey.skey;
if (pattrib->encrypt != _AES_)
return _SUCCESS;
for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) {
if ((curfragnum + 1) == pattrib->nr_frags) { /* 4 the last fragment */
length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
if (is_multicast_ether_addr(pattrib->ra))
prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
else
prwskey = pattrib->dot118021x_UncstKey.skey;
aes_cipher(prwskey, pattrib->hdrlen, pframe, length);
} else {
length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) {
if ((curfragnum + 1) == pattrib->nr_frags) { /* 4 the last fragment */
length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
aes_cipher(prwskey, pattrib->hdrlen, pframe, length);
pframe += pxmitpriv->frag_len;
pframe = (u8 *)round_up((SIZE_PTR)(pframe), 4);
}
aes_cipher(prwskey, pattrib->hdrlen, pframe, length);
} else {
length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
aes_cipher(prwskey, pattrib->hdrlen, pframe, length);
pframe += pxmitpriv->frag_len;
pframe = (u8 *)round_up((SIZE_PTR)(pframe), 4);
}
}
return res;
@@ -1212,7 +1199,7 @@ u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe)
if (prxattrib->encrypt != _AES_)
return _SUCCESS;
stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]);
if (stainfo)
if (!stainfo)
return _FAIL;
if (is_multicast_ether_addr(prxattrib->ra)) {
static unsigned long start;

3
drivers/staging/rtl8723bs/core/rtw_sta_mgt.c
View File

@@ -67,7 +67,6 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
spin_lock_init(&pstapriv->sta_hash_lock);
/* _rtw_init_queue(&pstapriv->asoc_q); */
pstapriv->asoc_sta_count = 0;
INIT_LIST_HEAD(&pstapriv->sleep_q.queue);
spin_lock_init(&pstapriv->sleep_q.lock);
@@ -531,7 +530,7 @@ u8 rtw_access_ctrl(struct adapter *padapter, u8 *mac_addr)
paclnode = list_entry(plist, struct rtw_wlan_acl_node, list);
if (!memcmp(paclnode->addr, mac_addr, ETH_ALEN))
if (paclnode->valid == true) {
if (paclnode->valid) {
match = true;
break;
}

57
drivers/staging/rtl8723bs/core/rtw_wlan_util.c
View File

@@ -147,7 +147,7 @@ unsigned int ratetbl2rateset(struct adapter *padapter, unsigned char *rateset)
default:
rate = ratetbl_val_2wifirate(rate);
if (is_basicrate(padapter, rate) == true)
if (is_basicrate(padapter, rate))
rate |= IEEE80211_BASIC_RATE_MASK;
rateset[len] = rate;
@@ -236,7 +236,7 @@ void Restore_DM_Func_Flag(struct adapter *padapter)
void Switch_DM_Func(struct adapter *padapter, u32 mode, u8 enable)
{
if (enable == true)
if (enable)
rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_SET, (u8 *)(&mode));
else
rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_CLR, (u8 *)(&mode));
@@ -254,36 +254,10 @@ inline u8 rtw_get_oper_ch(struct adapter *adapter)
inline void rtw_set_oper_ch(struct adapter *adapter, u8 ch)
{
#ifdef DBG_CH_SWITCH
const int len = 128;
char msg[128] = {0};
int cnt = 0;
int i = 0;
#endif /* DBG_CH_SWITCH */
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
if (dvobj->oper_channel != ch) {
dvobj->on_oper_ch_time = jiffies;
#ifdef DBG_CH_SWITCH
cnt += scnprintf(msg + cnt, len - cnt, "switch to ch %3u", ch);
for (i = 0; i < dvobj->iface_nums; i++) {
struct adapter *iface = dvobj->padapters[i];
cnt += scnprintf(msg + cnt, len - cnt, " [%s:", ADPT_ARG(iface));
if (iface->mlmeextpriv.cur_channel == ch)
cnt += scnprintf(msg + cnt, len - cnt, "C");
else
cnt += scnprintf(msg + cnt, len - cnt, "_");
if (iface->wdinfo.listen_channel == ch && !rtw_p2p_chk_state(&iface->wdinfo, P2P_STATE_NONE))
cnt += scnprintf(msg + cnt, len - cnt, "L");
else
cnt += scnprintf(msg + cnt, len - cnt, "_");
cnt += scnprintf(msg + cnt, len - cnt, "]");
}
#endif /* DBG_CH_SWITCH */
}
dvobj->oper_channel = ch;
@@ -340,7 +314,6 @@ void set_channel_bwmode(struct adapter *padapter, unsigned char channel, unsigne
center_ch = rtw_get_center_ch(channel, bwmode, channel_offset);
/* set Channel */
if (mutex_lock_interruptible(&(adapter_to_dvobj(padapter)->setch_mutex)))
return;
@@ -521,7 +494,7 @@ static bool _rtw_camid_is_gk(struct adapter *adapter, u8 cam_id)
if (!(cam_ctl->bitmap & BIT(cam_id)))
goto exit;
ret = (dvobj->cam_cache[cam_id].ctrl & BIT6) ? true : false;
ret = (dvobj->cam_cache[cam_id].ctrl & BIT(6)) ? true : false;
exit:
return ret;
@@ -577,7 +550,7 @@ s16 rtw_camid_alloc(struct adapter *adapter, struct sta_info *sta, u8 kid)
netdev_dbg(adapter->pnetdev,
FUNC_ADPT_FMT " group key with invalid key id:%u\n",
FUNC_ADPT_ARG(adapter), kid);
rtw_warn_on(1);
WARN_ON(1);
goto bitmap_handle;
}
@@ -623,7 +596,7 @@ s16 rtw_camid_alloc(struct adapter *adapter, struct sta_info *sta, u8 kid)
netdev_dbg(adapter->pnetdev,
FUNC_ADPT_FMT " group key id:%u no room\n",
FUNC_ADPT_ARG(adapter), kid);
rtw_warn_on(1);
WARN_ON(1);
goto bitmap_handle;
}
@@ -847,7 +820,7 @@ static void bwmode_update_check(struct adapter *padapter, struct ndis_80211_var_
if (!pIE)
return;
if (phtpriv->ht_option == false)
if (!phtpriv->ht_option)
return;
if (pIE->length > sizeof(struct HT_info_element))
@@ -931,7 +904,7 @@ void HT_caps_handler(struct adapter *padapter, struct ndis_80211_var_ie *pIE)
if (!pIE)
return;
if (phtpriv->ht_option == false)
if (!phtpriv->ht_option)
return;
pmlmeinfo->HT_caps_enable = 1;
@@ -994,7 +967,7 @@ void HT_info_handler(struct adapter *padapter, struct ndis_80211_var_ie *pIE)
if (!pIE)
return;
if (phtpriv->ht_option == false)
if (!phtpriv->ht_option)
return;
if (pIE->length > sizeof(struct HT_info_element))
@@ -1122,7 +1095,7 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
int ssid_len;
if (is_client_associated_to_ap(Adapter) == false)
if (!is_client_associated_to_ap(Adapter))
return true;
len = packet_len - sizeof(struct ieee80211_hdr_3addr);
@@ -1204,8 +1177,8 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
ssid_len = *(p + 1);
if (ssid_len > NDIS_802_11_LENGTH_SSID)
ssid_len = 0;
memcpy(bssid->ssid.ssid, (p + 2), ssid_len);
}
memcpy(bssid->ssid.ssid, (p + 2), ssid_len);
bssid->ssid.ssid_length = ssid_len;
if (memcmp(bssid->ssid.ssid, cur_network->network.ssid.ssid, 32) ||
@@ -1477,13 +1450,13 @@ void update_IOT_info(struct adapter *padapter)
pmlmeinfo->turboMode_cts2self = 0;
pmlmeinfo->turboMode_rtsen = 1;
/* disable high power */
Switch_DM_Func(padapter, (~DYNAMIC_BB_DYNAMIC_TXPWR), false);
Switch_DM_Func(padapter, ((u32)(~DYNAMIC_BB_DYNAMIC_TXPWR)), false);
break;
case HT_IOT_PEER_REALTEK:
/* rtw_write16(padapter, 0x4cc, 0xffff); */
/* rtw_write16(padapter, 0x546, 0x01c0); */
/* disable high power */
Switch_DM_Func(padapter, (~DYNAMIC_BB_DYNAMIC_TXPWR), false);
Switch_DM_Func(padapter, ((u32)(~DYNAMIC_BB_DYNAMIC_TXPWR)), false);
break;
default:
pmlmeinfo->turboMode_cts2self = 0;
@@ -1689,7 +1662,7 @@ void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len)
pmlmeext->bcn_delay_cnt[delay_ms]++;
/* pmlmeext->bcn_delay_ratio[delay_ms] = (pmlmeext->bcn_delay_cnt[delay_ms] * 100) /pmlmeext->bcn_cnt; */
/* dump for adaptive_early_32k */
if (pmlmeext->bcn_cnt > 100 && (pmlmeext->adaptive_tsf_done == true)) {
if (pmlmeext->bcn_cnt > 100 && pmlmeext->adaptive_tsf_done) {
u8 ratio_20_delay, ratio_80_delay;
u8 DrvBcnEarly, DrvBcnTimeOut;
@@ -1737,7 +1710,7 @@ void rtw_alloc_macid(struct adapter *padapter, struct sta_info *psta)
spin_lock_bh(&pdvobj->lock);
for (i = 0; i < NUM_STA; i++) {
if (pdvobj->macid[i] == false) {
if (!pdvobj->macid[i]) {
pdvobj->macid[i] = true;
break;
}
@@ -1762,7 +1735,7 @@ void rtw_release_macid(struct adapter *padapter, struct sta_info *psta)
spin_lock_bh(&pdvobj->lock);
if (psta->mac_id < NUM_STA && psta->mac_id != 1) {
if (pdvobj->macid[psta->mac_id] == true) {
if (pdvobj->macid[psta->mac_id]) {
pdvobj->macid[psta->mac_id] = false;
psta->mac_id = NUM_STA;
}

277
drivers/staging/rtl8723bs/core/rtw_xmit.c
View File

@@ -33,22 +33,71 @@ void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv)
INIT_LIST_HEAD(&psta_xmitpriv->apsd);
}
static s32 rtw_alloc_hwxmits(struct adapter *padapter)
{
struct hw_xmit *hwxmits;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
pxmitpriv->hwxmit_entry = HWXMIT_ENTRY;
pxmitpriv->hwxmits = NULL;
pxmitpriv->hwxmits = kzalloc_objs(*hwxmits, pxmitpriv->hwxmit_entry,
GFP_ATOMIC);
if (!pxmitpriv->hwxmits)
return -ENOMEM;
hwxmits = pxmitpriv->hwxmits;
if (pxmitpriv->hwxmit_entry == 5) {
hwxmits[0] .sta_queue = &pxmitpriv->bm_pending;
hwxmits[1] .sta_queue = &pxmitpriv->vo_pending;
hwxmits[2] .sta_queue = &pxmitpriv->vi_pending;
hwxmits[3] .sta_queue = &pxmitpriv->bk_pending;
hwxmits[4] .sta_queue = &pxmitpriv->be_pending;
} else if (pxmitpriv->hwxmit_entry == 4) {
hwxmits[0] .sta_queue = &pxmitpriv->vo_pending;
hwxmits[1] .sta_queue = &pxmitpriv->vi_pending;
hwxmits[2] .sta_queue = &pxmitpriv->be_pending;
hwxmits[3] .sta_queue = &pxmitpriv->bk_pending;
} else {
}
return 0;
}
static int rtw_os_xmit_resource_alloc(struct adapter *padapter, struct xmit_buf *pxmitbuf, u32 alloc_sz, u8 flag)
{
if (alloc_sz > 0) {
pxmitbuf->pallocated_buf = kzalloc(alloc_sz, GFP_KERNEL);
if (!pxmitbuf->pallocated_buf)
return -ENOMEM;
pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ);
}
return 0;
}
s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
{
int i;
struct xmit_buf *pxmitbuf;
struct xmit_frame *pxframe;
signed int res = _SUCCESS;
int res;
spin_lock_init(&pxmitpriv->lock);
spin_lock_init(&pxmitpriv->lock_sctx);
init_completion(&pxmitpriv->xmit_comp);
init_completion(&pxmitpriv->terminate_xmitthread_comp);
/*
* Please insert all the queue initialization using _rtw_init_queue below
*/
pxmitpriv->adapter = padapter;
INIT_LIST_HEAD(&pxmitpriv->be_pending.queue);
@@ -75,8 +124,7 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
if (!pxmitpriv->pallocated_frame_buf) {
pxmitpriv->pxmit_frame_buf = NULL;
res = _FAIL;
goto exit;
return -ENOMEM;
}
pxmitpriv->pxmit_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_frame_buf), 4);
@@ -111,10 +159,8 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
pxmitpriv->pallocated_xmitbuf = vzalloc(NR_XMITBUFF * sizeof(struct xmit_buf) + 4);
if (!pxmitpriv->pallocated_xmitbuf) {
res = _FAIL;
goto exit;
}
if (!pxmitpriv->pallocated_xmitbuf)
return -ENOMEM;
pxmitpriv->pxmitbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmitbuf), 4);
@@ -129,11 +175,11 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
/* Tx buf allocation may fail sometimes, so sleep and retry. */
res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, (MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ), true);
if (res == _FAIL) {
if (res) {
fsleep(10 * USEC_PER_MSEC);
res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, (MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ), true);
if (res == _FAIL)
goto exit;
if (res)
return res;
}
pxmitbuf->phead = pxmitbuf->pbuf;
@@ -145,10 +191,6 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
list_add_tail(&pxmitbuf->list,
&pxmitpriv->free_xmitbuf_queue.queue);
#ifdef DBG_XMIT_BUF
pxmitbuf->no = i;
#endif
pxmitbuf++;
}
@@ -162,8 +204,7 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
if (!pxmitpriv->xframe_ext_alloc_addr) {
pxmitpriv->xframe_ext = NULL;
res = _FAIL;
goto exit;
return -ENOMEM;
}
pxmitpriv->xframe_ext = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->xframe_ext_alloc_addr), 4);
pxframe = (struct xmit_frame *)pxmitpriv->xframe_ext;
@@ -194,10 +235,8 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
pxmitpriv->pallocated_xmit_extbuf = vzalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4);
if (!pxmitpriv->pallocated_xmit_extbuf) {
res = _FAIL;
goto exit;
}
if (!pxmitpriv->pallocated_xmit_extbuf)
return -ENOMEM;
pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmit_extbuf), 4);
@@ -211,10 +250,8 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
pxmitbuf->buf_tag = XMITBUF_MGNT;
res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, MAX_XMIT_EXTBUF_SZ + XMITBUF_ALIGN_SZ, true);
if (res == _FAIL) {
res = _FAIL;
goto exit;
}
if (res)
return res;
pxmitbuf->phead = pxmitbuf->pbuf;
pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMIT_EXTBUF_SZ;
@@ -223,9 +260,6 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
list_add_tail(&pxmitbuf->list,
&pxmitpriv->free_xmit_extbuf_queue.queue);
#ifdef DBG_XMIT_BUF_EXT
pxmitbuf->no = i;
#endif
pxmitbuf++;
}
@@ -243,10 +277,8 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf,
MAX_CMDBUF_SZ + XMITBUF_ALIGN_SZ,
true);
if (res == _FAIL) {
res = _FAIL;
goto exit;
}
if (res)
return res;
pxmitbuf->phead = pxmitbuf->pbuf;
pxmitbuf->pend = pxmitbuf->pbuf + MAX_CMDBUF_SZ;
@@ -257,8 +289,8 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
}
res = rtw_alloc_hwxmits(padapter);
if (res == _FAIL)
goto exit;
if (res)
return res;
rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
for (i = 0; i < 4; i++)
@@ -270,8 +302,7 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
rtw_hal_init_xmit_priv(padapter);
exit:
return res;
return 0;
}
void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv)
@@ -386,7 +417,8 @@ static void update_attrib_vcs_info(struct adapter *padapter, struct xmit_frame *
} else {
while (true) {
/* IOT action */
if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS) && (pattrib->ampdu_en == true) &&
if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS) &&
pattrib->ampdu_en &&
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) {
pattrib->vcs_mode = CTS_TO_SELF;
break;
@@ -422,7 +454,7 @@ static void update_attrib_vcs_info(struct adapter *padapter, struct xmit_frame *
/* to do list: check MIMO power save condition. */
/* check AMPDU aggregation for TXOP */
if (pattrib->ampdu_en == true) {
if (pattrib->ampdu_en) {
pattrib->vcs_mode = RTS_CTS;
break;
}
@@ -484,10 +516,10 @@ static s32 update_attrib_sec_info(struct adapter *padapter, struct pkt_attrib *p
memset(pattrib->dot11tkiptxmickey.skey, 0, 16);
pattrib->mac_id = psta->mac_id;
if (psta->ieee8021x_blocked == true) {
if (psta->ieee8021x_blocked) {
pattrib->encrypt = 0;
if ((pattrib->ether_type != 0x888e) && (check_fwstate(pmlmepriv, WIFI_MP_STATE) == false)) {
if ((pattrib->ether_type != 0x888e) && !check_fwstate(pmlmepriv, WIFI_MP_STATE)) {
res = _FAIL;
goto exit;
}
@@ -652,8 +684,8 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p
memcpy(pattrib->dst, &etherhdr.h_dest, ETH_ALEN);
memcpy(pattrib->src, &etherhdr.h_source, ETH_ALEN);
if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true)) {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
} else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
@@ -688,7 +720,7 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p
}
}
/* for parsing ICMP pakcets */
/* for parsing ICMP packets */
{
struct iphdr *piphdr = (struct iphdr *)tmp;
@@ -719,7 +751,7 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p
if (!psta) { /* if we cannot get psta => drop the pkt */
res = _FAIL;
goto exit;
} else if ((check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) && (!(psta->state & _FW_LINKED))) {
} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) && !(psta->state & _FW_LINKED)) {
res = _FAIL;
goto exit;
}
@@ -901,7 +933,7 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr
SetFrameSubType(fctrl, pattrib->subtype);
if (pattrib->subtype & WIFI_DATA_TYPE) {
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) {
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
/* to_ds = 1, fr_ds = 0; */
{
@@ -915,7 +947,7 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr
if (pqospriv->qos_option)
qos_option = true;
} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
/* to_ds = 0, fr_ds = 1; */
SetFrDs(fctrl);
memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN);
@@ -924,8 +956,8 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr
if (pattrib->qos_en)
qos_option = true;
} else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true)) {
} else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN);
memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN);
memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN);
@@ -983,7 +1015,7 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr
pattrib->ampdu_en = true;
/* re-check if enable ampdu by BA_starting_seqctrl */
if (pattrib->ampdu_en == true) {
if (pattrib->ampdu_en) {
u16 tx_seq;
tx_seq = psta->BA_starting_seqctrl[pattrib->priority & 0x0f];
@@ -1140,7 +1172,7 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct
frg_inx++;
if (bmcst || (rtw_endofpktfile(&pktfile) == true)) {
if (bmcst || rtw_endofpktfile(&pktfile)) {
pattrib->nr_frags = frg_inx;
pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len +
@@ -1166,7 +1198,7 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct
xmitframe_swencrypt(padapter, pxmitframe);
if (bmcst == false)
if (!bmcst)
update_attrib_vcs_info(padapter, pxmitframe);
else
pattrib->vcs_mode = NONE_VCS;
@@ -1320,7 +1352,7 @@ s32 rtw_mgmt_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, s
/* set final tx command size */
pattrib->last_txcmdsz = pattrib->pktlen;
/* set protected bit must be beofre SW encrypt */
/* set protected bit must be before SW encrypt */
SetPrivacy(mem_start);
/* software encrypt */
xmitframe_swencrypt(padapter, pxmitframe);
@@ -1782,12 +1814,49 @@ void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, struct __queue *pfram
spin_unlock_bh(&pframequeue->lock);
}
s32 rtw_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe)
/*
* Will enqueue pxmitframe to the proper queue,
* and indicate it to xx_pending list.....
*/
static int rtw_xmit_classifier(struct adapter *padapter, struct xmit_frame *pxmitframe)
{
if (rtw_xmit_classifier(padapter, pxmitframe) == _FAIL)
return _FAIL;
u8 ac_index;
struct sta_info *psta;
struct tx_servq *ptxservq;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits;
return _SUCCESS;
psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra);
if (pattrib->psta != psta)
return -ENODEV;
if (!psta)
return -EINVAL;
if (!(psta->state & _FW_LINKED))
return -ENETDOWN;
ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index));
if (list_empty(&ptxservq->tx_pending))
list_add_tail(&ptxservq->tx_pending, get_list_head(phwxmits[ac_index].sta_queue));
list_add_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending));
ptxservq->qcnt++;
phwxmits[ac_index].accnt++;
return 0;
}
int rtw_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe)
{
int res;
res = rtw_xmit_classifier(padapter, pxmitframe);
if (res)
return res;
return 0;
}
struct tx_servq *rtw_get_sta_pending(struct adapter *padapter, struct sta_info *psta, signed int up, u8 *ac)
@@ -1824,85 +1893,6 @@ struct tx_servq *rtw_get_sta_pending(struct adapter *padapter, struct sta_info *
return ptxservq;
}
/*
* Will enqueue pxmitframe to the proper queue,
* and indicate it to xx_pending list.....
*/
s32 rtw_xmit_classifier(struct adapter *padapter, struct xmit_frame *pxmitframe)
{
u8 ac_index;
struct sta_info *psta;
struct tx_servq *ptxservq;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits;
signed int res = _SUCCESS;
psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra);
if (pattrib->psta != psta)
return _FAIL;
if (!psta) {
res = _FAIL;
goto exit;
}
if (!(psta->state & _FW_LINKED))
return _FAIL;
ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index));
if (list_empty(&ptxservq->tx_pending))
list_add_tail(&ptxservq->tx_pending, get_list_head(phwxmits[ac_index].sta_queue));
list_add_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending));
ptxservq->qcnt++;
phwxmits[ac_index].accnt++;
exit:
return res;
}
s32 rtw_alloc_hwxmits(struct adapter *padapter)
{
struct hw_xmit *hwxmits;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
pxmitpriv->hwxmit_entry = HWXMIT_ENTRY;
pxmitpriv->hwxmits = NULL;
pxmitpriv->hwxmits = kzalloc_objs(*hwxmits, pxmitpriv->hwxmit_entry,
GFP_ATOMIC);
if (!pxmitpriv->hwxmits)
return _FAIL;
hwxmits = pxmitpriv->hwxmits;
if (pxmitpriv->hwxmit_entry == 5) {
hwxmits[0] .sta_queue = &pxmitpriv->bm_pending;
hwxmits[1] .sta_queue = &pxmitpriv->vo_pending;
hwxmits[2] .sta_queue = &pxmitpriv->vi_pending;
hwxmits[3] .sta_queue = &pxmitpriv->bk_pending;
hwxmits[4] .sta_queue = &pxmitpriv->be_pending;
} else if (pxmitpriv->hwxmit_entry == 4) {
hwxmits[0] .sta_queue = &pxmitpriv->vo_pending;
hwxmits[1] .sta_queue = &pxmitpriv->vi_pending;
hwxmits[2] .sta_queue = &pxmitpriv->be_pending;
hwxmits[3] .sta_queue = &pxmitpriv->bk_pending;
} else {
}
return _SUCCESS;
}
void rtw_free_hwxmits(struct adapter *padapter)
{
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
@@ -2003,14 +1993,14 @@ s32 rtw_xmit(struct adapter *padapter, struct sk_buff **ppkt)
do_queue_select(padapter, &pxmitframe->attrib);
spin_lock_bh(&pxmitpriv->lock);
if (xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == true) {
if (xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe)) {
spin_unlock_bh(&pxmitpriv->lock);
return 1;
}
spin_unlock_bh(&pxmitpriv->lock);
/* pre_xmitframe */
if (rtw_hal_xmit(padapter, pxmitframe) == false)
if (!rtw_hal_xmit(padapter, pxmitframe))
return 1;
return 0;
@@ -2038,8 +2028,9 @@ inline bool xmitframe_hiq_filter(struct xmit_frame *xmitframe)
} else if (registry->hiq_filter == RTW_HIQ_FILTER_ALLOW_ALL)
allow = true;
else if (registry->hiq_filter == RTW_HIQ_FILTER_DENY_ALL) {
} else
rtw_warn_on(1);
} else {
WARN_ON(1);
}
return allow;
}
@@ -2054,7 +2045,7 @@ signed int xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct x
signed int bmcst = is_multicast_ether_addr(pattrib->ra);
bool update_tim = false;
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == false)
if (!check_fwstate(pmlmepriv, WIFI_AP_STATE))
return ret;
psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra);
if (pattrib->psta != psta)

105
drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c
View File

@@ -235,8 +235,6 @@ static void halbtc8723b1ant_LimitedRx(
pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
/* real update aggregation setting */
pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
}
static void halbtc8723b1ant_QueryBtInfo(struct btc_coexist *pBtCoexist)
@@ -245,7 +243,7 @@ static void halbtc8723b1ant_QueryBtInfo(struct btc_coexist *pBtCoexist)
pCoexSta->bC2hBtInfoReqSent = true;
H2C_Parameter[0] |= BIT0; /* trigger */
H2C_Parameter[0] |= BIT(0); /* trigger */
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
}
@@ -298,7 +296,6 @@ static void halbtc8723b1ant_MonitorBtCtr(struct btc_coexist *pBtCoexist)
}
}
static void halbtc8723b1ant_MonitorWiFiCtr(struct btc_coexist *pBtCoexist)
{
s32 wifiRssi = 0;
@@ -333,7 +330,6 @@ static void halbtc8723b1ant_MonitorWiFiCtr(struct btc_coexist *pBtCoexist)
pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba);
}
/* reset counter */
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1);
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0);
@@ -381,8 +377,6 @@ static void halbtc8723b1ant_MonitorWiFiCtr(struct btc_coexist *pBtCoexist)
}
pCoexSta->bPreCCKLock = pCoexSta->bCCKLock;
}
static bool halbtc8723b1ant_IsWifiStatusChanged(struct btc_coexist *pBtCoexist)
@@ -602,7 +596,7 @@ static void halbtc8723b1ant_SetSwPenaltyTxRateAdaptive(
H2C_Parameter[0] = 0x6; /* opCode, 0x6 = Retry_Penalty */
if (bLowPenaltyRa) {
H2C_Parameter[1] |= BIT0;
H2C_Parameter[1] |= BIT(0);
H2C_Parameter[2] = 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
H2C_Parameter[3] = 0xf7; /* MCS7 or OFDM54 */
H2C_Parameter[4] = 0xf8; /* MCS6 or OFDM48 */
@@ -709,7 +703,7 @@ static void halbtc8723b1ant_SetFwIgnoreWlanAct(
u8 H2C_Parameter[1] = {0};
if (bEnable)
H2C_Parameter[0] |= BIT0; /* function enable */
H2C_Parameter[0] |= BIT(0); /* function enable */
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
}
@@ -793,8 +787,9 @@ static void halbtc8723b1ant_SetAntPath(
/* Use H2C to set GNT_BT to HIGH */
H2C_Parameter[0] = 1;
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
} else /* set grant_bt to high */
} else { /* set grant_bt to high */
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
}
/* set wlan_act control by PTA */
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
@@ -810,8 +805,9 @@ static void halbtc8723b1ant_SetAntPath(
/* Use H2C to set GNT_BT to HIGH */
H2C_Parameter[0] = 1;
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
} else /* set grant_bt to high */
} else { /* set grant_bt to high */
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
}
/* set wlan_act to always low */
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
@@ -824,8 +820,8 @@ static void halbtc8723b1ant_SetAntPath(
/* 0x4c[24:23]= 00, Set Antenna control by BT_RFE_CTRL BT Vendor 0xac = 0xf002 */
u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
u4Tmp &= ~BIT23;
u4Tmp &= ~BIT24;
u4Tmp &= ~BIT(23);
u4Tmp &= ~BIT(24);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
} else {
/* Use H2C to set GNT_BT to LOW */
@@ -840,7 +836,7 @@ static void halbtc8723b1ant_SetAntPath(
u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49d);
cntBtCalChk++;
if (u1Tmp & BIT0)
if (u1Tmp & BIT(0))
mdelay(50);
else
break;
@@ -859,8 +855,8 @@ static void halbtc8723b1ant_SetAntPath(
if (bInitHwCfg) {
/* 0x4c[23]= 0, 0x4c[24]= 1 Antenna control by WL/BT */
u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
u4Tmp &= ~BIT23;
u4Tmp |= BIT24;
u4Tmp &= ~BIT(23);
u4Tmp |= BIT(24);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); /* fixed internal switch S1->WiFi, S0->BT */
@@ -878,7 +874,6 @@ static void halbtc8723b1ant_SetAntPath(
}
}
/* ext switch setting */
switch (antPosType) {
case BTC_ANT_PATH_WIFI:
@@ -906,8 +901,8 @@ static void halbtc8723b1ant_SetAntPath(
if (bInitHwCfg) {
/* 0x4c[23]= 1, 0x4c[24]= 0 Antenna control by 0x64 */
u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
u4Tmp |= BIT23;
u4Tmp &= ~BIT24;
u4Tmp |= BIT(23);
u4Tmp &= ~BIT(24);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
/* Fix Ext switch Main->S1, Aux->S0 */
@@ -928,7 +923,6 @@ static void halbtc8723b1ant_SetAntPath(
}
}
/* internal switch setting */
switch (antPosType) {
case BTC_ANT_PATH_WIFI:
@@ -965,12 +959,12 @@ static void halbtc8723b1ant_SetFwPstdma(
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable);
if (bApEnable) {
if (byte1 & BIT4 && !(byte1 & BIT5)) {
realByte1 &= ~BIT4;
realByte1 |= BIT5;
if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
realByte1 &= ~BIT(4);
realByte1 |= BIT(5);
realByte5 |= BIT5;
realByte5 &= ~BIT6;
realByte5 |= BIT(5);
realByte5 &= ~BIT(6);
}
}
@@ -989,7 +983,6 @@ static void halbtc8723b1ant_SetFwPstdma(
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
}
static void halbtc8723b1ant_PsTdma(
struct btc_coexist *pBtCoexist, bool bForceExec, bool bTurnOn, u8 type
)
@@ -1027,12 +1020,10 @@ static void halbtc8723b1ant_PsTdma(
psTdmaByte4Val = 0x10; /* 0x778 = d/1 toggle */
}
if (bTurnOn) {
if (pBtLinkInfo->bSlaveRole)
psTdmaByte4Val = psTdmaByte4Val | 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
switch (type) {
default:
halbtc8723b1ant_SetFwPstdma(
@@ -1318,7 +1309,6 @@ static bool halbtc8723b1ant_IsCommonAction(struct btc_coexist *pBtCoexist)
return bCommon;
}
static void halbtc8723b1ant_TdmaDurationAdjustForAcl(
struct btc_coexist *pBtCoexist, u8 wifiStatus
)
@@ -1485,12 +1475,13 @@ static void halbtc8723b1ant_PsTdmaCheckForPowerSaveState(
if (lpsMode) { /* already under LPS state */
if (bNewPsState) {
/* keep state under LPS, do nothing. */
} else /* will leave LPS state, turn off psTdma first */
} else { /* will leave LPS state, turn off psTdma first */
halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 0);
}
} else { /* NO PS state */
if (bNewPsState) /* will enter LPS state, turn off psTdma first */
if (bNewPsState) { /* will enter LPS state, turn off psTdma first */
halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 0);
else {
} else {
/* keep state under NO PS state, do nothing. */
}
}
@@ -1855,8 +1846,9 @@ static void halbtc8723b1ant_ActionWifiConnected(struct btc_coexist *pBtCoexist)
halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
else
halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
} else
} else {
halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
}
/* tdma and coex table */
if (!bWifiBusy) {
@@ -1914,40 +1906,6 @@ static void halbtc8723b1ant_RunSwCoexistMechanism(struct btc_coexist *pBtCoexist
if (halbtc8723b1ant_IsCommonAction(pBtCoexist)) {
} else {
switch (pCoexDm->curAlgorithm) {
case BT_8723B_1ANT_COEX_ALGO_SCO:
/* halbtc8723b1ant_ActionSco(pBtCoexist); */
break;
case BT_8723B_1ANT_COEX_ALGO_HID:
/* halbtc8723b1ant_ActionHid(pBtCoexist); */
break;
case BT_8723B_1ANT_COEX_ALGO_A2DP:
/* halbtc8723b1ant_ActionA2dp(pBtCoexist); */
break;
case BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS:
/* halbtc8723b1ant_ActionA2dpPanHs(pBtCoexist); */
break;
case BT_8723B_1ANT_COEX_ALGO_PANEDR:
/* halbtc8723b1ant_ActionPanEdr(pBtCoexist); */
break;
case BT_8723B_1ANT_COEX_ALGO_PANHS:
/* halbtc8723b1ant_ActionPanHs(pBtCoexist); */
break;
case BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP:
/* halbtc8723b1ant_ActionPanEdrA2dp(pBtCoexist); */
break;
case BT_8723B_1ANT_COEX_ALGO_PANEDR_HID:
/* halbtc8723b1ant_ActionPanEdrHid(pBtCoexist); */
break;
case BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR:
/* halbtc8723b1ant_ActionHidA2dpPanEdr(pBtCoexist); */
break;
case BT_8723B_1ANT_COEX_ALGO_HID_A2DP:
/* halbtc8723b1ant_ActionHidA2dp(pBtCoexist); */
break;
default:
break;
}
pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
}
}
@@ -2037,7 +1995,6 @@ static void halbtc8723b1ant_RunCoexistMechanism(struct btc_coexist *pBtCoexist)
return;
}
if (!bWifiConnected) {
bool bScan = false, bLink = false, bRoam = false;
@@ -2052,8 +2009,9 @@ static void halbtc8723b1ant_RunCoexistMechanism(struct btc_coexist *pBtCoexist)
halbtc8723b1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist);
} else
halbtc8723b1ant_ActionWifiNotConnected(pBtCoexist);
} else /* wifi LPS/Busy */
} else { /* wifi LPS/Busy */
halbtc8723b1ant_ActionWifiConnected(pBtCoexist);
}
}
static void halbtc8723b1ant_InitCoexDm(struct btc_coexist *pBtCoexist)
@@ -2088,8 +2046,9 @@ static void halbtc8723b1ant_InitHwConfig(
if (bWifiOnly) {
halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_WIFI, true, false);
halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, false, 9);
} else
} else {
halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, true, false);
}
/* PTA parameter */
halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0);
@@ -2115,7 +2074,7 @@ void EXhalbtc8723b1ant_PowerOnSetting(struct btc_coexist *pBtCoexist)
/* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2);
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp | BIT0 | BIT1);
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp | BIT(0) | BIT(1));
/* set GRAN_BT = 1 */
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
@@ -2494,7 +2453,7 @@ void EXhalbtc8723b1ant_BtInfoNotify(
/* Here we need to resend some wifi info to BT */
/* because bt is reset and loss of the info. */
if (pCoexSta->btInfoExt & BIT1) {
if (pCoexSta->btInfoExt & BIT(1)) {
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
if (bWifiConnected)
EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT);
@@ -2502,7 +2461,7 @@ void EXhalbtc8723b1ant_BtInfoNotify(
EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
}
if (pCoexSta->btInfoExt & BIT3) {
if (pCoexSta->btInfoExt & BIT(3)) {
if (!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm)
halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, false);
} else {

18
drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.h
View File

@@ -5,17 +5,17 @@
*
******************************************************************************/
/* The following is for 8723B 1ANT BT Co-exist definition */
#define BT_INFO_8723B_1ANT_B_FTP BIT7
#define BT_INFO_8723B_1ANT_B_A2DP BIT6
#define BT_INFO_8723B_1ANT_B_HID BIT5
#define BT_INFO_8723B_1ANT_B_SCO_BUSY BIT4
#define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT3
#define BT_INFO_8723B_1ANT_B_INQ_PAGE BIT2
#define BT_INFO_8723B_1ANT_B_SCO_ESCO BIT1
#define BT_INFO_8723B_1ANT_B_CONNECTION BIT0
#define BT_INFO_8723B_1ANT_B_FTP BIT(7)
#define BT_INFO_8723B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8723B_1ANT_B_HID BIT(5)
#define BT_INFO_8723B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_ & BIT0)) ? true : false)
(((_BT_INFO_EXT_ & BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2

32
drivers/staging/rtl8723bs/hal/HalBtc8723b2Ant.c
View File

@@ -185,7 +185,7 @@ static void halbtc8723b2ant_QueryBtInfo(struct btc_coexist *pBtCoexist)
pCoexSta->bC2hBtInfoReqSent = true;
H2C_Parameter[0] |= BIT0; /* trigger */
H2C_Parameter[0] |= BIT(0); /* trigger */
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
}
@@ -294,9 +294,8 @@ static u8 halbtc8723b2ant_ActionAlgorithm(struct btc_coexist *pBtCoexist)
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
if (!pBtLinkInfo->bBtLinkExist) {
if (!pBtLinkInfo->bBtLinkExist)
return algorithm;
}
if (pBtLinkInfo->bScoExist)
numOfDiffProfile++;
@@ -510,7 +509,7 @@ static void halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(
H2C_Parameter[0] = 0x6; /* opCode, 0x6 = Retry_Penalty */
if (bLowPenaltyRa) {
H2C_Parameter[1] |= BIT0;
H2C_Parameter[1] |= BIT(0);
H2C_Parameter[2] = 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
H2C_Parameter[3] = 0xf7; /* MCS7 or OFDM54 */
H2C_Parameter[4] = 0xf8; /* MCS6 or OFDM48 */
@@ -553,7 +552,6 @@ static void halbtc8723b2ant_SetSwFullTimeDacSwing(
halbtc8723b2ant_SetDacSwingReg(pBtCoexist, 0x18);
}
static void halbtc8723b2ant_DacSwing(
struct btc_coexist *pBtCoexist,
bool bForceExec,
@@ -601,7 +599,6 @@ static void halbtc8723b2ant_SetAgcTable(
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001);
}
/* RF Gain */
pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
if (bAgcTableEn) {
@@ -749,7 +746,7 @@ static void halbtc8723b2ant_SetFwIgnoreWlanAct(
u8 H2C_Parameter[1] = {0};
if (bEnable)
H2C_Parameter[0] |= BIT0; /* function enable */
H2C_Parameter[0] |= BIT(0); /* function enable */
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
}
@@ -878,8 +875,8 @@ static void halbtc8723b2ant_SetAntPath(
if (bInitHwCfg) {
/* 0x4c[23]= 0, 0x4c[24]= 1 Antenna control by WL/BT */
u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
u4Tmp &= ~BIT23;
u4Tmp |= BIT24;
u4Tmp &= ~BIT(23);
u4Tmp |= BIT(24);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
}
@@ -896,8 +893,8 @@ static void halbtc8723b2ant_SetAntPath(
if (bInitHwCfg) {
/* 0x4c[23]= 0, 0x4c[24]= 1 Antenna control by WL/BT */
u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
u4Tmp |= BIT23;
u4Tmp &= ~BIT24;
u4Tmp |= BIT(23);
u4Tmp &= ~BIT(24);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
}
@@ -1638,7 +1635,6 @@ static void halbtc8723b2ant_ActionSco(struct btc_coexist *pBtCoexist)
}
}
static void halbtc8723b2ant_ActionHid(struct btc_coexist *pBtCoexist)
{
u8 wifiRssiState, btRssiState;
@@ -1886,7 +1882,6 @@ static void halbtc8723b2ant_ActionPanEdr(struct btc_coexist *pBtCoexist)
}
}
/* PAN(HS) only */
static void halbtc8723b2ant_ActionPanHs(struct btc_coexist *pBtCoexist)
{
@@ -2211,7 +2206,7 @@ static void halbtc8723b2ant_RunCoexistMechanism(struct btc_coexist *pBtCoexist)
}
algorithm = halbtc8723b2ant_ActionAlgorithm(pBtCoexist);
if (pCoexSta->bC2hBtInquiryPage && (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) {
if (pCoexSta->bC2hBtInquiryPage && (algorithm != BT_8723B_2ANT_COEX_ALGO_PANHS)) {
halbtc8723b2ant_ActionBtInquiry(pBtCoexist);
return;
} else {
@@ -2230,7 +2225,6 @@ static void halbtc8723b2ant_RunCoexistMechanism(struct btc_coexist *pBtCoexist)
pCoexDm->bAutoTdmaAdjust = false;
}
switch (pCoexDm->curAlgorithm) {
case BT_8723B_2ANT_COEX_ALGO_SCO:
halbtc8723b2ant_ActionSco(pBtCoexist);
@@ -2337,7 +2331,7 @@ void EXhalbtc8723b2ant_PowerOnSetting(struct btc_coexist *pBtCoexist)
/* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2);
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp | BIT0 | BIT1);
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp | BIT(0) | BIT(1));
/* set GRAN_BT = 1 */
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
@@ -2490,7 +2484,7 @@ void EXhalbtc8723b2ant_BtInfoNotify(
return;
}
if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rspSource) {
if (rspSource != BT_INFO_SRC_8723B_2ANT_WIFI_FW) {
pCoexSta->btRetryCnt = pCoexSta->btInfoC2h[rspSource][2] & 0xf; /* [3:0] */
pCoexSta->btRssi = pCoexSta->btInfoC2h[rspSource][3] * 2 + 10;
@@ -2506,7 +2500,7 @@ void EXhalbtc8723b2ant_BtInfoNotify(
/* Here we need to resend some wifi info to BT */
/* because bt is reset and loss of the info. */
if ((pCoexSta->btInfoExt & BIT1)) {
if ((pCoexSta->btInfoExt & BIT(1))) {
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
if (bWifiConnected)
@@ -2515,7 +2509,7 @@ void EXhalbtc8723b2ant_BtInfoNotify(
EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
}
if ((pCoexSta->btInfoExt & BIT3)) {
if ((pCoexSta->btInfoExt & BIT(3))) {
halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, false);
} else {
/* BT already NOT ignore Wlan active, do nothing here. */

16
drivers/staging/rtl8723bs/hal/HalBtc8723b2Ant.h
View File

@@ -5,14 +5,14 @@
*
******************************************************************************/
/* The following is for 8723B 2Ant BT Co-exist definition */
#define BT_INFO_8723B_2ANT_B_FTP BIT7
#define BT_INFO_8723B_2ANT_B_A2DP BIT6
#define BT_INFO_8723B_2ANT_B_HID BIT5
#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT4
#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT3
#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT2
#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT1
#define BT_INFO_8723B_2ANT_B_CONNECTION BIT0
#define BT_INFO_8723B_2ANT_B_FTP BIT(7)
#define BT_INFO_8723B_2ANT_B_A2DP BIT(6)
#define BT_INFO_8723B_2ANT_B_HID BIT(5)
#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723B_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2

10
drivers/staging/rtl8723bs/hal/HalBtcOutSrc.h
View File

@@ -69,11 +69,11 @@ enum btc_chip_interface {
};
/* following is for wifi link status */
#define WIFI_STA_CONNECTED BIT0
#define WIFI_AP_CONNECTED BIT1
#define WIFI_HS_CONNECTED BIT2
#define WIFI_P2P_GO_CONNECTED BIT3
#define WIFI_P2P_GC_CONNECTED BIT4
#define WIFI_STA_CONNECTED BIT(0)
#define WIFI_AP_CONNECTED BIT(1)
#define WIFI_HS_CONNECTED BIT(2)
#define WIFI_P2P_GO_CONNECTED BIT(3)
#define WIFI_P2P_GC_CONNECTED BIT(4)
struct btc_board_info {
/* The following is some board information */

30
drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c
View File

@@ -11,11 +11,11 @@
static bool CheckPositive(struct dm_odm_t *pDM_Odm, const u32 Condition1, const u32 Condition2)
{
u8 _BoardType =
((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */
((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA */
((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA */
((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */
((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT */
((pDM_Odm->BoardType & BIT(4)) >> 4) << 0 | /* _GLNA */
((pDM_Odm->BoardType & BIT(3)) >> 3) << 1 | /* _GPA */
((pDM_Odm->BoardType & BIT(7)) >> 7) << 2 | /* _ALNA */
((pDM_Odm->BoardType & BIT(6)) >> 6) << 3 | /* _APA */
((pDM_Odm->BoardType & BIT(2)) >> 2) << 4; /* _BT */
u32 cond1 = Condition1, cond2 = Condition2;
u32 driver1 =
@@ -51,13 +51,13 @@ static bool CheckPositive(struct dm_odm_t *pDM_Odm, const u32 Condition1, const
if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE */
return true;
if ((cond1 & BIT0) != 0) /* GLNA */
if ((cond1 & BIT(0)) != 0) /* GLNA */
bitMask |= 0x000000FF;
if ((cond1 & BIT1) != 0) /* GPA */
if ((cond1 & BIT(1)) != 0) /* GPA */
bitMask |= 0x0000FF00;
if ((cond1 & BIT2) != 0) /* ALNA */
if ((cond1 & BIT(2)) != 0) /* ALNA */
bitMask |= 0x00FF0000;
if ((cond1 & BIT3) != 0) /* APA */
if ((cond1 & BIT(3)) != 0) /* APA */
bitMask |= 0xFF000000;
/* BoardType of each RF path is matched */
@@ -223,7 +223,7 @@ void ODM_ReadAndConfig_MP_8723B_AGC_TAB(struct dm_odm_t *pDM_Odm)
} else {
/* This line is the beginning of branch. */
bool bMatched = true;
u8 cCond = (u8)((v1 & (BIT29 | BIT28)) >> 28);
u8 cCond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
if (cCond == COND_ELSE) { /* ELSE, ENDIF */
bMatched = true;
@@ -255,10 +255,10 @@ void ODM_ReadAndConfig_MP_8723B_AGC_TAB(struct dm_odm_t *pDM_Odm)
}
/* Keeps reading until ENDIF. */
cCond = (u8)((v1 & (BIT29 | BIT28)) >> 28);
cCond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
while (cCond != COND_ENDIF && i < ArrayLen - 2) {
READ_NEXT_PAIR(v1, v2, i);
cCond = (u8)((v1 & (BIT29 | BIT28)) >> 28);
cCond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
}
}
}
@@ -483,7 +483,7 @@ void ODM_ReadAndConfig_MP_8723B_PHY_REG(struct dm_odm_t *pDM_Odm)
} else {
/* This line is the beginning of branch. */
bool bMatched = true;
u8 cCond = (u8)((v1 & (BIT29 | BIT28)) >> 28);
u8 cCond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
if (cCond == COND_ELSE) { /* ELSE, ENDIF */
bMatched = true;
@@ -514,10 +514,10 @@ void ODM_ReadAndConfig_MP_8723B_PHY_REG(struct dm_odm_t *pDM_Odm)
}
/* Keeps reading until ENDIF. */
cCond = (u8)((v1 & (BIT29 | BIT28)) >> 28);
cCond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
while (cCond != COND_ENDIF && i < ArrayLen - 2) {
READ_NEXT_PAIR(v1, v2, i);
cCond = (u8)((v1 & (BIT29 | BIT28)) >> 28);
cCond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
}
}
}

24
drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c
View File

@@ -11,11 +11,11 @@
static bool CheckPositive(struct dm_odm_t *pDM_Odm, const u32 Condition1, const u32 Condition2)
{
u8 _BoardType =
((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */
((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA */
((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA */
((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */
((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT */
((pDM_Odm->BoardType & BIT(4)) >> 4) << 0 | /* _GLNA */
((pDM_Odm->BoardType & BIT(3)) >> 3) << 1 | /* _GPA */
((pDM_Odm->BoardType & BIT(7)) >> 7) << 2 | /* _ALNA */
((pDM_Odm->BoardType & BIT(6)) >> 6) << 3 | /* _APA */
((pDM_Odm->BoardType & BIT(2)) >> 2) << 4; /* _BT */
u32 cond1 = Condition1, cond2 = Condition2;
u32 driver1 =
@@ -51,13 +51,13 @@ static bool CheckPositive(struct dm_odm_t *pDM_Odm, const u32 Condition1, const
if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE */
return true;
if ((cond1 & BIT0) != 0) /* GLNA */
if ((cond1 & BIT(0)) != 0) /* GLNA */
bitMask |= 0x000000FF;
if ((cond1 & BIT1) != 0) /* GPA */
if ((cond1 & BIT(1)) != 0) /* GPA */
bitMask |= 0x0000FF00;
if ((cond1 & BIT2) != 0) /* ALNA */
if ((cond1 & BIT(2)) != 0) /* ALNA */
bitMask |= 0x00FF0000;
if ((cond1 & BIT3) != 0) /* APA */
if ((cond1 & BIT(3)) != 0) /* APA */
bitMask |= 0xFF000000;
/* BoardType of each RF path is matched */
@@ -195,7 +195,7 @@ void ODM_ReadAndConfig_MP_8723B_MAC_REG(struct dm_odm_t *pDM_Odm)
} else {
/* This line is the beginning of branch. */
bool bMatched = true;
u8 cCond = (u8)((v1 & (BIT29 | BIT28)) >> 28);
u8 cCond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
if (cCond == COND_ELSE) { /* ELSE, ENDIF */
bMatched = true;
@@ -226,10 +226,10 @@ void ODM_ReadAndConfig_MP_8723B_MAC_REG(struct dm_odm_t *pDM_Odm)
}
/* Keeps reading until ENDIF. */
cCond = (u8)((v1 & (BIT29 | BIT28)) >> 28);
cCond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
while (cCond != COND_ENDIF && i < ArrayLen - 2) {
READ_NEXT_PAIR(v1, v2, i);
cCond = (u8)((v1 & (BIT29 | BIT28)) >> 28);
cCond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
}
}
}

13
drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.h
View File

@@ -1,17 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __INC_MP_MAC_HW_IMG_8723B_H
#define __INC_MP_MAC_HW_IMG_8723B_H
/******************************************************************************
* MAC_REG.TXT
******************************************************************************/
* MAC_REG.TXT
******************************************************************************/
void
ODM_ReadAndConfig_MP_8723B_MAC_REG(/* TC: Test Chip, MP: MP Chip */

25
drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c
View File

@@ -13,11 +13,11 @@ static bool CheckPositive(
)
{
u8 _BoardType =
((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */
((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA */
((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA */
((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */
((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT */
((pDM_Odm->BoardType & BIT(4)) >> 4) << 0 | /* _GLNA */
((pDM_Odm->BoardType & BIT(3)) >> 3) << 1 | /* _GPA */
((pDM_Odm->BoardType & BIT(7)) >> 7) << 2 | /* _ALNA */
((pDM_Odm->BoardType & BIT(6)) >> 6) << 3 | /* _APA */
((pDM_Odm->BoardType & BIT(2)) >> 2) << 4; /* _BT */
u32 cond1 = Condition1, cond2 = Condition2;
u32 driver1 =
@@ -59,13 +59,13 @@ static bool CheckPositive(
if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE */
return true;
if ((cond1 & BIT0) != 0) /* GLNA */
if ((cond1 & BIT(0)) != 0) /* GLNA */
bitMask |= 0x000000FF;
if ((cond1 & BIT1) != 0) /* GPA */
if ((cond1 & BIT(1)) != 0) /* GPA */
bitMask |= 0x0000FF00;
if ((cond1 & BIT2) != 0) /* ALNA */
if ((cond1 & BIT(2)) != 0) /* ALNA */
bitMask |= 0x00FF0000;
if ((cond1 & BIT3) != 0) /* APA */
if ((cond1 & BIT(3)) != 0) /* APA */
bitMask |= 0xFF000000;
/* BoardType of each RF path is matched */
@@ -227,7 +227,7 @@ void ODM_ReadAndConfig_MP_8723B_RadioA(struct dm_odm_t *pDM_Odm)
} else {
/* This line is the beginning of branch. */
bool bMatched = true;
u8 cCond = (u8)((v1 & (BIT29|BIT28)) >> 28);
u8 cCond = (u8)((v1 & (BIT(29)|BIT(28))) >> 28);
if (cCond == COND_ELSE) { /* ELSE, ENDIF */
bMatched = true;
@@ -259,10 +259,10 @@ void ODM_ReadAndConfig_MP_8723B_RadioA(struct dm_odm_t *pDM_Odm)
}
/* Keeps reading until ENDIF. */
cCond = (u8)((v1 & (BIT29|BIT28)) >> 28);
cCond = (u8)((v1 & (BIT(29)|BIT(28))) >> 28);
while (cCond != COND_ENDIF && i < ArrayLen-2) {
READ_NEXT_PAIR(v1, v2, i);
cCond = (u8)((v1 & (BIT29|BIT28)) >> 28);
cCond = (u8)((v1 & (BIT(29)|BIT(28))) >> 28);
}
}
}
@@ -310,7 +310,6 @@ void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO(struct dm_odm_t *pDM_Odm)
{
struct odm_rf_cal_t *pRFCalibrateInfo = &pDM_Odm->RFCalibrateInfo;
memcpy(
pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P,
gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8723B,

21
drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.h
View File

@@ -1,17 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __INC_MP_RF_HW_IMG_8723B_H
#define __INC_MP_RF_HW_IMG_8723B_H
/******************************************************************************
* RadioA.TXT
******************************************************************************/
* RadioA.TXT
******************************************************************************/
void
ODM_ReadAndConfig_MP_8723B_RadioA(/* TC: Test Chip, MP: MP Chip */
@@ -19,8 +18,8 @@ ODM_ReadAndConfig_MP_8723B_RadioA(/* TC: Test Chip, MP: MP Chip */
);
/******************************************************************************
* TxPowerTrack_SDIO.TXT
******************************************************************************/
* TxPowerTrack_SDIO.TXT
******************************************************************************/
void
ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO(/* TC: Test Chip, MP: MP Chip */
@@ -29,8 +28,8 @@ ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO(/* TC: Test Chip, MP: MP Chip */
u32 ODM_GetVersion_MP_8723B_TxPowerTrack_SDIO(void);
/******************************************************************************
* TXPWR_LMT.TXT
******************************************************************************/
* TXPWR_LMT.TXT
******************************************************************************/
void
ODM_ReadAndConfig_MP_8723B_TXPWR_LMT(/* TC: Test Chip, MP: MP Chip */

1
drivers/staging/rtl8723bs/hal/HalPhyRf.c
View File

@@ -70,7 +70,6 @@ void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter)
struct txpwrtrack_cfg c;
/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
u8 *deltaSwingTableIdx_TUP_A;
u8 *deltaSwingTableIdx_TDOWN_A;

1
drivers/staging/rtl8723bs/hal/HalPhyRf.h
View File

@@ -32,7 +32,6 @@ struct txpwrtrack_cfg {
void ConfigureTxpowerTrack(struct dm_odm_t *pDM_Odm, struct txpwrtrack_cfg *pConfig);
void ODM_ClearTxPowerTrackingState(struct dm_odm_t *pDM_Odm);
void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter);

59
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
View File

@@ -39,7 +39,6 @@ static u8 DeltaSwingTableIdx_2GA_P_8188E[] = {
/* 3 Tx Power Tracking */
/* 3 ============================================================ */
static void setIqkMatrix_8723B(
struct dm_odm_t *pDM_Odm,
u8 OFDM_index,
@@ -79,7 +78,7 @@ static void setIqkMatrix_8723B(
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
value32 = ((IqkResult_X * ele_D)>>7)&0x01;
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, value32);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(24), value32);
break;
case RF_PATH_B:
/* write new elements A, C, D to regC88 and regC9C,
@@ -92,7 +91,7 @@ static void setIqkMatrix_8723B(
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
value32 = ((IqkResult_X * ele_D)>>7)&0x01;
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT28, value32);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(28), value32);
break;
default:
@@ -103,13 +102,13 @@ static void setIqkMatrix_8723B(
case RF_PATH_A:
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, 0x00);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(24), 0x00);
break;
case RF_PATH_B:
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT28, 0x00);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(28), 0x00);
break;
default:
@@ -118,7 +117,6 @@ static void setIqkMatrix_8723B(
}
}
static void setCCKFilterCoefficient(struct dm_odm_t *pDM_Odm, u8 CCKSwingIndex)
{
u8 (*swingtable)[8];
@@ -148,7 +146,8 @@ static void setCCKFilterCoefficient(struct dm_odm_t *pDM_Odm, u8 CCKSwingIndex)
*When Who Remark
*04/23/2012 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
*---------------------------------------------------------------------------
*/
void ODM_TxPwrTrackSetPwr_8723B(
struct dm_odm_t *pDM_Odm,
enum pwrtrack_method Method,
@@ -301,7 +300,7 @@ static void GetDeltaSwingTable_8723B(
u16 rate = *(pDM_Odm->pForcedDataRate);
u8 channel = pHalData->CurrentChannel;
if (1 <= channel && channel <= 14) {
if (channel >= 1 && channel <= 14) {
if (IS_CCK_RATE(rate)) {
*TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P;
*TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N;
@@ -321,7 +320,6 @@ static void GetDeltaSwingTable_8723B(
}
}
void ConfigureTxpowerTrack_8723B(struct txpwrtrack_cfg *pConfig)
{
pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE;
@@ -413,20 +411,18 @@ static u8 phy_PathA_IQK_8723B(
/* leave IQK mode */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
/* Check failed */
regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord);
regE94 = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord);
regE9C = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord);
/* Allen 20131125 */
tmp = (regE9C & 0x03FF0000)>>16;
if ((tmp & 0x200) > 0)
tmp = 0x400 - tmp;
if (
!(regEAC & BIT28) &&
!(regEAC & BIT(28)) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42) &&
(((regE94 & 0x03FF0000)>>16) < 0x110) &&
@@ -525,7 +521,7 @@ static u8 phy_PathA_RxIQK8723B(
tmp = 0x400 - tmp;
if (
!(regEAC & BIT28) &&
!(regEAC & BIT(28)) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42) &&
(((regE94 & 0x03FF0000)>>16) < 0x110) &&
@@ -552,7 +548,6 @@ static u8 phy_PathA_RxIQK8723B(
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80);
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x55, bRFRegOffsetMask, 0x4021f);
/* IQK setting */
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
@@ -616,7 +611,7 @@ static u8 phy_PathA_RxIQK8723B(
tmp = 0x400 - tmp;
if (
!(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */
!(regEAC & BIT(27)) && /* if Tx is OK, check whether Rx is OK */
(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
(((regEAC & 0x03FF0000)>>16) != 0x36) &&
(((regEA4 & 0x03FF0000)>>16) < 0x110) &&
@@ -651,8 +646,6 @@ static u8 phy_PathB_IQK_8723B(struct adapter *padapter)
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1);
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fc1);
/* 1 Tx IQK */
/* IQK setting */
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
@@ -709,7 +702,7 @@ static u8 phy_PathB_IQK_8723B(struct adapter *padapter)
tmp = 0x400 - tmp;
if (
!(regEAC & BIT28) &&
!(regEAC & BIT(28)) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42) &&
(((regE94 & 0x03FF0000)>>16) < 0x110) &&
@@ -745,12 +738,10 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1);
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fcd);
/* IQK setting */
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, 0x01007c00);
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
/* path-B IQK setting */
PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK_Tone_A, bMaskDWord, 0x18008c1c);
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x38008c1c);
@@ -780,7 +771,6 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
PHY_SetBBReg(pDM_Odm->Adapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
/* delay x ms */
/* PlatformStallExecution(IQK_DELAY_TIME_88E*1000); */
mdelay(IQK_DELAY_TIME_8723B);
@@ -804,7 +794,7 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
tmp = 0x400 - tmp;
if (
!(regEAC & BIT28) &&
!(regEAC & BIT(28)) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42) &&
(((regE94 & 0x03FF0000)>>16) < 0x110) &&
@@ -888,15 +878,13 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, 0xffffff00, 0x00000000); */
/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, 0xdf, bRFRegOffsetMask, 0x180); */
/* Allen 20131125 */
tmp = (regEAC & 0x03FF0000)>>16;
if ((tmp & 0x200) > 0)
tmp = 0x400 - tmp;
if (
!(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */
!(regEAC & BIT(27)) && /* if Tx is OK, check whether Rx is OK */
(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
(((regEAC & 0x03FF0000)>>16) != 0x36) &&
(((regEA4 & 0x03FF0000)>>16) < 0x110) &&
@@ -1113,7 +1101,6 @@ static void _PHY_SaveADDARegisters8723B(
}
}
static void _PHY_SaveMACRegisters8723B(
struct adapter *padapter, u32 *MACReg, u32 *MACBackup
)
@@ -1129,7 +1116,6 @@ static void _PHY_SaveMACRegisters8723B(
}
static void _PHY_ReloadADDARegisters8723B(
struct adapter *padapter,
u32 *ADDAReg,
@@ -1158,7 +1144,6 @@ static void _PHY_ReloadMACRegisters8723B(
rtw_write32(padapter, MACReg[i], MACBackup[i]);
}
static void _PHY_PathADDAOn8723B(
struct adapter *padapter,
u32 *ADDAReg,
@@ -1195,9 +1180,9 @@ static void _PHY_MACSettingCalibration8723B(
rtw_write8(pDM_Odm->Adapter, MACReg[i], 0x3F);
for (i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++) {
rtw_write8(pDM_Odm->Adapter, MACReg[i], (u8)(MACBackup[i]&(~BIT3)));
rtw_write8(pDM_Odm->Adapter, MACReg[i], (u8)(MACBackup[i]&(~BIT(3))));
}
rtw_write8(pDM_Odm->Adapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5)));
rtw_write8(pDM_Odm->Adapter, MACReg[i], (u8)(MACBackup[i]&(~BIT(5))));
}
@@ -1282,8 +1267,6 @@ static bool phy_SimularityCompare_8723B(
}
}
static void phy_IQCalibrate_8723B(
struct adapter *padapter,
s32 result[][8],
@@ -1369,13 +1352,11 @@ static void phy_IQCalibrate_8723B(
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); */
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); */
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); */
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); */
/* RX IQ calibration setting for 8723B D cut large current issue when leaving IPS */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
@@ -1415,9 +1396,6 @@ static void phy_IQCalibrate_8723B(
}
}
if (0x00 == PathAOK) {
}
/* path B IQK */
if (is2T) {
@@ -1483,7 +1461,6 @@ static void phy_IQCalibrate_8723B(
}
static void phy_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm, bool is2T)
{
u8 tmpReg;
@@ -1592,7 +1569,6 @@ void PHY_IQCalibrate_8723B(
if (pDM_Odm->RFCalibrateInfo.bIQKInProgress)
return;
pDM_Odm->RFCalibrateInfo.bIQKInProgress = true;
if (bRestore) {
@@ -1650,7 +1626,6 @@ void PHY_IQCalibrate_8723B(
/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT12, 0x0); */
/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT11, 0x1); */
for (i = 0; i < 8; i++) {
result[0][i] = 0;
result[1][i] = 0;
@@ -1665,7 +1640,6 @@ void PHY_IQCalibrate_8723B(
is23simular = false;
is13simular = false;
for (i = 0; i < 3; i++) {
phy_IQCalibrate_8723B(padapter, result, i, Is2ant, RF_Path);
@@ -1768,7 +1742,6 @@ void PHY_IQCalibrate_8723B(
pDM_Odm->RFCalibrateInfo.bIQKInProgress = false;
}
void PHY_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm)
{
bool bSingleTone = false, bCarrierSuppression = false;
@@ -1788,9 +1761,7 @@ void PHY_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm)
pDM_Odm->RFCalibrateInfo.bLCKInProgress = true;
phy_LCCalibrate_8723B(pDM_Odm, false);
pDM_Odm->RFCalibrateInfo.bLCKInProgress = false;
}

2
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.h
View File

@@ -15,7 +15,6 @@
#define AVG_THERMAL_NUM_8723B 4
#define RF_T_METER_8723B 0x42 /* */
void ConfigureTxpowerTrack_8723B(struct txpwrtrack_cfg *pConfig);
void ODM_TxPwrTrackSetPwr_8723B(
@@ -46,7 +45,6 @@ void PHY_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm);
/* */
void PHY_DigitalPredistortion_8723B(struct adapter *padapter);
void _PHY_SaveADDARegisters_8723B(
struct adapter *padapter,
u32 *ADDAReg,

1
drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c
View File

@@ -23,7 +23,6 @@ Major Change History:
#include <drv_types.h>
#include <HalPwrSeqCmd.h>
/* */
/* Description: */
/* This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC. */

52
drivers/staging/rtl8723bs/hal/hal_btcoex.c
View File

@@ -30,26 +30,24 @@ static void halbtcoutsrc_LeaveLps(struct btc_coexist *pBtCoexist)
{
struct adapter *padapter;
padapter = pBtCoexist->Adapter;
pBtCoexist->btInfo.bBtCtrlLps = true;
pBtCoexist->btInfo.bBtLpsOn = false;
rtw_btcoex_LPS_Leave(padapter);
rtw_btcoex_lps_leave(padapter);
}
static void halbtcoutsrc_EnterLps(struct btc_coexist *pBtCoexist)
{
struct adapter *padapter;
padapter = pBtCoexist->Adapter;
pBtCoexist->btInfo.bBtCtrlLps = true;
pBtCoexist->btInfo.bBtLpsOn = true;
rtw_btcoex_LPS_Enter(padapter);
rtw_btcoex_lps_enter(padapter);
}
static void halbtcoutsrc_NormalLps(struct btc_coexist *pBtCoexist)
@@ -60,7 +58,7 @@ static void halbtcoutsrc_NormalLps(struct btc_coexist *pBtCoexist)
if (pBtCoexist->btInfo.bBtCtrlLps) {
pBtCoexist->btInfo.bBtLpsOn = false;
rtw_btcoex_LPS_Leave(padapter);
rtw_btcoex_lps_leave(padapter);
pBtCoexist->btInfo.bBtCtrlLps = false;
/* recover the LPS state to the original */
@@ -79,7 +77,6 @@ static void halbtcoutsrc_LeaveLowPower(struct btc_coexist *pBtCoexist)
unsigned long utime;
u32 timeout; /* unit: ms */
padapter = pBtCoexist->Adapter;
ready = _FAIL;
#ifdef LPS_RPWM_WAIT_MS
@@ -110,7 +107,6 @@ static void halbtcoutsrc_NormalLowPower(struct btc_coexist *pBtCoexist)
{
struct adapter *padapter;
padapter = pBtCoexist->Adapter;
rtw_unregister_task_alive(padapter, BTCOEX_ALIVE);
}
@@ -129,12 +125,11 @@ static void halbtcoutsrc_AggregationCheck(struct btc_coexist *pBtCoexist)
struct adapter *padapter;
bool bNeedToAct;
padapter = pBtCoexist->Adapter;
bNeedToAct = false;
if (pBtCoexist->btInfo.bRejectAggPkt) {
rtw_btcoex_RejectApAggregatedPacket(padapter, true);
rtw_btcoex_reject_ap_aggregated_packet(padapter, true);
} else {
if (pBtCoexist->btInfo.bPreBtCtrlAggBufSize !=
pBtCoexist->btInfo.bBtCtrlAggBufSize) {
@@ -151,8 +146,8 @@ static void halbtcoutsrc_AggregationCheck(struct btc_coexist *pBtCoexist)
}
if (bNeedToAct) {
rtw_btcoex_RejectApAggregatedPacket(padapter, true);
rtw_btcoex_RejectApAggregatedPacket(padapter, false);
rtw_btcoex_reject_ap_aggregated_packet(padapter, true);
rtw_btcoex_reject_ap_aggregated_packet(padapter, false);
}
}
}
@@ -161,11 +156,10 @@ static u8 halbtcoutsrc_IsWifiBusy(struct adapter *padapter)
{
struct mlme_priv *pmlmepriv;
pmlmepriv = &padapter->mlmepriv;
if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == true) {
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true)
if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) {
if (check_fwstate(pmlmepriv, WIFI_AP_STATE))
return true;
if (pmlmepriv->link_detect_info.busy_traffic)
return true;
@@ -180,13 +174,12 @@ static u32 _halbtcoutsrc_GetWifiLinkStatus(struct adapter *padapter)
u8 bp2p;
u32 portConnectedStatus;
pmlmepriv = &padapter->mlmepriv;
bp2p = false;
portConnectedStatus = 0;
if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == true) {
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) {
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
if (bp2p)
portConnectedStatus |= WIFI_P2P_GO_CONNECTED;
else
@@ -214,7 +207,6 @@ static u32 halbtcoutsrc_GetWifiLinkStatus(struct btc_coexist *pBtCoexist)
u32 retVal;
u32 portConnectedStatus, numOfConnectedPort;
padapter = pBtCoexist->Adapter;
portConnectedStatus = 0;
numOfConnectedPort = 0;
@@ -270,7 +262,6 @@ static u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
u32 *pU4Tmp;
u8 ret;
pBtCoexist = (struct btc_coexist *)pBtcContext;
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
return false;
@@ -402,9 +393,6 @@ static u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
case BTC_GET_U1_MAC_PHY_MODE:
*pu8 = BTC_SMSP;
/* *pU1Tmp = BTC_DMSP; */
/* *pU1Tmp = BTC_DMDP; */
/* *pU1Tmp = BTC_MP_UNKNOWN; */
break;
case BTC_GET_U1_AP_NUM:
@@ -432,7 +420,6 @@ static u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
u32 *pU4Tmp;
u8 ret;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
pu8 = pInBuf;
@@ -528,7 +515,7 @@ static u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
case BTC_SET_ACT_UPDATE_RAMASK:
pBtCoexist->btInfo.raMask = *pU4Tmp;
if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == true) {
if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE)) {
struct sta_info *psta;
struct wlan_bssid_ex *cur_network;
@@ -569,7 +556,6 @@ static u8 halbtcoutsrc_Read1Byte(void *pBtcContext, u32 RegAddr)
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -581,7 +567,6 @@ static u16 halbtcoutsrc_Read2Byte(void *pBtcContext, u32 RegAddr)
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -593,7 +578,6 @@ static u32 halbtcoutsrc_Read4Byte(void *pBtcContext, u32 RegAddr)
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -605,7 +589,6 @@ static void halbtcoutsrc_Write1Byte(void *pBtcContext, u32 RegAddr, u8 Data)
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -619,7 +602,6 @@ static void halbtcoutsrc_BitMaskWrite1Byte(void *pBtcContext, u32 regAddr, u8 bi
u8 originalValue, bitShift;
u8 i;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
originalValue = 0;
@@ -645,7 +627,6 @@ static void halbtcoutsrc_Write2Byte(void *pBtcContext, u32 RegAddr, u16 Data)
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -657,7 +638,6 @@ static void halbtcoutsrc_Write4Byte(void *pBtcContext, u32 RegAddr, u32 Data)
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -680,20 +660,17 @@ static void halbtcoutsrc_SetBbReg(void *pBtcContext, u32 RegAddr, u32 BitMask, u
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
PHY_SetBBReg(padapter, RegAddr, BitMask, Data);
}
static u32 halbtcoutsrc_GetBbReg(void *pBtcContext, u32 RegAddr, u32 BitMask)
{
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -705,7 +682,6 @@ static void halbtcoutsrc_SetRfReg(void *pBtcContext, u8 eRFPath, u32 RegAddr, u3
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -717,7 +693,6 @@ static u32 halbtcoutsrc_GetRfReg(void *pBtcContext, u8 eRFPath, u32 RegAddr, u32
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -765,7 +740,6 @@ static void halbtcoutsrc_FillH2cCmd(void *pBtcContext, u8 elementId, u32 cmdLen,
struct btc_coexist *pBtCoexist;
struct adapter *padapter;
pBtCoexist = (struct btc_coexist *)pBtcContext;
padapter = pBtCoexist->Adapter;
@@ -915,7 +889,6 @@ void EXhalbtcoutsrc_LpsNotify(struct btc_coexist *pBtCoexist, u8 type)
{
u8 lpsType;
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
return;
@@ -1144,7 +1117,6 @@ void hal_btcoex_SetBTCoexist(struct adapter *padapter, u8 bBtExist)
{
struct hal_com_data *pHalData;
pHalData = GET_HAL_DATA(padapter);
pHalData->bt_coexist.bBtExist = bBtExist;
}
@@ -1161,7 +1133,6 @@ bool hal_btcoex_IsBtExist(struct adapter *padapter)
{
struct hal_com_data *pHalData;
pHalData = GET_HAL_DATA(padapter);
return pHalData->bt_coexist.bBtExist;
}
@@ -1181,7 +1152,6 @@ void hal_btcoex_SetPgAntNum(struct adapter *padapter, u8 antNum)
{
struct hal_com_data *pHalData;
pHalData = GET_HAL_DATA(padapter);
pHalData->bt_coexist.btTotalAntNum = antNum;

86
drivers/staging/rtl8723bs/hal/hal_com.c
View File

@@ -30,48 +30,6 @@ void rtw_hal_data_deinit(struct adapter *padapter)
}
}
void dump_chip_info(struct hal_version chip_version)
{
char buf[128];
size_t cnt = 0;
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "Chip Version Info: CHIP_8723B_%s_",
IS_NORMAL_CHIP(chip_version) ? "Normal_Chip" : "Test_Chip");
if (IS_CHIP_VENDOR_TSMC(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "TSMC_");
else if (IS_CHIP_VENDOR_UMC(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "UMC_");
else if (IS_CHIP_VENDOR_SMIC(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "SMIC_");
if (IS_A_CUT(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "A_CUT_");
else if (IS_B_CUT(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "B_CUT_");
else if (IS_C_CUT(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "C_CUT_");
else if (IS_D_CUT(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "D_CUT_");
else if (IS_E_CUT(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "E_CUT_");
else if (IS_I_CUT(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "I_CUT_");
else if (IS_J_CUT(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "J_CUT_");
else if (IS_K_CUT(chip_version))
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "K_CUT_");
else
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
"UNKNOWN_CUT(%d)_", chip_version.CUTVersion);
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T1R_");
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "RomVer(%d)\n", chip_version.ROMVer);
}
#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
/*
@@ -107,7 +65,7 @@ u8 hal_com_config_channel_plan(
pHalData->bDisableSWChannelPlan = false;
chnlPlan = def_channel_plan;
if (0xFF == hw_channel_plan)
if (hw_channel_plan == 0xFF)
auto_load_fail = true;
if (!auto_load_fail) {
@@ -136,7 +94,7 @@ bool HAL_IsLegalChannel(struct adapter *adapter, u32 Channel)
bool bLegalChannel = true;
if ((Channel <= 14) && (Channel >= 1)) {
if (is_supported_24g(adapter->registrypriv.wireless_mode) == false)
if (!is_supported_24g(adapter->registrypriv.wireless_mode))
bLegalChannel = false;
} else {
bLegalChannel = false;
@@ -294,7 +252,6 @@ void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg)
u8 i, is_brate, brate;
for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
brate = mBratesOS[i] & 0x7f;
@@ -378,7 +335,6 @@ static void _TwoOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
} else { /* typical setting */
/* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
/* 1, 1, 0, 0, 0, 0, 0, 0, 0 }; */
/* 0:ep_0 num, 1:ep_1 num */
@@ -419,7 +375,6 @@ static void _ThreeOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
} else { /* typical setting */
/* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
/* 2, 2, 1, 0, 0, 0, 0, 0, 0 }; */
/* 0:H, 1:N, 2:L */
@@ -478,10 +433,10 @@ void rtw_init_hal_com_default_value(struct adapter *Adapter)
}
/*
* C2H event format:
* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
*/
* C2H event format:
* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
*/
void c2h_evt_clear(struct adapter *adapter)
{
@@ -489,10 +444,10 @@ void c2h_evt_clear(struct adapter *adapter)
}
/*
* C2H event format:
* Field TRIGGER CMD_LEN CONTENT CMD_SEQ CMD_ID
* BITS [127:120] [119:112] [111:16] [15:8] [7:0]
*/
* C2H event format:
* Field TRIGGER CMD_LEN CONTENT CMD_SEQ CMD_ID
* BITS [127:120] [119:112] [111:16] [15:8] [7:0]
*/
s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf)
{
s32 ret = _FAIL;
@@ -526,9 +481,9 @@ s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf)
clear_evt:
/*
* Clear event to notify FW we have read the command.
* If this field isn't clear, the FW won't update the next command message.
*/
* Clear event to notify FW we have read the command.
* If this field isn't clear, the FW won't update the next command message.
*/
c2h_evt_clear(adapter);
exit:
return ret;
@@ -576,7 +531,7 @@ void SetHwReg(struct adapter *adapter, u8 variable, u8 *val)
switch (variable) {
case HW_VAR_INIT_RTS_RATE:
rtw_warn_on(1);
WARN_ON(1);
break;
case HW_VAR_SEC_CFG:
{
@@ -605,7 +560,7 @@ void SetHwReg(struct adapter *adapter, u8 variable, u8 *val)
odm->SupportAbility = *((u32 *)val);
break;
case HW_VAR_DM_FUNC_OP:
if (*((u8 *)val) == true) {
if (*((u8 *)val)) {
/* save dm flag */
odm->BK_SupportAbility = odm->SupportAbility;
} else {
@@ -625,9 +580,9 @@ void SetHwReg(struct adapter *adapter, u8 variable, u8 *val)
break;
case HW_VAR_DM_FUNC_CLR:
/*
* input is already a mask to clear function
* don't invert it again! George, Lucas@20130513
*/
* input is already a mask to clear function
* don't invert it again! George, Lucas@20130513
*/
odm->SupportAbility &= *((u32 *)val);
break;
case HW_VAR_AMPDU_MIN_SPACE:
@@ -751,7 +706,6 @@ void SetHalODMVar(
}
}
bool GetU1ByteIntegerFromStringInDecimal(char *Str, u8 *pInt)
{
u16 i = 0;
@@ -799,7 +753,7 @@ void rtw_bb_rf_gain_offset(struct adapter *padapter)
u32 v1 = 0, v2 = 0, target = 0;
u32 i = 0;
if (value & BIT4) {
if (value & BIT(4)) {
if (padapter->eeprompriv.EEPROMRFGainVal != 0xff) {
rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
@@ -811,7 +765,7 @@ void rtw_bb_rf_gain_offset(struct adapter *padapter)
break;
}
}
PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target);
PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT(18)|BIT(17)|BIT(16)|BIT(15), target);
rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
}

22
drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
View File

@@ -407,9 +407,9 @@ struct adapter *padapter
}
/*
* This function must be called if the value in the PHY_REG_PG.txt(or header)
* is exact dBm values
*/
* This function must be called if the value in the PHY_REG_PG.txt(or header)
* is exact dBm values
*/
void PHY_TxPowerByRateConfiguration(struct adapter *padapter)
{
phy_StoreTxPowerByRateBase(padapter);
@@ -461,23 +461,22 @@ u8 PHY_GetTxPowerIndexBase(
u8 txPower = 0;
u8 chnlIdx = (Channel-1);
if (HAL_IsLegalChannel(padapter, Channel) == false)
if (!HAL_IsLegalChannel(padapter, Channel))
chnlIdx = 0;
if (IS_CCK_RATE(Rate))
txPower = pHalData->Index24G_CCK_Base[RFPath][chnlIdx];
else if (MGN_6M <= Rate)
else if (Rate >= MGN_6M)
txPower = pHalData->Index24G_BW40_Base[RFPath][chnlIdx];
/* OFDM-1T */
if ((MGN_6M <= Rate && Rate <= MGN_54M) && !IS_CCK_RATE(Rate))
if ((Rate >= MGN_6M && Rate <= MGN_54M) && !IS_CCK_RATE(Rate))
txPower += pHalData->OFDM_24G_Diff[RFPath][TX_1S];
if (BandWidth == CHANNEL_WIDTH_20) { /* BW20-1S, BW20-2S */
if (MGN_MCS0 <= Rate && Rate <= MGN_MCS7)
if (Rate >= MGN_MCS0 && Rate <= MGN_MCS7) {
if (BandWidth == CHANNEL_WIDTH_20) /* BW20-1S, BW20-2S */
txPower += pHalData->BW20_24G_Diff[RFPath][TX_1S];
} else if (BandWidth == CHANNEL_WIDTH_40) { /* BW40-1S, BW40-2S */
if (MGN_MCS0 <= Rate && Rate <= MGN_MCS7)
else if (BandWidth == CHANNEL_WIDTH_40) /* BW40-1S, BW40-2S */
txPower += pHalData->BW40_24G_Diff[RFPath][TX_1S];
}
@@ -490,7 +489,7 @@ s8 PHY_GetTxPowerTrackingOffset(struct adapter *padapter, u8 RFPath, u8 Rate)
struct dm_odm_t *pDM_Odm = &pHalData->odmpriv;
s8 offset = 0;
if (pDM_Odm->RFCalibrateInfo.TxPowerTrackControl == false)
if (!pDM_Odm->RFCalibrateInfo.TxPowerTrackControl)
return offset;
if ((Rate == MGN_1M) || (Rate == MGN_2M) || (Rate == MGN_5_5M) || (Rate == MGN_11M))
@@ -735,7 +734,6 @@ s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 reg_pwr_tbl_sel,
idx_rate_sctn == -1 || idx_channel == -1)
return MAX_POWER_INDEX;
for (i = 0; i < MAX_REGULATION_NUM; i++)
limits[i] = hal_data->TxPwrLimit_2_4G[i]
[idx_bandwidth]

53
drivers/staging/rtl8723bs/hal/hal_intf.c
View File

@@ -7,37 +7,6 @@
#include <drv_types.h>
#include <hal_data.h>
void rtw_hal_chip_configure(struct adapter *padapter)
{
rtl8723bs_interface_configure(padapter);
}
void rtw_hal_read_chip_info(struct adapter *padapter)
{
ReadAdapterInfo8723BS(padapter);
}
void rtw_hal_read_chip_version(struct adapter *padapter)
{
rtl8723b_read_chip_version(padapter);
}
void rtw_hal_def_value_init(struct adapter *padapter)
{
rtl8723bs_init_default_value(padapter);
}
void rtw_hal_free_data(struct adapter *padapter)
{
/* free HAL Data */
rtw_hal_data_deinit(padapter);
}
void rtw_hal_dm_init(struct adapter *padapter)
{
rtl8723b_init_dm_priv(padapter);
}
static void rtw_hal_init_opmode(struct adapter *padapter)
{
enum ndis_802_11_network_infrastructure networkType = Ndis802_11InfrastructureMax;
@@ -125,29 +94,22 @@ void rtw_hal_set_odm_var(struct adapter *padapter, enum hal_odm_variable eVariab
SetHalODMVar(padapter, eVariable, pValue1, bSet);
}
void rtw_hal_enable_interrupt(struct adapter *padapter)
{
EnableInterrupt8723BSdio(padapter);
}
void rtw_hal_disable_interrupt(struct adapter *padapter)
{
DisableInterrupt8723BSdio(padapter);
}
u8 rtw_hal_check_ips_status(struct adapter *padapter)
{
return CheckIPSStatus(padapter);
}
s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe)
int rtw_hal_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe)
{
return rtl8723bs_hal_xmitframe_enqueue(padapter, pxmitframe);
}
s32 rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe)
{
return rtl8723bs_hal_xmit(padapter, pxmitframe);
if (rtl8723bs_hal_xmit(padapter, pxmitframe))
return _FAIL;
return _SUCCESS;
}
/*
@@ -160,7 +122,7 @@ s32 rtw_hal_mgnt_xmit(struct adapter *padapter, struct xmit_frame *pmgntframe)
/* pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; */
/* memcpy(pmgntframe->attrib.ra, pwlanhdr->addr1, ETH_ALEN); */
if (padapter->securitypriv.binstallBIPkey == true) {
if (padapter->securitypriv.binstallBIPkey) {
if (is_multicast_ether_addr(pmgntframe->attrib.ra)) {
pmgntframe->attrib.encrypt = _BIP_;
/* pmgntframe->attrib.bswenc = true; */
@@ -206,7 +168,7 @@ void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level)
pmlmepriv = &(padapter->mlmepriv);
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true)
if (check_fwstate(pmlmepriv, WIFI_AP_STATE))
add_ratid(padapter, psta, rssi_level);
else {
UpdateHalRAMask8723B(padapter, psta->mac_id, rssi_level);
@@ -264,7 +226,6 @@ void beacon_timing_control(struct adapter *padapter)
rtl8723b_SetBeaconRelatedRegisters(padapter);
}
s32 rtw_hal_xmit_thread_handler(struct adapter *padapter)
{
return rtl8723bs_xmit_buf_handler(padapter);

18
drivers/staging/rtl8723bs/hal/hal_pwr_seq.c
View File

@@ -6,16 +6,14 @@
******************************************************************************/
/*
*
This file includes all kinds of Power Action event for RTL8723B
and corresponding hardware configurations which are released from HW SD.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-08-08 Roger Create.
*/
* This file includes all kinds of Power Action event for RTL8723B
* and corresponding hardware configurations which are released from HW SD.
*
* Major Change History:
* When Who What
* ---------- --------------- -------------------------------
* 2011-08-08 Roger Create.
*/
#include "hal_pwr_seq.h"

1
drivers/staging/rtl8723bs/hal/hal_sdio.c
View File

@@ -81,7 +81,6 @@ u32 rtw_hal_get_sdio_tx_max_length(struct adapter *padapter, u8 queue_idx)
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
u32 deviceId, max_len;
deviceId = ffaddr2deviceId(pdvobjpriv, queue_idx);
switch (deviceId) {
case WLAN_TX_HIQ_DEVICE_ID:

82
drivers/staging/rtl8723bs/hal/odm.c
View File

@@ -279,22 +279,22 @@ static void odm_RefreshRateAdaptiveMaskCE(struct dm_odm_t *pDM_Odm)
}
/*-----------------------------------------------------------------------------
* Function: odm_RefreshRateAdaptiveMask()
*
* Overview: Update rate table mask according to rssi
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
*When Who Remark
*05/27/2009 hpfan Create Version 0.
*
* --------------------------------------------------------------------------
*/
* Function: odm_RefreshRateAdaptiveMask()
*
* Overview: Update rate table mask according to rssi
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
*When Who Remark
*05/27/2009 hpfan Create Version 0.
*
* --------------------------------------------------------------------------
*/
static void odm_RefreshRateAdaptiveMask(struct dm_odm_t *pDM_Odm)
{
@@ -380,12 +380,9 @@ static void FindMinimumRSSI(struct adapter *padapter)
/* 1 1.Determine the minimum RSSI */
if (
(pDM_Odm->bLinked != true) &&
(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)
) {
if (!pDM_Odm->bLinked && (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
pdmpriv->MinUndecoratedPWDBForDM = 0;
} else
else
pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
}
@@ -400,7 +397,7 @@ static void odm_RSSIMonitorCheckCE(struct dm_odm_t *pDM_Odm)
u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */
struct ra_t *pRA_Table = &pDM_Odm->DM_RA_Table;
if (pDM_Odm->bLinked != true)
if (!pDM_Odm->bLinked)
return;
pRA_Table->firstconnect = pDM_Odm->bLinked;
@@ -431,14 +428,12 @@ static void odm_RSSIMonitorCheckCE(struct dm_odm_t *pDM_Odm)
for (i = 0; i < sta_cnt; i++) {
if (PWDB_rssi[i] != (0)) {
if (pHalData->fw_ractrl == true)/* Report every sta's RSSI to FW */
if (pHalData->fw_ractrl)/* Report every sta's RSSI to FW */
rtl8723b_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i]));
}
}
}
if (tmpEntryMaxPWDB != 0) /* If associated entry is found */
pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
else
@@ -512,7 +507,6 @@ void odm_TXPowerTrackingInit(struct dm_odm_t *pDM_Odm)
struct adapter *Adapter = pDM_Odm->Adapter;
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
pdmpriv->bTXPowerTracking = true;
@@ -554,7 +548,7 @@ void ODM_TXPowerTrackingCheck(struct dm_odm_t *pDM_Odm)
return;
if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03);
PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03);
pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
return;
@@ -623,10 +617,9 @@ void ODM_DMWatchdog(struct dm_odm_t *pDM_Odm)
}
odm_CCKPacketDetectionThresh(pDM_Odm);
if (*(pDM_Odm->pbPowerSaving) == true)
if (*pDM_Odm->pbPowerSaving)
return;
odm_RefreshRateAdaptiveMask(pDM_Odm);
odm_EdcaTurboCheck(pDM_Odm);
ODM_CfoTracking(pDM_Odm);
@@ -640,7 +633,6 @@ void ODM_DMWatchdog(struct dm_odm_t *pDM_Odm)
pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0;
}
/* */
/* Init /.. Fixed HW value. Only init time. */
/* */
@@ -735,7 +727,6 @@ void ODM_CmnInfoInit(struct dm_odm_t *pDM_Odm, enum odm_cmninfo_e CmnInfo, u32 V
}
void ODM_CmnInfoHook(struct dm_odm_t *pDM_Odm, enum odm_cmninfo_e CmnInfo, void *pValue)
{
/* */
@@ -859,7 +850,6 @@ void ODM_CmnInfoHook(struct dm_odm_t *pDM_Odm, enum odm_cmninfo_e CmnInfo, void
}
void ODM_CmnInfoPtrArrayHook(
struct dm_odm_t *pDM_Odm,
enum odm_cmninfo_e CmnInfo,
@@ -885,7 +875,6 @@ void ODM_CmnInfoPtrArrayHook(
}
/* */
/* Update Band/CHannel/.. The values are dynamic but non-per-packet. */
/* */
@@ -955,37 +944,10 @@ void ODM_CmnInfoUpdate(struct dm_odm_t *pDM_Odm, u32 CmnInfo, u64 Value)
pDM_Odm->bBtDisableEdcaTurbo = (bool)Value;
break;
/*
case ODM_CMNINFO_OP_MODE:
pDM_Odm->OPMode = (u8)Value;
break;
case ODM_CMNINFO_WM_MODE:
pDM_Odm->WirelessMode = (u8)Value;
break;
case ODM_CMNINFO_SEC_CHNL_OFFSET:
pDM_Odm->SecChOffset = (u8)Value;
break;
case ODM_CMNINFO_SEC_MODE:
pDM_Odm->Security = (u8)Value;
break;
case ODM_CMNINFO_BW:
pDM_Odm->BandWidth = (u8)Value;
break;
case ODM_CMNINFO_CHNL:
pDM_Odm->Channel = (u8)Value;
break;
*/
default:
/* do nothing */
break;
}
}
/* 3 ============================================================ */

56
drivers/staging/rtl8723bs/hal/odm.h
View File

@@ -5,7 +5,6 @@
*
******************************************************************************/
#ifndef __HALDMOUTSRC_H__
#define __HALDMOUTSRC_H__
@@ -174,7 +173,6 @@ struct swat_t { /* _SW_Antenna_Switch_ */
/* Remove Edca by YuChen */
struct odm_rate_adaptive {
u8 Type; /* DM_Type_ByFW/DM_Type_ByDriver */
u8 LdpcThres; /* if RSSI > LdpcThres => switch from LPDC to BCC */
@@ -355,30 +353,30 @@ enum { /* _ODM_Support_Ability_Definition */
/* */
/* BB ODM section BIT 0-15 */
/* */
ODM_BB_DIG = BIT0,
ODM_BB_RA_MASK = BIT1,
ODM_BB_DYNAMIC_TXPWR = BIT2,
ODM_BB_FA_CNT = BIT3,
ODM_BB_RSSI_MONITOR = BIT4,
ODM_BB_CCK_PD = BIT5,
ODM_BB_ANT_DIV = BIT6,
ODM_BB_PWR_SAVE = BIT7,
ODM_BB_PWR_TRAIN = BIT8,
ODM_BB_RATE_ADAPTIVE = BIT9,
ODM_BB_PATH_DIV = BIT10,
ODM_BB_PSD = BIT11,
ODM_BB_RXHP = BIT12,
ODM_BB_ADAPTIVITY = BIT13,
ODM_BB_CFO_TRACKING = BIT14,
ODM_BB_DIG = BIT(0),
ODM_BB_RA_MASK = BIT(1),
ODM_BB_DYNAMIC_TXPWR = BIT(2),
ODM_BB_FA_CNT = BIT(3),
ODM_BB_RSSI_MONITOR = BIT(4),
ODM_BB_CCK_PD = BIT(5),
ODM_BB_ANT_DIV = BIT(6),
ODM_BB_PWR_SAVE = BIT(7),
ODM_BB_PWR_TRAIN = BIT(8),
ODM_BB_RATE_ADAPTIVE = BIT(9),
ODM_BB_PATH_DIV = BIT(10),
ODM_BB_PSD = BIT(11),
ODM_BB_RXHP = BIT(12),
ODM_BB_ADAPTIVITY = BIT(13),
ODM_BB_CFO_TRACKING = BIT(14),
/* MAC DM section BIT 16-23 */
ODM_MAC_EDCA_TURBO = BIT16,
ODM_MAC_EARLY_MODE = BIT17,
ODM_MAC_EDCA_TURBO = BIT(16),
ODM_MAC_EARLY_MODE = BIT(17),
/* RF ODM section BIT 24-31 */
ODM_RF_TX_PWR_TRACK = BIT24,
ODM_RF_RX_GAIN_TRACK = BIT25,
ODM_RF_CALIBRATION = BIT26,
ODM_RF_TX_PWR_TRACK = BIT(24),
ODM_RF_RX_GAIN_TRACK = BIT(25),
ODM_RF_CALIBRATION = BIT(26),
};
/* ODM_CMNINFO_INTERFACE */
@@ -389,7 +387,7 @@ enum { /* tag_ODM_Support_Interface_Definition */
/* ODM_CMNINFO_IC_TYPE */
enum { /* tag_ODM_Support_IC_Type_Definition */
ODM_RTL8723B = BIT8,
ODM_RTL8723B = BIT(8),
};
/* ODM_CMNINFO_CUT_VER */
@@ -434,10 +432,10 @@ enum { /* tag_ODM_RF_Type_Definition */
/* ODM_CMNINFO_WM_MODE */
enum { /* tag_Wireless_Mode_Definition */
ODM_WM_UNKNOWN = 0x0,
ODM_WM_B = BIT0,
ODM_WM_G = BIT1,
ODM_WM_N24G = BIT3,
ODM_WM_AUTO = BIT5,
ODM_WM_B = BIT(0),
ODM_WM_G = BIT(1),
ODM_WM_N24G = BIT(3),
ODM_WM_AUTO = BIT(5),
};
/* ODM_CMNINFO_BW */
@@ -975,10 +973,6 @@ enum ODM_FW_Config_Type {
CONFIG_FW_BT,
};
#ifdef REMOVE_PACK
#pragma pack()
#endif
/* include "odm_function.h" */
/* 3 =========================================================== */

2
drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
View File

@@ -138,7 +138,7 @@ void ODM_CfoTracking(void *pDM_VOID)
pCfoTrack->CFO_ave_pre = CFO_ave;
/* 4 1.4 Dynamic Xtal threshold */
if (pCfoTrack->bAdjust == false) {
if (!pCfoTrack->bAdjust) {
if (CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH))
pCfoTrack->bAdjust = true;
} else {

64
drivers/staging/rtl8723bs/hal/odm_DIG.c
View File

@@ -19,8 +19,8 @@ void odm_NHMCounterStatisticsInit(void *pDM_VOID)
rtw_write32(pDM_Odm->Adapter, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff52); /* 0x898 = 0xffffff52 th_3, th_2, th_1, th_0 */
rtw_write32(pDM_Odm->Adapter, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff); /* 0x89c = 0xffffffff th_7, th_6, th_5, th_4 */
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); /* 0xe28[7:0]= 0xff th_8 */
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); /* 0x890[9:8]=3 enable CCX */
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); /* 0xc0c[7]= 1 max power among all RX ants */
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT(10)|BIT(9)|BIT(8), 0x7); /* 0x890[9:8]=3 enable CCX */
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTC_11N, BIT(7), 0x1); /* 0xc0c[7]= 1 max power among all RX ants */
}
void odm_NHMCounterStatistics(void *pDM_VOID)
@@ -48,8 +48,8 @@ void odm_NHMCounterStatisticsReset(void *pDM_VOID)
{
struct dm_odm_t *pDM_Odm = (struct dm_odm_t *)pDM_VOID;
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0);
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1);
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 0);
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 1);
}
void odm_NHMBBInit(void *pDM_VOID)
@@ -80,9 +80,8 @@ void odm_NHMBB(void *pDM_VOID)
pDM_Odm->NHMLastRxOkcnt =
*(pDM_Odm->pNumRxBytesUnicast);
if ((pDM_Odm->NHMCurTxOkcnt) + 1 > (u64)(pDM_Odm->NHMCurRxOkcnt<<2) + 1) { /* Tx > 4*Rx possible for adaptivity test */
if (pDM_Odm->NHM_cnt_0 >= 190 || pDM_Odm->adaptivity_flag == true) {
if (pDM_Odm->NHM_cnt_0 >= 190 || pDM_Odm->adaptivity_flag) {
/* Enable EDCCA since it is possible running Adaptivity testing */
/* test_status = 1; */
pDM_Odm->adaptivity_flag = true;
@@ -99,7 +98,7 @@ void odm_NHMBB(void *pDM_VOID)
}
}
} else { /* TX<RX */
if (pDM_Odm->adaptivity_flag == true && pDM_Odm->NHM_cnt_0 <= 200) {
if (pDM_Odm->adaptivity_flag && pDM_Odm->NHM_cnt_0 <= 200) {
/* test_status = 2; */
pDM_Odm->tolerance_cnt = 0;
} else {
@@ -128,7 +127,6 @@ void odm_SearchPwdBLowerBound(void *pDM_VOID, u8 IGI_target)
IGI = 0x50; /* find H2L, L2H lower bound */
ODM_Write_DIG(pDM_Odm, IGI);
Diff = IGI_target-(s8)IGI;
TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff;
if (TH_L2H_dmc > 10)
@@ -143,9 +141,9 @@ void odm_SearchPwdBLowerBound(void *pDM_VOID, u8 IGI_target)
for (cnt = 0; cnt < 20; cnt++) {
value32 = PHY_QueryBBReg(pDM_Odm->Adapter, ODM_REG_RPT_11N, bMaskDWord);
if (value32 & BIT30)
if (value32 & BIT(30))
pDM_Odm->txEdcca1 = pDM_Odm->txEdcca1 + 1;
else if (value32 & BIT29)
else if (value32 & BIT(29))
pDM_Odm->txEdcca1 = pDM_Odm->txEdcca1 + 1;
else
pDM_Odm->txEdcca0 = pDM_Odm->txEdcca0 + 1;
@@ -189,7 +187,7 @@ void odm_AdaptivityInit(void *pDM_VOID)
{
struct dm_odm_t *pDM_Odm = (struct dm_odm_t *)pDM_VOID;
if (pDM_Odm->Carrier_Sense_enable == false)
if (!pDM_Odm->Carrier_Sense_enable)
pDM_Odm->TH_L2H_ini = 0xf7; /* -7 */
else
pDM_Odm->TH_L2H_ini = 0xa;
@@ -209,10 +207,9 @@ void odm_AdaptivityInit(void *pDM_VOID)
pDM_Odm->Adaptivity_IGI_upper = 0;
odm_NHMBBInit(pDM_Odm);
PHY_SetBBReg(pDM_Odm->Adapter, REG_RD_CTRL, BIT11, 1); /* stop counting if EDCCA is asserted */
PHY_SetBBReg(pDM_Odm->Adapter, REG_RD_CTRL, BIT(11), 1); /* stop counting if EDCCA is asserted */
}
void odm_Adaptivity(void *pDM_VOID, u8 IGI)
{
struct dm_odm_t *pDM_Odm = (struct dm_odm_t *)pDM_VOID;
@@ -232,7 +229,7 @@ void odm_Adaptivity(void *pDM_VOID, u8 IGI)
pDM_Odm->IGI_target = (u8) IGI_target;
/* Search pwdB lower bound */
if (pDM_Odm->TxHangFlg == true) {
if (pDM_Odm->TxHangFlg) {
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208);
odm_SearchPwdBLowerBound(pDM_Odm, pDM_Odm->IGI_target);
}
@@ -251,12 +248,10 @@ void odm_Adaptivity(void *pDM_VOID, u8 IGI)
} else
EDCCA_State = true;
if (
pDM_Odm->bLinked &&
pDM_Odm->Carrier_Sense_enable == false &&
pDM_Odm->NHM_disable == false &&
pDM_Odm->TxHangFlg == false
)
if (pDM_Odm->bLinked &&
!pDM_Odm->Carrier_Sense_enable &&
!pDM_Odm->NHM_disable &&
!pDM_Odm->TxHangFlg)
odm_NHMBB(pDM_Odm);
if (EDCCA_State) {
@@ -323,7 +318,7 @@ bool odm_DigAbort(void *pDM_VOID)
return true;
/* add by Neil Chen to avoid PSD is processing */
if (pDM_Odm->bDMInitialGainEnable == false)
if (!pDM_Odm->bDMInitialGainEnable)
return true;
return false;
@@ -365,7 +360,6 @@ void odm_DIGInit(void *pDM_VOID)
pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC;
}
void odm_DIG(void *pDM_VOID)
{
struct dm_odm_t *pDM_Odm = (struct dm_odm_t *)pDM_VOID;
@@ -387,14 +381,13 @@ void odm_DIG(void *pDM_VOID)
if (odm_DigAbort(pDM_Odm))
return;
if (pDM_Odm->adaptivity_flag == true)
if (pDM_Odm->adaptivity_flag)
Adap_IGI_Upper = pDM_Odm->Adaptivity_IGI_upper;
/* 1 Update status */
DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == false);
FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == true);
FirstConnect = (pDM_Odm->bLinked) && !pDM_DigTable->bMediaConnect_0;
FirstDisConnect = (!pDM_Odm->bLinked) && pDM_DigTable->bMediaConnect_0;
/* 1 Boundary Decision */
/* 2 For WIN\CE */
@@ -471,7 +464,6 @@ void odm_DIG(void *pDM_VOID)
if (pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max)
pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max;
/* 1 False alarm threshold decision */
odm_FAThresholdCheck(pDM_Odm, bDFSBand, bPerformance, RxTp, TxTp, dm_FA_thres);
@@ -527,10 +519,8 @@ void odm_DIG(void *pDM_VOID)
CurrentIGI = pDM_DigTable->rx_gain_range_max;
/* 1 Force upper bound and lower bound for adaptivity */
if (
pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY &&
pDM_Odm->adaptivity_flag == true
) {
if (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY &&
pDM_Odm->adaptivity_flag) {
if (CurrentIGI > Adap_IGI_Upper)
CurrentIGI = Adap_IGI_Upper;
@@ -540,7 +530,6 @@ void odm_DIG(void *pDM_VOID)
}
}
/* 1 Update status */
if (pDM_Odm->bBtHsOperation) {
if (pDM_Odm->bLinked) {
@@ -585,7 +574,6 @@ void odm_DIGbyRSSI_LPS(void *pDM_VOID)
else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS)
CurrentIGI = CurrentIGI-2;
/* Lower bound checking */
/* RSSI Lower bound check */
@@ -616,9 +604,9 @@ void odm_FalseAlarmCounterStatistics(void *pDM_VOID)
/* hold ofdm counter */
/* hold page C counter */
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1);
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1);
/* hold page D counter */
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1);
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1);
ret_value = PHY_QueryBBReg(
pDM_Odm->Adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord
@@ -653,8 +641,8 @@ void odm_FalseAlarmCounterStatistics(void *pDM_VOID)
{
/* hold cck counter */
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1);
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1);
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT(12), 1);
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT(14), 1);
ret_value = PHY_QueryBBReg(
pDM_Odm->Adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0
@@ -687,7 +675,6 @@ void odm_FalseAlarmCounterStatistics(void *pDM_VOID)
FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA;
}
void odm_FAThresholdCheck(
void *pDM_VOID,
bool bDFSBand,
@@ -767,7 +754,6 @@ void odm_CCKPacketDetectionThresh(void *pDM_VOID)
struct false_ALARM_STATISTICS *FalseAlmCnt = &pDM_Odm->FalseAlmCnt;
u8 CurCCK_CCAThres;
if (
!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD) ||
!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)

4
drivers/staging/rtl8723bs/hal/odm_DIG.h
View File

@@ -78,8 +78,8 @@ struct false_ALARM_STATISTICS {
};
enum ODM_Pause_DIG_TYPE {
ODM_PAUSE_DIG = BIT0,
ODM_RESUME_DIG = BIT1
ODM_PAUSE_DIG = BIT(0),
ODM_RESUME_DIG = BIT(1)
};
#define DM_DIG_THRESH_HIGH 40

12
drivers/staging/rtl8723bs/hal/odm_DynamicBBPowerSaving.c
View File

@@ -35,7 +35,7 @@ void ODM_RF_Saving(void *pDM_VOID, u8 bForceInNormal)
if (pDM_PSTable->initialize == 0) {
pDM_PSTable->Reg874 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0x874, bMaskDWord)&0x1CC000)>>14;
pDM_PSTable->RegC70 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xc70, bMaskDWord)&BIT3)>>3;
pDM_PSTable->RegC70 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xc70, bMaskDWord)&BIT(3))>>3;
pDM_PSTable->Reg85C = (PHY_QueryBBReg(pDM_Odm->Adapter, 0x85c, bMaskDWord)&0xFF000000)>>24;
pDM_PSTable->RegA74 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xa74, bMaskDWord)&0xF000)>>12;
/* Reg818 = PHY_QueryBBReg(padapter, 0x818, bMaskDWord); */
@@ -63,18 +63,18 @@ void ODM_RF_Saving(void *pDM_VOID, u8 bForceInNormal)
if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) {
if (pDM_PSTable->CurRFState == RF_Save) {
PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */
PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, 0); /* RegC70[3]= 1'b0 */
PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT(3), 0); /* RegC70[3]= 1'b0 */
PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */
PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */
PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0); /* Reg818[28]= 1'b0 */
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x1); /* Reg818[28]= 1'b1 */
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT(28), 0x0); /* Reg818[28]= 1'b0 */
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT(28), 0x1); /* Reg818[28]= 1'b1 */
} else {
PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874);
PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, pDM_PSTable->RegC70);
PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT(3), pDM_PSTable->RegC70);
PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, pDM_PSTable->RegA74);
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0);
PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT(28), 0x0);
}
pDM_PSTable->PreRFState = pDM_PSTable->CurRFState;
}

22
drivers/staging/rtl8723bs/hal/odm_HWConfig.c
View File

@@ -7,9 +7,6 @@
#include "odm_precomp.h"
#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))
#define READ_AND_CONFIG READ_AND_CONFIG_MP
static u8 odm_query_rx_pwr_percentage(s8 ant_power)
{
if ((ant_power <= -100) || (ant_power >= 20))
@@ -116,7 +113,6 @@ static void odm_rx_phy_status_parsing(struct dm_odm_t *dm_odm,
phy_info->rx_mimo_signal_quality[RF_PATH_A] = -1;
phy_info->rx_mimo_signal_quality[RF_PATH_B] = -1;
if (is_cck_rate) {
u8 cck_agc_rpt;
@@ -258,7 +254,6 @@ static void odm_Process_RSSIForDM(
u32 Weighting = 0;
PSTA_INFO_T pEntry;
if (pPktinfo->station_id == 0xFF)
return;
@@ -335,7 +330,7 @@ static void odm_Process_RSSIForDM(
}
}
pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;
pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT(0);
} else {
RSSI_Ave = pPhyInfo->rx_pwd_ba11;
@@ -369,7 +364,7 @@ static void odm_Process_RSSIForDM(
pEntry->rssi_stat.ValidBit++;
for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT(0);
if (pEntry->rssi_stat.ValidBit == 64) {
Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4);
@@ -389,7 +384,6 @@ static void odm_Process_RSSIForDM(
}
}
/* */
/* Endianness before calling this API */
/* */
@@ -415,9 +409,9 @@ enum hal_status ODM_ConfigRFWithHeaderFile(
)
{
if (ConfigType == CONFIG_RF_RADIO)
READ_AND_CONFIG(8723B, _RadioA);
ODM_ReadAndConfig_MP_8723B_RadioA(pDM_Odm);
else if (ConfigType == CONFIG_RF_TXPWR_LMT)
READ_AND_CONFIG(8723B, _TXPWR_LMT);
ODM_ReadAndConfig_MP_8723B_TXPWR_LMT(pDM_Odm);
return HAL_STATUS_SUCCESS;
}
@@ -425,7 +419,7 @@ enum hal_status ODM_ConfigRFWithHeaderFile(
enum hal_status ODM_ConfigRFWithTxPwrTrackHeaderFile(struct dm_odm_t *pDM_Odm)
{
if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)
READ_AND_CONFIG(8723B, _TxPowerTrack_SDIO);
ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO(pDM_Odm);
return HAL_STATUS_SUCCESS;
}
@@ -435,11 +429,11 @@ enum hal_status ODM_ConfigBBWithHeaderFile(
)
{
if (ConfigType == CONFIG_BB_PHY_REG)
READ_AND_CONFIG(8723B, _PHY_REG);
ODM_ReadAndConfig_MP_8723B_PHY_REG(pDM_Odm);
else if (ConfigType == CONFIG_BB_AGC_TAB)
READ_AND_CONFIG(8723B, _AGC_TAB);
ODM_ReadAndConfig_MP_8723B_AGC_TAB(pDM_Odm);
else if (ConfigType == CONFIG_BB_PHY_REG_PG)
READ_AND_CONFIG(8723B, _PHY_REG_PG);
ODM_ReadAndConfig_MP_8723B_PHY_REG_PG(pDM_Odm);
return HAL_STATUS_SUCCESS;
}

1
drivers/staging/rtl8723bs/hal/odm_HWConfig.h
View File

@@ -5,7 +5,6 @@
*
******************************************************************************/
#ifndef __HALHWOUTSRC_H__
#define __HALHWOUTSRC_H__

1
drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
View File

@@ -83,7 +83,6 @@ void odm_ConfigRFReg_8723B(
}
}
void odm_ConfigRF_RadioA_8723B(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Data)
{
u32 content = 0x1000; /* RF_Content: radioa_txt */

6
drivers/staging/rtl8723bs/hal/odm_RegDefine11N.h
View File

@@ -8,7 +8,6 @@
#ifndef __ODM_REGDEFINE11N_H__
#define __ODM_REGDEFINE11N_H__
/* 2 RF REG LIST */
#define ODM_REG_RF_MODE_11N 0x00
#define ODM_REG_RF_0B_11N 0x0B
@@ -152,11 +151,10 @@
#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0
#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4
/* DIG Related */
#define ODM_BIT_IGI_11N 0x0000007F
#define ODM_BIT_CCK_RPT_FORMAT_11N BIT9
#define ODM_BIT_CCK_RPT_FORMAT_11N BIT(9)
#define ODM_BIT_BB_RX_PATH_11N 0xF
#define ODM_BIT_BB_ATC_11N BIT11
#define ODM_BIT_BB_ATC_11N BIT(11)
#endif

11
drivers/staging/rtl8723bs/hal/odm_interface.h
View File

@@ -5,12 +5,9 @@
*
******************************************************************************/
#ifndef __ODM_INTERFACE_H__
#define __ODM_INTERFACE_H__
/* =========== Macro Define */
#define _reg_all(_name) ODM_##_name
@@ -18,14 +15,6 @@
#define _bit_all(_name) BIT_##_name
#define _bit_ic(_name, _ic) BIT_##_name##_ic
/*===================================
#define ODM_REG_DIG_11N 0xC50
#define ODM_REG_DIG_11AC 0xDDD
ODM_REG(DIG)
=====================================*/
#define _reg_11N(_name) ODM_REG_##_name##_11N
#define _bit_11N(_name) ODM_BIT_##_name##_11N

7
drivers/staging/rtl8723bs/hal/odm_types.h
View File

@@ -18,15 +18,8 @@
enum hal_status {
HAL_STATUS_SUCCESS,
HAL_STATUS_FAILURE,
/*RT_STATUS_PENDING,
RT_STATUS_RESOURCE,
RT_STATUS_INVALID_CONTEXT,
RT_STATUS_INVALID_PARAMETER,
RT_STATUS_NOT_SUPPORT,
RT_STATUS_OS_API_FAILED,*/
};
#if defined(__LITTLE_ENDIAN)
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#else

38
drivers/staging/rtl8723bs/hal/rtl8723b_cmd.c
View File

@@ -8,6 +8,7 @@
#include <drv_types.h>
#include <rtl8723b_hal.h>
#include <linux/etherdevice.h>
#include <linux/iopoll.h>
#include "hal_com_h2c.h"
#define MAX_H2C_BOX_NUMS 4
@@ -18,31 +19,25 @@
static u8 _is_fw_read_cmd_down(struct adapter *padapter, u8 msgbox_num)
{
u8 read_down = false;
int retry_cnts = 100;
u8 valid;
int ret;
do {
valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num);
if (0 == valid) {
read_down = true;
}
} while ((!read_down) && (retry_cnts--));
return read_down;
ret = read_poll_timeout_atomic(rtw_read8,
valid, !(valid & BIT(msgbox_num)),
0, 500, false,
padapter, REG_HMETFR);
return !ret;
}
/*****************************************
* H2C Msg format :
*| 31 - 8 |7-5 | 4 - 0 |
*| h2c_msg |Class |CMD_ID |
*| 31-0 |
*| Ext msg |
*
******************************************/
* H2C Msg format :
*| 31 - 8 |7-5 | 4 - 0 |
*| h2c_msg |Class |CMD_ID |
*| 31-0 |
*| Ext msg |
*
******************************************/
s32 FillH2CCmd8723B(struct adapter *padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
{
u8 h2c_box_num;
@@ -171,15 +166,12 @@ static void ConstructBeacon(struct adapter *padapter, u8 *pframe, u32 *pLength)
pframe = rtw_set_ie(pframe, WLAN_EID_IBSS_PARAMS, 2, (unsigned char *)(&ATIMWindow), &pktlen);
}
/* todo: ERP IE */
/* EXTERNDED SUPPORTED RATE */
if (rate_len > 8)
pframe = rtw_set_ie(pframe, WLAN_EID_EXT_SUPP_RATES, (rate_len - 8), (cur_network->supported_rates + 8), &pktlen);
/* todo:HT for adhoc */
_ConstructBeacon:
@@ -363,7 +355,7 @@ void rtl8723b_set_FwPwrMode_cmd(struct adapter *padapter, u8 psmode)
}
if (psmode > 0) {
if (hal_btcoex_IsBtControlLps(padapter) == true) {
if (hal_btcoex_IsBtControlLps(padapter)) {
PowerState = hal_btcoex_RpwmVal(padapter);
byte5 = hal_btcoex_LpsVal(padapter);

19
drivers/staging/rtl8723bs/hal/rtl8723b_dm.c
View File

@@ -99,7 +99,6 @@ static void Update_ODM_ComInfo_8723b(struct adapter *Adapter)
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess));
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctrlpriv->bpower_saving));
for (i = 0; i < NUM_STA; i++)
ODM_CmnInfoPtrArrayHook(pDM_Odm, ODM_CMNINFO_STA_STATUS, i, NULL);
}
@@ -131,21 +130,19 @@ void rtl8723b_HalDmWatchDog(struct adapter *Adapter)
hw_init_completed = Adapter->hw_init_completed;
if (hw_init_completed == false)
if (!hw_init_completed)
goto skip_dm;
fw_current_in_ps_mode = adapter_to_pwrctl(Adapter)->fw_current_in_ps_mode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
if (
(hw_init_completed == true) &&
((!fw_current_in_ps_mode) && bFwPSAwake)
) {
if (hw_init_completed &&
(!fw_current_in_ps_mode && bFwPSAwake)) {
rtw_hal_check_rxfifo_full(Adapter);
}
/* ODM */
if (hw_init_completed == true) {
if (hw_init_completed) {
u8 bLinked = false;
u8 bsta_state = false;
bool bBtDisabled = true;
@@ -185,7 +182,6 @@ void rtl8723b_hal_dm_in_lps(struct adapter *padapter)
/* update IGI */
ODM_Write_DIG(pDM_Odm, pDM_Odm->RSSI_Min);
/* set rssi to fw */
psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
if (psta && (psta->rssi_stat.UndecoratedSmoothedPWDB > 0)) {
@@ -207,22 +203,20 @@ void rtl8723b_HalDmWatchDog_in_LPS(struct adapter *Adapter)
struct sta_priv *pstapriv = &Adapter->stapriv;
struct sta_info *psta = NULL;
if (Adapter->hw_init_completed == false)
if (!Adapter->hw_init_completed)
goto skip_lps_dm;
if (rtw_linked_check(Adapter))
bLinked = true;
ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_LINK, bLinked);
if (bLinked == false)
if (!bLinked)
goto skip_lps_dm;
if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
goto skip_lps_dm;
/* ODM_DMWatchdog(&pHalData->odmpriv); */
/* Do DIG by RSSI In LPS-32K */
@@ -247,7 +241,6 @@ void rtl8723b_HalDmWatchDog_in_LPS(struct adapter *Adapter)
)
rtw_dm_in_lps_wk_cmd(Adapter);
skip_lps_dm:
return;

124
drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
View File

@@ -68,8 +68,6 @@ static int _BlockWrite(struct adapter *padapter, void *buffer, u32 buffSize)
/* 3 Phase #2 */
if (remainSize_p1) {
offset = blockCount_p1 * blockSize_p1;
blockCount_p2 = remainSize_p1/blockSize_p2;
remainSize_p2 = remainSize_p1%blockSize_p2;
}
@@ -154,7 +152,6 @@ void _8051Reset8723(struct adapter *padapter)
u8 cpu_rst;
u8 io_rst;
/* Reset 8051(WLMCU) IO wrapper */
/* 0x1c[8] = 0 */
/* Suggested by Isaac@SD1 and Gimmy@SD1, coding by Lucas@20130624 */
@@ -269,7 +266,7 @@ void rtl8723b_FirmwareSelfReset(struct adapter *padapter)
rtw_write8(padapter, REG_HMETFR+3, 0x20);
val = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
while (val & BIT2) {
while (val & BIT(2)) {
Delay--;
if (Delay == 0)
break;
@@ -280,7 +277,7 @@ void rtl8723b_FirmwareSelfReset(struct adapter *padapter)
if (Delay == 0) {
/* force firmware reset */
val = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val & (~BIT2));
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val & (~BIT(2)));
}
}
}
@@ -405,11 +402,11 @@ s32 rtl8723b_FirmwareDownload(struct adapter *padapter, bool bUsedWoWLANFw)
break;
}
_FWDownloadEnable(padapter, false);
if (_SUCCESS != rtStatus)
if (rtStatus != _SUCCESS)
goto fwdl_stat;
rtStatus = _FWFreeToGo(padapter, 10, 200);
if (_SUCCESS != rtStatus)
if (rtStatus != _SUCCESS)
goto fwdl_stat;
fwdl_stat:
@@ -573,7 +570,6 @@ void Hal_EfusePowerSwitch(
u8 tempval;
u16 tmpV16;
if (PwrState) {
/* To avoid cannot access efuse registers after disable/enable several times during DTM test. */
/* Suggested by SD1 IsaacHsu. 2013.07.08, added by tynli. */
@@ -581,7 +577,6 @@ void Hal_EfusePowerSwitch(
if (tempval & BIT(0)) { /* SDIO local register is suspend */
u8 count = 0;
tempval &= ~BIT(0);
rtw_write8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HSUS_CTRL, tempval);
@@ -651,7 +646,7 @@ static void hal_ReadEFuse_WiFi(
hal_EfuseSwitchToBank(padapter, 0);
while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) {
efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader);
rtw_efuse_one_byte_read(padapter, eFuse_Addr++, &efuseHeader);
if (efuseHeader == 0xFF)
break;
@@ -659,7 +654,7 @@ static void hal_ReadEFuse_WiFi(
if (EXT_HEADER(efuseHeader)) { /* extended header */
offset = GET_HDR_OFFSET_2_0(efuseHeader);
efuse_OneByteRead(padapter, eFuse_Addr++, &efuseExtHdr);
rtw_efuse_one_byte_read(padapter, eFuse_Addr++, &efuseExtHdr);
if (ALL_WORDS_DISABLED(efuseExtHdr))
continue;
@@ -678,16 +673,18 @@ static void hal_ReadEFuse_WiFi(
for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
/* Check word enable condition in the section */
if (!(wden & (0x01<<i))) {
efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData);
rtw_efuse_one_byte_read(padapter, eFuse_Addr++,
&efuseData);
efuseTbl[addr] = efuseData;
efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData);
rtw_efuse_one_byte_read(padapter, eFuse_Addr++,
&efuseData);
efuseTbl[addr+1] = efuseData;
}
addr += 2;
}
} else {
eFuse_Addr += Efuse_CalculateWordCnts(wden)*2;
eFuse_Addr += rtw_efuse_calculate_word_counts(wden)*2;
}
}
@@ -721,7 +718,6 @@ static void hal_ReadEFuse_BT(
u16 i, total, used;
u8 efuse_usage;
/* */
/* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */
/* */
@@ -738,13 +734,13 @@ static void hal_ReadEFuse_BT(
Hal_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &total);
for (bank = 1; bank < 3; bank++) { /* 8723b Max bake 0~2 */
if (hal_EfuseSwitchToBank(padapter, bank) == false)
if (!hal_EfuseSwitchToBank(padapter, bank))
goto exit;
eFuse_Addr = 0;
while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) {
efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader);
rtw_efuse_one_byte_read(padapter, eFuse_Addr++, &efuseHeader);
if (efuseHeader == 0xFF)
break;
@@ -752,11 +748,10 @@ static void hal_ReadEFuse_BT(
if (EXT_HEADER(efuseHeader)) { /* extended header */
offset = GET_HDR_OFFSET_2_0(efuseHeader);
efuse_OneByteRead(padapter, eFuse_Addr++, &efuseExtHdr);
rtw_efuse_one_byte_read(padapter, eFuse_Addr++, &efuseExtHdr);
if (ALL_WORDS_DISABLED(efuseExtHdr))
continue;
offset |= ((efuseExtHdr & 0xF0) >> 1);
wden = (efuseExtHdr & 0x0F);
} else {
@@ -770,16 +765,18 @@ static void hal_ReadEFuse_BT(
for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
/* Check word enable condition in the section */
if (!(wden & (0x01<<i))) {
efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData);
rtw_efuse_one_byte_read(padapter, eFuse_Addr++,
&efuseData);
efuseTbl[addr] = efuseData;
efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData);
rtw_efuse_one_byte_read(padapter, eFuse_Addr++,
&efuseData);
efuseTbl[addr+1] = efuseData;
}
addr += 2;
}
} else {
eFuse_Addr += Efuse_CalculateWordCnts(wden)*2;
eFuse_Addr += rtw_efuse_calculate_word_counts(wden)*2;
}
}
@@ -823,27 +820,20 @@ void Hal_ReadEFuse(
hal_ReadEFuse_BT(padapter, _offset, _size_byte, pbuf);
}
static struct hal_version ReadChipVersion8723B(struct adapter *padapter)
static void ReadChipVersion8723B(struct adapter *padapter)
{
u32 value32;
struct hal_version ChipVersion;
struct hal_com_data *pHalData;
/* YJ, TODO, move read chip type here */
pHalData = GET_HAL_DATA(padapter);
value32 = rtw_read32(padapter, REG_SYS_CFG);
ChipVersion.ICType = CHIP_8723B;
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
pHalData->chip_normal = ((value32 & RTL_ID) ? false : true);
/* For regulator mode. by tynli. 2011.01.14 */
pHalData->RegulatorMode = ((value32 & SPS_SEL) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
value32 = rtw_read32(padapter, REG_GPIO_OUTSTS);
ChipVersion.ROMVer = ((value32 & RF_RL_ID) >> 20); /* ROM code version. */
/* For multi-function consideration. Added by Roger, 2010.10.06. */
pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
value32 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL);
@@ -851,12 +841,6 @@ static struct hal_version ReadChipVersion8723B(struct adapter *padapter)
pHalData->MultiFunc |= ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0);
pHalData->MultiFunc |= ((value32 & GPS_FUNC_EN) ? RT_MULTI_FUNC_GPS : 0);
pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT);
dump_chip_info(ChipVersion);
pHalData->VersionID = ChipVersion;
return ChipVersion;
}
void rtl8723b_read_chip_version(struct adapter *padapter)
@@ -870,7 +854,6 @@ void rtl8723b_InitBeaconParameters(struct adapter *padapter)
u16 val16;
u8 val8 = DIS_TSF_UDT;
val16 = val8 | (val8 << 8); /* port0 and port1 */
/* Enable prot0 beacon function for PSTDMA */
@@ -882,7 +865,7 @@ void rtl8723b_InitBeaconParameters(struct adapter *padapter)
rtw_write16(padapter, REG_TBTT_PROHIBIT, 0x6404);/* ms */
/* Firmware will control REG_DRVERLYINT when power saving is enable, */
/* so don't set this register on STA mode. */
if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == false)
if (!check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE))
rtw_write8(padapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME_8723B); /* 5ms */
rtw_write8(padapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME_8723B); /* 2ms */
@@ -912,7 +895,7 @@ void _InitBurstPktLen_8723BS(struct adapter *Adapter)
/* ARFB table 9 for 11ac 5G 2SS */
rtw_write32(Adapter, REG_ARFR0_8723B, 0x00000010);
if (IS_NORMAL_CHIP(pHalData->VersionID))
if (pHalData->chip_normal)
rtw_write32(Adapter, REG_ARFR0_8723B+4, 0xfffff000);
else
rtw_write32(Adapter, REG_ARFR0_8723B+4, 0x3e0ff000);
@@ -970,7 +953,6 @@ void rtl8723b_SetBeaconRelatedRegisters(struct adapter *padapter)
/* REG_DUAL_TSF_RST */
/* REG_BCN_CTRL (0x550) */
bcn_ctrl_reg = REG_BCN_CTRL;
/* */
@@ -998,7 +980,8 @@ void rtl8723b_SetBeaconRelatedRegisters(struct adapter *padapter)
rtw_write32(padapter, REG_TCR, value32);
/* NOTE: Fix test chip's bug (about contention windows's randomness) */
if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE) == true) {
if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE |
WIFI_ADHOC_MASTER_STATE | WIFI_AP_STATE)) {
rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50);
rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50);
}
@@ -1014,9 +997,9 @@ void rtl8723b_SetBeaconRelatedRegisters(struct adapter *padapter)
void hal_notch_filter_8723b(struct adapter *adapter, bool enable)
{
if (enable)
rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1);
rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT(1));
else
rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1);
rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT(1));
}
void UpdateHalRAMask8723B(struct adapter *padapter, u32 mac_id, u8 rssi_level)
@@ -1072,7 +1055,6 @@ void rtl8723b_init_default_value(struct adapter *padapter)
struct dm_priv *pdmpriv;
u8 i;
pHalData = GET_HAL_DATA(padapter);
pdmpriv = &pHalData->dmpriv;
@@ -1165,15 +1147,15 @@ s32 rtl8723b_InitLLTTable(struct adapter *padapter)
static void hal_get_chnl_group_8723b(u8 channel, u8 *group)
{
if (1 <= channel && channel <= 2)
if (channel >= 1 && channel <= 2)
*group = 0;
else if (3 <= channel && channel <= 5)
else if (channel >= 3 && channel <= 5)
*group = 1;
else if (6 <= channel && channel <= 8)
else if (channel >= 6 && channel <= 8)
*group = 2;
else if (9 <= channel && channel <= 11)
else if (channel >= 9 && channel <= 11)
*group = 3;
else if (12 <= channel && channel <= 14)
else if (channel >= 12 && channel <= 14)
*group = 4;
}
@@ -1184,12 +1166,12 @@ void Hal_InitPGData(struct adapter *padapter, u8 *PROMContent)
if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */
if (!pEEPROM->EepromOrEfuse) {
/* Read EFUSE real map to shadow. */
EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
rtw_efuse_shadow_map_update(padapter, EFUSE_WIFI);
memcpy(PROMContent, pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE_8723B);
}
} else {/* autoload fail */
if (!pEEPROM->EepromOrEfuse)
EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
rtw_efuse_shadow_map_update(padapter, EFUSE_WIFI);
memcpy(PROMContent, pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE_8723B);
}
}
@@ -1200,7 +1182,6 @@ void Hal_EfuseParseIDCode(struct adapter *padapter, u8 *hwinfo)
/* struct hal_com_data *pHalData = GET_HAL_DATA(padapter); */
u16 EEPROMId;
/* Check 0x8129 again for making sure autoload status!! */
EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
if (EEPROMId != RTL_EEPROM_ID) {
@@ -1221,7 +1202,7 @@ static void Hal_ReadPowerValueFromPROM_8723B(
memset(pwrInfo24G, 0, sizeof(struct TxPowerInfo24G));
if (0xFF == PROMContent[eeAddr+1])
if (PROMContent[eeAddr+1] == 0xFF)
AutoLoadFail = true;
if (AutoLoadFail) {
@@ -1271,7 +1252,7 @@ static void Hal_ReadPowerValueFromPROM_8723B(
pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
else {
pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */
if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
}
@@ -1279,7 +1260,7 @@ static void Hal_ReadPowerValueFromPROM_8723B(
pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF;
else {
pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */
if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
}
pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
@@ -1289,7 +1270,7 @@ static void Hal_ReadPowerValueFromPROM_8723B(
pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
else {
pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */
if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
}
@@ -1297,7 +1278,7 @@ static void Hal_ReadPowerValueFromPROM_8723B(
pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
else {
pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */
if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
}
eeAddr++;
@@ -1306,7 +1287,7 @@ static void Hal_ReadPowerValueFromPROM_8723B(
pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
else {
pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */
if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
}
@@ -1314,7 +1295,7 @@ static void Hal_ReadPowerValueFromPROM_8723B(
pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
else {
pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */
if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
}
eeAddr++;
@@ -1323,7 +1304,6 @@ static void Hal_ReadPowerValueFromPROM_8723B(
}
}
void Hal_EfuseParseTxPowerInfo_8723B(
struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail
)
@@ -1436,8 +1416,6 @@ void Hal_EfuseParseEEPROMVer_8723B(
pHalData->EEPROMVersion = 1;
}
void Hal_EfuseParsePackageType_8723B(
struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
@@ -1447,7 +1425,7 @@ void Hal_EfuseParsePackageType_8723B(
u8 efuseContent;
Hal_EfusePowerSwitch(padapter, true);
efuse_OneByteRead(padapter, 0x1FB, &efuseContent);
rtw_efuse_one_byte_read(padapter, 0x1FB, &efuseContent);
Hal_EfusePowerSwitch(padapter, false);
package = efuseContent & 0x7;
@@ -1471,7 +1449,6 @@ void Hal_EfuseParsePackageType_8723B(
}
}
void Hal_EfuseParseVoltage_8723B(
struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
@@ -1523,7 +1500,6 @@ void Hal_EfuseParseXtal_8723B(
pHalData->CrystalCap = EEPROM_Default_CrystalCap_8723B;
}
void Hal_EfuseParseThermalMeter_8723B(
struct adapter *padapter, u8 *PROMContent, u8 AutoLoadFail
)
@@ -1544,7 +1520,6 @@ void Hal_EfuseParseThermalMeter_8723B(
}
}
void Hal_ReadRFGainOffset(
struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail
)
@@ -1555,7 +1530,8 @@ void Hal_ReadRFGainOffset(
if (!AutoloadFail) {
Adapter->eeprompriv.EEPROMRFGainOffset = PROMContent[EEPROM_RF_GAIN_OFFSET];
Adapter->eeprompriv.EEPROMRFGainVal = EFUSE_Read1Byte(Adapter, EEPROM_RF_GAIN_VAL);
Adapter->eeprompriv.EEPROMRFGainVal = rtw_efuse_read_1_byte(Adapter,
EEPROM_RF_GAIN_VAL);
} else {
Adapter->eeprompriv.EEPROMRFGainOffset = 0;
Adapter->eeprompriv.EEPROMRFGainVal = 0xFF;
@@ -1612,7 +1588,6 @@ static void rtl8723b_cal_txdesc_chksum(struct tx_desc *ptxdesc)
u32 index;
u16 checksum = 0;
/* Clear first */
ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
@@ -2037,7 +2012,7 @@ static void hw_var_set_bcn_func(struct adapter *padapter, u8 variable, u8 *val)
val8 &= ~(EN_BCN_FUNCTION | EN_TXBCN_RPT);
/* Always enable port0 beacon function for PSTDMA */
if (REG_BCN_CTRL == bcn_ctrl_reg)
if (bcn_ctrl_reg == REG_BCN_CTRL)
val8 |= EN_BCN_FUNCTION;
rtw_write8(padapter, bcn_ctrl_reg, val8);
@@ -2107,7 +2082,6 @@ static void hw_var_set_mlme_sitesurvey(struct adapter *padapter, u8 variable, u8
struct hal_com_data *pHalData;
struct mlme_priv *pmlmepriv;
pHalData = GET_HAL_DATA(padapter);
pmlmepriv = &padapter->mlmepriv;
@@ -2118,7 +2092,7 @@ static void hw_var_set_mlme_sitesurvey(struct adapter *padapter, u8 variable, u8
/* config RCR to receive different BSSID & not to receive data frame */
value_rxfltmap2 = 0;
if ((check_fwstate(pmlmepriv, WIFI_AP_STATE) == true))
if (check_fwstate(pmlmepriv, WIFI_AP_STATE))
rcr_clear_bit = RCR_CBSSID_BCN;
value_rcr = rtw_read32(padapter, REG_RCR);
@@ -2170,7 +2144,6 @@ static void hw_var_set_mlme_join(struct adapter *padapter, u8 variable, u8 *val)
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct eeprom_priv *pEEPROM;
pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
if (type == 0) { /* prepare to join */
@@ -2185,7 +2158,7 @@ static void hw_var_set_mlme_join(struct adapter *padapter, u8 variable, u8 *val)
val32 |= RCR_CBSSID_DATA|RCR_CBSSID_BCN;
rtw_write32(padapter, REG_RCR, val32);
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true)
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
RetryLimit = (pEEPROM->CustomerID == RT_CID_CCX) ? 7 : 48;
else /* Ad-hoc Mode */
RetryLimit = 0x7;
@@ -2234,7 +2207,6 @@ s32 c2h_id_filter_ccx_8723b(u8 *buf)
return ret;
}
s32 c2h_handler_8723b(struct adapter *padapter, u8 *buf)
{
struct c2h_evt_hdr_88xx *pC2hEvent = (struct c2h_evt_hdr_88xx *)buf;
@@ -2723,7 +2695,7 @@ void SetHwReg8723B(struct adapter *padapter, u8 variable, u8 *val)
break;
case HW_VAR_DL_RSVD_PAGE:
if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == true)
if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE))
rtl8723b_download_BTCoex_AP_mode_rsvd_page(padapter);
else
rtl8723b_download_rsvd_page(padapter, RT_MEDIA_CONNECT);

67
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
View File

@@ -19,13 +19,12 @@ static u32 phy_CalculateBitShift(u32 BitMask)
u32 i;
for (i = 0; i <= 31; i++) {
if (((BitMask>>i) & 0x1) == 1)
if (((BitMask >> i) & 0x1) == 1)
break;
}
return i;
}
/**
* PHY_QueryBBReg_8723B - Read "specific bits" from BB register.
* @Adapter:
@@ -46,10 +45,8 @@ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask)
BitShift = phy_CalculateBitShift(BitMask);
return (OriginalValue & BitMask) >> BitShift;
}
/**
* PHY_SetBBReg_8723B - Write "Specific bits" to BB register (page 8~).
* @Adapter:
@@ -80,10 +77,8 @@ void PHY_SetBBReg_8723B(
}
rtw_write32(Adapter, RegAddr, Data);
}
/* */
/* 2. RF register R/W API */
/* */
@@ -109,18 +104,18 @@ static u32 phy_RFSerialRead_8723B(
NewOffset = Offset;
if (eRFPath == RF_PATH_A) {
tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord);
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; /* T65 RF */
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord);
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
} else {
tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord);
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; /* T65 RF */
PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge));
tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter2 | MaskforPhySet, bMaskDWord);
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */
PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
}
tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord);
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge);
tmplong2 = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord);
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge));
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2 | MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge);
udelay(10);
@@ -129,19 +124,18 @@ static u32 phy_RFSerialRead_8723B(
udelay(10);
if (eRFPath == RF_PATH_A)
RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1|MaskforPhySet, BIT8);
RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1 | MaskforPhySet, BIT(8));
else if (eRFPath == RF_PATH_B)
RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhySet, BIT8);
RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1 | MaskforPhySet, BIT(8));
if (RfPiEnable) {
/* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */
retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData);
retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi | MaskforPhySet, bLSSIReadBackData);
} else {
/* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */
retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData);
retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack | MaskforPhySet, bLSSIReadBackData);
}
return retValue;
}
/**
@@ -203,14 +197,13 @@ static void phy_RFSerialWrite_8723B(
/* */
/* Put write addr in [5:0] and write data in [31:16] */
/* */
DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; /* T65 RF */
DataAndAddr = ((NewOffset << 20) | (Data & 0x000fffff)) & 0x0fffffff; /* T65 RF */
/* */
/* Write Operation */
/* */
PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
}
/**
* PHY_QueryRFReg_8723B - Query "Specific bits" to RF register (page 8~).
* @Adapter:
@@ -266,18 +259,16 @@ void PHY_SetRFReg_8723B(
if (BitMask != bRFRegOffsetMask) {
Original_Value = phy_RFSerialRead_8723B(Adapter, eRFPath, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Data = ((Original_Value & (~BitMask)) | (Data<<BitShift));
Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
}
phy_RFSerialWrite_8723B(Adapter, eRFPath, RegAddr, Data);
}
/* */
/* 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. */
/* */
/*-----------------------------------------------------------------------------
* PHY_MACConfig8192C - Config MAC by header file or parameter file.
*
@@ -329,7 +320,6 @@ static void phy_InitBBRFRegisterDefinition(struct adapter *Adapter)
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
}
static int phy_BB8723b_Config_ParaFile(struct adapter *Adapter)
@@ -373,7 +363,6 @@ static int phy_BB8723b_Config_ParaFile(struct adapter *Adapter)
return _SUCCESS;
}
int PHY_BBConfig8723B(struct adapter *Adapter)
{
int rtStatus = _SUCCESS;
@@ -385,19 +374,20 @@ int PHY_BBConfig8723B(struct adapter *Adapter)
/* Enable BB and RF */
RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN);
rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1));
rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal | BIT(13) | BIT(0) | BIT(1)));
rtw_write32(Adapter, 0x948, 0x280); /* Others use Antenna S1 */
rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB);
rtw_write8(Adapter, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
msleep(1);
PHY_SetRFReg(Adapter, RF_PATH_A, 0x1, 0xfffff, 0x780);
rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB);
rtw_write8(Adapter, REG_SYS_FUNC_EN,
FEN_PPLL | FEN_PCIEA | FEN_DIO_PCIE | FEN_BB_GLB_RSTn | FEN_BBRSTB);
rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80);
rtw_write8(Adapter, REG_AFE_XTAL_CTRL + 1, 0x80);
/* */
/* Config BB and AGC */
@@ -531,7 +521,7 @@ u8 PHY_GetTxPowerIndex(
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
s8 txPower = 0, powerDiffByRate = 0, limit = 0;
txPower = (s8) PHY_GetTxPowerIndexBase(padapter, RFPath, Rate, BandWidth, Channel);
txPower = (s8)PHY_GetTxPowerIndexBase(padapter, RFPath, Rate, BandWidth, Channel);
powerDiffByRate = PHY_GetTxPowerByRate(padapter, RF_PATH_A, Rate);
limit = phy_get_tx_pwr_lmt(
@@ -551,7 +541,7 @@ u8 PHY_GetTxPowerIndex(
if (txPower > MAX_POWER_INDEX)
txPower = MAX_POWER_INDEX;
return (u8) txPower;
return (u8)txPower;
}
void PHY_SetTxPowerLevel8723B(struct adapter *Adapter, u8 Channel)
@@ -584,7 +574,7 @@ static void phy_SetRegBW_8723B(
break;
case CHANNEL_WIDTH_40:
u2tmp = RegRfMod_BW | BIT7;
u2tmp = RegRfMod_BW | BIT(7);
rtw_write16(Adapter, REG_TRXPTCL_CTL_8723B, (u2tmp & 0xFEFF)); /* BIT 7 = 1, BIT 8 = 0 */
break;
@@ -613,7 +603,6 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter)
u8 SubChnlNum = 0;
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
/* 3 Set Reg668 Reg440 BW */
phy_SetRegBW_8723B(Adapter, pHalData->CurrentChannelBW);
@@ -631,7 +620,7 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter)
PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31|BIT30), 0x0);
PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT(31) | BIT(30)), 0x0);
break;
/* 40 MHz channel*/
@@ -641,11 +630,11 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter)
PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
/* Set Control channel to upper or lower. These settings are required only for 40MHz */
PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1));
PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1));
PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
PHY_SetBBReg(Adapter, 0x818, (BIT(26) | BIT(27)), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
break;
default:
break;
@@ -724,13 +713,11 @@ static void PHY_HandleSwChnlAndSetBW8723B(
if (!pHalData->bSetChnlBW && !pHalData->bSwChnl)
return;
if (pHalData->bSwChnl) {
pHalData->CurrentChannel = ChannelNum;
pHalData->CurrentCenterFrequencyIndex1 = ChannelNum;
}
if (pHalData->bSetChnlBW) {
pHalData->CurrentChannelBW = ChnlWidth;
pHalData->nCur40MhzPrimeSC = ExtChnlOffsetOf40MHz;

12
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
View File

@@ -24,18 +24,16 @@
* 11/05/2008 MHC Add API for tw power setting.
*
*
******************************************************************************/
******************************************************************************/
#include <rtl8723b_hal.h>
/*---------------------------Define Local Constant---------------------------*/
/*---------------------------Define Local Constant---------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define local variable------------------------------*/
/* 2008/11/20 MH For Debug only, RF */
/*------------------------Define local variable------------------------------*/
@@ -53,7 +51,8 @@
* Return: NONE
*
* Note: For RF type 0222D
*---------------------------------------------------------------------------*/
*---------------------------------------------------------------------------
*/
void PHY_RF6052SetBandwidth8723B(
struct adapter *Adapter, enum channel_width Bandwidth
) /* 20M or 40M */
@@ -62,13 +61,13 @@ void PHY_RF6052SetBandwidth8723B(
switch (Bandwidth) {
case CHANNEL_WIDTH_20:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11);
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11));
PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
break;
case CHANNEL_WIDTH_40:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10);
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10));
PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
break;
@@ -148,7 +147,6 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
return _SUCCESS;
}
int PHY_RF6052_Config8723B(struct adapter *Adapter)
{
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);

1
drivers/staging/rtl8723bs/hal/rtl8723b_rxdesc.c
View File

@@ -49,7 +49,6 @@ static void process_link_qual(struct adapter *padapter, union recv_frame *prfram
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
} /* Process_UiLinkQuality8192S */
void rtl8723b_process_phy_info(struct adapter *padapter, void *prframe)
{
union recv_frame *precvframe = prframe;

3
drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c
View File

@@ -110,7 +110,6 @@ static void update_recvframe_phyinfo(union recv_frame *precvframe,
pkt_info.to_self = pkt_info.bssid_match &&
ether_addr_equal(rx_ra, my_hwaddr);
pkt_info.is_beacon = pkt_info.bssid_match &&
(GetFrameSubType(wlanhdr) == WIFI_BEACON);
@@ -135,7 +134,7 @@ static void update_recvframe_phyinfo(union recv_frame *precvframe,
precvframe->u.hdr.psta = NULL;
if (
pkt_info.bssid_match &&
(check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == true)
(check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE))
) {
if (psta) {
precvframe->u.hdr.psta = psta;

29
drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c
View File

@@ -93,7 +93,7 @@ static s32 rtl8723_dequeue_writeport(struct adapter *padapter)
)
goto free_xmitbuf;
if (rtw_sdio_wait_enough_TxOQT_space(padapter, pxmitbuf->agg_num) == false)
if (!rtw_sdio_wait_enough_TxOQT_space(padapter, pxmitbuf->agg_num))
goto free_xmitbuf;
traffic_check_for_leave_lps(padapter, true, pxmitbuf->agg_num);
@@ -225,7 +225,7 @@ static s32 xmit_xmitframes(struct adapter *padapter, struct xmit_priv *pxmitpriv
frame_phead = get_list_head(pframe_queue);
while (list_empty(frame_phead) == false) {
while (!list_empty(frame_phead)) {
frame_plist = get_next(frame_phead);
pxmitframe = container_of(frame_plist, struct xmit_frame, list);
@@ -256,11 +256,6 @@ static s32 xmit_xmitframes(struct adapter *padapter, struct xmit_priv *pxmitpriv
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (!pxmitbuf) {
#ifdef DBG_XMIT_BUF
netdev_err(padapter->pnetdev,
"%s: xmit_buf is not enough!\n",
__func__);
#endif
err = -2;
complete(&(pxmitpriv->xmit_comp));
break;
@@ -269,7 +264,7 @@ static s32 xmit_xmitframes(struct adapter *padapter, struct xmit_priv *pxmitpriv
}
/* ok to send, remove frame from queue */
if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == true)
if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE))
if (
(pxmitframe->attrib.psta->state & WIFI_SLEEP_STATE) &&
(pxmitframe->attrib.triggered == 0)
@@ -395,9 +390,8 @@ static s32 rtl8723bs_xmit_handler(struct adapter *padapter)
spin_lock_bh(&pxmitpriv->lock);
ret = rtw_txframes_pending(padapter);
spin_unlock_bh(&pxmitpriv->lock);
if (ret == 1) {
if (ret == 1)
goto next;
}
return _SUCCESS;
}
@@ -415,7 +409,7 @@ int rtl8723bs_xmit_thread(void *context)
if (signal_pending(current)) {
flush_signals(current);
}
} while (_SUCCESS == ret);
} while (ret == _SUCCESS);
complete(&pxmitpriv->SdioXmitTerminate);
@@ -464,8 +458,8 @@ s32 rtl8723bs_mgnt_xmit(
*Handle xmitframe(packet) come from rtw_xmit()
*
* Return:
*true dump packet directly ok
*false enqueue, temporary can't transmit packets to hardware
* true dump packet directly ok
* false enqueue, temporary can't transmit packets to hardware
*/
s32 rtl8723bs_hal_xmit(
struct adapter *padapter, struct xmit_frame *pxmitframe
@@ -474,7 +468,6 @@ s32 rtl8723bs_hal_xmit(
struct xmit_priv *pxmitpriv;
s32 err;
pxmitframe->attrib.qsel = pxmitframe->attrib.priority;
pxmitpriv = &padapter->xmitpriv;
@@ -491,7 +484,7 @@ s32 rtl8723bs_hal_xmit(
spin_lock_bh(&pxmitpriv->lock);
err = rtw_xmitframe_enqueue(padapter, pxmitframe);
spin_unlock_bh(&pxmitpriv->lock);
if (err != _SUCCESS) {
if (err) {
rtw_free_xmitframe(pxmitpriv, pxmitframe);
pxmitpriv->tx_drop++;
@@ -511,7 +504,7 @@ s32 rtl8723bs_hal_xmitframe_enqueue(
s32 err;
err = rtw_xmitframe_enqueue(padapter, pxmitframe);
if (err != _SUCCESS) {
if (err) {
rtw_free_xmitframe(pxmitpriv, pxmitframe);
pxmitpriv->tx_drop++;
@@ -534,7 +527,6 @@ s32 rtl8723bs_init_xmit_priv(struct adapter *padapter)
struct xmit_priv *xmitpriv = &padapter->xmitpriv;
struct hal_com_data *phal;
phal = GET_HAL_DATA(padapter);
spin_lock_init(&phal->SdioTxFIFOFreePageLock);
@@ -552,7 +544,6 @@ void rtl8723bs_free_xmit_priv(struct adapter *padapter)
struct list_head *plist, *phead;
struct list_head tmplist;
phead = get_list_head(pqueue);
INIT_LIST_HEAD(&tmplist);
@@ -566,7 +557,7 @@ void rtl8723bs_free_xmit_priv(struct adapter *padapter)
spin_unlock_bh(&pqueue->lock);
phead = &tmplist;
while (list_empty(phead) == false) {
while (!list_empty(phead)) {
plist = get_next(phead);
list_del_init(plist);

96
drivers/staging/rtl8723bs/hal/sdio_halinit.c
View File

@@ -21,7 +21,6 @@ static u8 CardEnable(struct adapter *padapter)
u8 bMacPwrCtrlOn;
u8 ret = _FAIL;
rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
if (!bMacPwrCtrlOn) {
/* RSV_CTRL 0x1C[7:0] = 0x00 */
@@ -46,8 +45,6 @@ u8 _InitPowerOn_8723BS(struct adapter *padapter)
u16 value16;
u32 value32;
u8 ret;
/* u8 bMacPwrCtrlOn; */
/* all of these MUST be configured before power on */
@@ -69,10 +66,6 @@ u8 _InitPowerOn_8723BS(struct adapter *padapter)
value16 |= EnPDN; /* Enable HW power down and RF on */
rtw_write16(padapter, REG_APS_FSMCO, value16);
/* Enable CMD53 R/W Operation */
/* bMacPwrCtrlOn = true; */
/* rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); */
rtw_write8(padapter, REG_CR, 0x00);
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
value16 = rtw_read16(padapter, REG_CR);
@@ -241,7 +234,6 @@ static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
struct registry_priv *pregistrypriv = &Adapter->registrypriv;
u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
u16 valueHi = 0;
u16 valueLow = 0;
@@ -325,8 +317,6 @@ static void _InitQueuePriority(struct adapter *Adapter)
default:
break;
}
}
static void _InitPageBoundary(struct adapter *padapter)
@@ -359,7 +349,6 @@ static void _InitNetworkType(struct adapter *padapter)
value32 = rtw_read32(padapter, REG_CR);
/* TODO: use the other function to set network type */
/* value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC); */
value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
rtw_write32(padapter, REG_CR, value32);
@@ -370,7 +359,6 @@ static void _InitWMACSetting(struct adapter *padapter)
struct hal_com_data *pHalData;
u16 value16;
pHalData = GET_HAL_DATA(padapter);
pHalData->ReceiveConfig = 0;
@@ -410,9 +398,6 @@ static void _InitAdaptiveCtrl(struct adapter *padapter)
value32 |= RATE_RRSR_CCK_ONLY_1M;
rtw_write32(padapter, REG_RRSR, value32);
/* CF-END Threshold */
/* m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); */
/* SIFS (used in NAV) */
value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
rtw_write16(padapter, REG_SPEC_SIFS, value16);
@@ -486,9 +471,6 @@ static void _initSdioAggregationSetting(struct adapter *padapter)
{
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
/* Tx aggregation setting */
/* sdio_AggSettingTxUpdate(padapter); */
/* Rx aggregation setting */
HalRxAggr8723BSdio(padapter);
@@ -545,11 +527,6 @@ static void _InitInterrupt(struct adapter *padapter)
/* Initialize and enable SDIO Host Interrupt. */
/* */
InitInterrupt8723BSdio(padapter);
/* */
/* Initialize system Host Interrupt. */
/* */
InitSysInterrupt8723BSdio(padapter);
}
static void _InitRFType(struct adapter *padapter)
@@ -573,11 +550,10 @@ static bool HalDetectPwrDownMode(struct adapter *Adapter)
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter);
EFUSE_ShadowRead(Adapter, 1, 0x7B/*EEPROM_RF_OPT3_92C*/, (u32 *)&tmpvalue);
rtw_efuse_shadow_read(Adapter, 1, 0x7B/*EEPROM_RF_OPT3_92C*/, (u32 *)&tmpvalue);
/* 2010/08/25 MH INF priority > PDN Efuse value. */
if (tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode)
if (tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode)
pHalData->pwrdown = true;
else
pHalData->pwrdown = false;
@@ -596,10 +572,8 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
pHalData = GET_HAL_DATA(padapter);
pwrctrlpriv = adapter_to_pwrctl(padapter);
if (
adapter_to_pwrctl(padapter)->bips_processing == true &&
adapter_to_pwrctl(padapter)->pre_ips_type == 0
) {
if (adapter_to_pwrctl(padapter)->bips_processing &&
adapter_to_pwrctl(padapter)->pre_ips_type == 0) {
unsigned long start_time;
u8 cpwm_orig, cpwm_now;
u8 val8, bMacPwrCtrlOn = true;
@@ -640,9 +614,6 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
return _SUCCESS;
}
/* Disable Interrupt first. */
/* rtw_hal_disable_interrupt(padapter); */
ret = _InitPowerOn_8723BS(padapter);
if (ret == _FAIL)
return _FAIL;
@@ -654,14 +625,12 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
padapter->bFWReady = false;
pHalData->fw_ractrl = false;
return ret;
} else {
padapter->bFWReady = true;
pHalData->fw_ractrl = true;
}
rtl8723b_InitializeFirmwareVars(padapter);
padapter->bFWReady = true;
pHalData->fw_ractrl = true;
/* SIC_Init(padapter); */
rtl8723b_InitializeFirmwareVars(padapter);
if (pwrctrlpriv->reg_rfoff)
pwrctrlpriv->rf_pwrstate = rf_off;
@@ -704,8 +673,6 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
pHalData->RfRegChnlVal[1] =
PHY_QueryRFReg(padapter, (enum rf_path)1, RF_CHNLBW, bRFRegOffsetMask);
/* if (!pHalData->bMACFuncEnable) { */
_InitQueueReservedPage(padapter);
_InitTxBufferBoundary(padapter);
@@ -745,11 +712,6 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
rtw_hal_set_chnl_bw(padapter, padapter->registrypriv.channel,
CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HAL_PRIME_CHNL_OFFSET_DONT_CARE);
/* Record original value for template. This is arough data, we can only use the data */
/* for power adjust. The value can not be adjustde according to different power!!! */
/* pHalData->OriginalCckTxPwrIdx = pHalData->CurrentCckTxPwrIdx; */
/* pHalData->OriginalOfdm24GTxPwrIdx = pHalData->CurrentOfdm24GTxPwrIdx; */
rtl8723b_InitAntenna_Selection(padapter);
/* */
@@ -762,7 +724,6 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
/* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF);
/* */
/* Configure SDIO TxRx Control to enable Rx DMA timer masking. */
/* 2010.02.24. */
@@ -771,7 +732,6 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
_RfPowerSave(padapter);
rtl8723b_InitHalDm(padapter);
/* */
@@ -791,8 +751,6 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
/* ack for xmit mgmt frames. */
rtw_write32(padapter, REG_FWHW_TXQ_CTRL, rtw_read32(padapter, REG_FWHW_TXQ_CTRL) | BIT(12));
/* pHalData->PreRpwmVal = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HRPWM1) & 0x80; */
{
pwrctrlpriv->rf_pwrstate = rf_on;
@@ -844,7 +802,7 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
/* */
/* Description: */
/* RTL8723e card disable power sequence v003 which suggested by Scott. */
/* RTL8723e card disable power sequence v003 which suggested by Scott. */
/* */
/* First created by tynli. 2011.01.28. */
/* */
@@ -856,7 +814,7 @@ static void CardDisableRTL8723BSdio(struct adapter *padapter)
/* Run LPS WL RFOFF flow */
HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723B_enter_lps_flow);
/* ==== Reset digital sequence ====== */
/* ==== Reset digital sequence ====== */
val = rtw_read8(padapter, REG_MCUFWDL);
if ((val & RAM_DL_SEL) && padapter->bFWReady) /* 8051 RAM code */
@@ -879,7 +837,7 @@ static void CardDisableRTL8723BSdio(struct adapter *padapter)
val |= BIT(0);
rtw_write8(padapter, REG_RSV_CTRL + 1, val);
/* ==== Reset digital sequence end ====== */
/* ==== Reset digital sequence end ====== */
bMacPwrCtrlOn = false; /* Disable CMD53 R/W */
rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
@@ -937,7 +895,6 @@ void rtl8723bs_init_default_value(struct adapter *padapter)
{
struct hal_com_data *pHalData;
pHalData = GET_HAL_DATA(padapter);
rtl8723b_init_default_value(padapter);
@@ -953,7 +910,6 @@ void rtl8723bs_interface_configure(struct adapter *padapter)
struct registry_priv *pregistrypriv = &padapter->registrypriv;
bool bWiFiConfig = pregistrypriv->wifi_spec;
pdvobjpriv->RtOutPipe[0] = WLAN_TX_HIQ_DEVICE_ID;
pdvobjpriv->RtOutPipe[1] = WLAN_TX_MIQ_DEVICE_ID;
pdvobjpriv->RtOutPipe[2] = WLAN_TX_LOQ_DEVICE_ID;
@@ -981,13 +937,13 @@ void rtl8723bs_interface_configure(struct adapter *padapter)
}
/* */
/* Description: */
/* We should set Efuse cell selection to WiFi cell in default. */
/* Description: */
/* We should set Efuse cell selection to WiFi cell in default. */
/* */
/* Assumption: */
/* PASSIVE_LEVEL */
/* Assumption: */
/* PASSIVE_LEVEL */
/* */
/* Added by Roger, 2010.11.23. */
/* Added by Roger, 2010.11.23. */
/* */
static void _EfuseCellSel(struct adapter *padapter)
{
@@ -1005,7 +961,6 @@ static void _ReadRFType(struct adapter *Adapter)
pHalData->rf_chip = RF_6052;
}
static void Hal_EfuseParseMACAddr_8723BS(
struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
@@ -1073,24 +1028,22 @@ static void _ReadEfuseInfo8723BS(struct adapter *padapter)
static void _ReadPROMContent(struct adapter *padapter)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
u8 eeValue;
u8 eeValue;
eeValue = rtw_read8(padapter, REG_9346CR);
/* To check system boot selection. */
pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false;
pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true;
/* pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; */
_ReadEfuseInfo8723BS(padapter);
}
/* */
/* Description: */
/* Read HW adapter information by E-Fuse or EEPROM according CR9346 reported. */
/* Description: */
/* Read HW adapter information by E-Fuse or EEPROM according CR9346 reported. */
/* */
/* Assumption: */
/* PASSIVE_LEVEL (SDIO interface) */
/* Assumption: */
/* PASSIVE_LEVEL (SDIO interface) */
/* */
/* */
static s32 _ReadAdapterInfo8723BS(struct adapter *padapter)
@@ -1101,7 +1054,6 @@ static s32 _ReadAdapterInfo8723BS(struct adapter *padapter)
if (!padapter->hw_init_completed)
_InitPowerOn_8723BS(padapter);
val8 = rtw_read8(padapter, 0x4e);
val8 |= BIT(6);
rtw_write8(padapter, 0x4e, val8);
@@ -1118,7 +1070,7 @@ static s32 _ReadAdapterInfo8723BS(struct adapter *padapter)
return _SUCCESS;
}
void ReadAdapterInfo8723BS(struct adapter *padapter)
void rtw_read_adapter_info(struct adapter *padapter)
{
/* Read EEPROM size before call any EEPROM function */
padapter->EepromAddressSize = GetEEPROMSize8723B(padapter);
@@ -1203,14 +1155,14 @@ void SetHwRegWithBuf8723B(struct adapter *padapter, u8 variable, u8 *pbuf, int l
}
/* */
/* Description: */
/* Query setting of specified variable. */
/* Description: */
/* Query setting of specified variable. */
/* */
u8 GetHalDefVar8723BSDIO(
struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue
)
{
u8 bResult = _SUCCESS;
u8 bResult = _SUCCESS;
switch (eVariable) {
case HAL_DEF_IS_SUPPORT_ANT_DIV:

174
drivers/staging/rtl8723bs/hal/sdio_ops.c
View File

@@ -191,51 +191,6 @@ static u32 sdio_read32(struct intf_hdl *intfhdl, u32 addr)
return val;
}
static s32 sdio_readN(struct intf_hdl *intfhdl, u32 addr, u32 cnt, u8 *buf)
{
struct adapter *adapter;
u8 mac_pwr_ctrl_on;
u8 device_id;
u16 offset;
u32 ftaddr;
u8 shift;
s32 err;
adapter = intfhdl->padapter;
err = 0;
ftaddr = _cvrt2ftaddr(addr, &device_id, &offset);
rtw_hal_get_hwreg(adapter, HW_VAR_APFM_ON_MAC, &mac_pwr_ctrl_on);
if (
((device_id == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) ||
(!mac_pwr_ctrl_on) ||
(adapter_to_pwrctl(adapter)->fw_current_in_ps_mode)
)
return sd_cmd52_read(intfhdl, ftaddr, cnt, buf);
/* 4 bytes alignment */
shift = ftaddr & 0x3;
if (shift == 0) {
err = sd_read(intfhdl, ftaddr, cnt, buf);
} else {
u8 *tmpbuf;
u32 n;
ftaddr &= ~(u16)0x3;
n = cnt + shift;
tmpbuf = kmalloc(n, GFP_ATOMIC);
if (!tmpbuf)
return -ENOMEM;
err = sd_read(intfhdl, ftaddr, n, tmpbuf);
if (!err)
memcpy(buf, tmpbuf + shift, cnt);
kfree(tmpbuf);
}
return err;
}
static s32 sdio_write8(struct intf_hdl *intfhdl, u32 addr, u8 val)
{
u32 ftaddr;
@@ -295,73 +250,6 @@ static s32 sdio_write32(struct intf_hdl *intfhdl, u32 addr, u32 val)
return err;
}
static s32 sdio_writeN(struct intf_hdl *intfhdl, u32 addr, u32 cnt, u8 *buf)
{
struct adapter *adapter;
u8 mac_pwr_ctrl_on;
u8 device_id;
u16 offset;
u32 ftaddr;
u8 shift;
s32 err;
adapter = intfhdl->padapter;
err = 0;
ftaddr = _cvrt2ftaddr(addr, &device_id, &offset);
rtw_hal_get_hwreg(adapter, HW_VAR_APFM_ON_MAC, &mac_pwr_ctrl_on);
if (
((device_id == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) ||
(!mac_pwr_ctrl_on) ||
(adapter_to_pwrctl(adapter)->fw_current_in_ps_mode)
)
return sd_cmd52_write(intfhdl, ftaddr, cnt, buf);
shift = ftaddr & 0x3;
if (shift == 0) {
err = sd_write(intfhdl, ftaddr, cnt, buf);
} else {
u8 *tmpbuf;
u32 n;
ftaddr &= ~(u16)0x3;
n = cnt + shift;
tmpbuf = kmalloc(n, GFP_ATOMIC);
if (!tmpbuf)
return -ENOMEM;
err = sd_read(intfhdl, ftaddr, 4, tmpbuf);
if (err) {
kfree(tmpbuf);
return err;
}
memcpy(tmpbuf + shift, buf, cnt);
err = sd_write(intfhdl, ftaddr, n, tmpbuf);
kfree(tmpbuf);
}
return err;
}
static void sdio_read_mem(
struct intf_hdl *intfhdl,
u32 addr,
u32 cnt,
u8 *rmem
)
{
sdio_readN(intfhdl, addr, cnt, rmem);
}
static void sdio_write_mem(
struct intf_hdl *intfhdl,
u32 addr,
u32 cnt,
u8 *wmem
)
{
sdio_writeN(intfhdl, addr, cnt, wmem);
}
/*
* Description:
*Read from RX FIFO
@@ -463,14 +351,10 @@ void sdio_set_intf_ops(struct adapter *adapter, struct _io_ops *ops)
ops->_read8 = &sdio_read8;
ops->_read16 = &sdio_read16;
ops->_read32 = &sdio_read32;
ops->_read_mem = &sdio_read_mem;
ops->_read_port = &sdio_read_port;
ops->_write8 = &sdio_write8;
ops->_write16 = &sdio_write16;
ops->_write32 = &sdio_write32;
ops->_writeN = &sdio_writeN;
ops->_write_mem = &sdio_write_mem;
ops->_write_port = &sdio_write_port;
}
@@ -697,46 +581,23 @@ void InitInterrupt8723BSdio(struct adapter *adapter)
0);
}
/* */
/* Description: */
/* Initialize System Host Interrupt Mask configuration variables for future use. */
/* */
/* Created by Roger, 2011.08.03. */
/* */
void InitSysInterrupt8723BSdio(struct adapter *adapter)
{
struct hal_com_data *haldata;
haldata = GET_HAL_DATA(adapter);
haldata->SysIntrMask = (0);
}
/* */
/* Description: */
/* Enalbe SDIO Host Interrupt Mask configuration on SDIO local domain. */
/* */
/* Assumption: */
/* 1. Using SDIO Local register ONLY for configuration. */
/* 2. PASSIVE LEVEL */
/* */
/* Created by Roger, 2011.02.11. */
/* */
void EnableInterrupt8723BSdio(struct adapter *adapter)
/*
* Enable SDIO Host Interrupt Mask configuration on SDIO local domain.
*
* Assumption:
* 1. Using SDIO Local register ONLY for configuration.
* 2. PASSIVE LEVEL
*/
void rtw_sdio_enable_interrupt(struct adapter *adapter)
{
struct hal_com_data *haldata;
__le32 himr;
u32 tmp;
haldata = GET_HAL_DATA(adapter);
himr = cpu_to_le32(haldata->sdio_himr);
sdio_local_write(adapter, SDIO_REG_HIMR, 4, (u8 *)&himr);
/* Update current system IMR settings */
tmp = rtw_read32(adapter, REG_HSIMR);
rtw_write32(adapter, REG_HSIMR, tmp | haldata->SysIntrMask);
/* */
/* <Roger_Notes> There are some C2H CMDs have been sent before system interrupt is enabled, e.g., C2H, CPWM. */
/* So we need to clear all C2H events that FW has notified, otherwise FW won't schedule any commands anymore. */
@@ -745,16 +606,13 @@ void EnableInterrupt8723BSdio(struct adapter *adapter)
rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
}
/* */
/* Description: */
/* Disable SDIO Host IMR configuration to mask unnecessary interrupt service. */
/* */
/* Assumption: */
/* Using SDIO Local register ONLY for configuration. */
/* */
/* Created by Roger, 2011.02.11. */
/* */
void DisableInterrupt8723BSdio(struct adapter *adapter)
/*
* Disable SDIO Host IMR configuration to mask unnecessary interrupt service.
*
* Assumption:
* Using SDIO Local register ONLY for configuration.
*/
void rtw_sdio_disable_interrupt(struct adapter *adapter)
{
__le32 himr;
@@ -999,5 +857,3 @@ void HalQueryTxOQTBufferStatus8723BSdio(struct adapter *adapter)
haldata->SdioTxOQTFreeSpace = SdioLocalCmd52Read1Byte(adapter, SDIO_REG_OQT_FREE_PG);
}

85
drivers/staging/rtl8723bs/include/HalVerDef.h
View File

@@ -1,85 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __HAL_VERSION_DEF_H__
#define __HAL_VERSION_DEF_H__
/* hal_ic_type_e */
enum hal_ic_type_e { /* tag_HAL_IC_Type_Definition */
CHIP_8723B = 8,
};
/* hal_chip_type_e */
enum hal_chip_type_e { /* tag_HAL_CHIP_Type_Definition */
TEST_CHIP = 0,
NORMAL_CHIP = 1,
FPGA = 2,
};
/* hal_cut_version_e */
enum hal_cut_version_e { /* tag_HAL_Cut_Version_Definition */
A_CUT_VERSION = 0,
B_CUT_VERSION = 1,
C_CUT_VERSION = 2,
D_CUT_VERSION = 3,
E_CUT_VERSION = 4,
F_CUT_VERSION = 5,
G_CUT_VERSION = 6,
H_CUT_VERSION = 7,
I_CUT_VERSION = 8,
J_CUT_VERSION = 9,
K_CUT_VERSION = 10,
};
/* HAL_Manufacturer */
enum hal_vendor_e { /* tag_HAL_Manufacturer_Version_Definition */
CHIP_VENDOR_TSMC = 0,
CHIP_VENDOR_UMC = 1,
CHIP_VENDOR_SMIC = 2,
};
struct hal_version { /* tag_HAL_VERSION */
enum hal_ic_type_e ICType;
enum hal_chip_type_e ChipType;
enum hal_cut_version_e CUTVersion;
enum hal_vendor_e VendorType;
u8 ROMVer;
};
/* hal_version VersionID; */
/* Get element */
#define GET_CVID_IC_TYPE(version) ((enum hal_ic_type_e)((version).ICType))
#define GET_CVID_CHIP_TYPE(version) ((enum hal_chip_type_e)((version).ChipType))
#define GET_CVID_MANUFACTUER(version) ((enum hal_vendor_e)((version).VendorType))
#define GET_CVID_CUT_VERSION(version) ((enum hal_cut_version_e)((version).CUTVersion))
#define GET_CVID_ROM_VERSION(version) (((version).ROMVer) & ROM_VERSION_MASK)
/* */
/* Common Macro. -- */
/* */
/* hal_version VersionID */
/* hal_chip_type_e */
#define IS_TEST_CHIP(version) ((GET_CVID_CHIP_TYPE(version) == TEST_CHIP) ? true : false)
#define IS_NORMAL_CHIP(version) ((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? true : false)
/* hal_cut_version_e */
#define IS_A_CUT(version) ((GET_CVID_CUT_VERSION(version) == A_CUT_VERSION) ? true : false)
#define IS_B_CUT(version) ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? true : false)
#define IS_C_CUT(version) ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? true : false)
#define IS_D_CUT(version) ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? true : false)
#define IS_E_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? true : false)
#define IS_I_CUT(version) ((GET_CVID_CUT_VERSION(version) == I_CUT_VERSION) ? true : false)
#define IS_J_CUT(version) ((GET_CVID_CUT_VERSION(version) == J_CUT_VERSION) ? true : false)
#define IS_K_CUT(version) ((GET_CVID_CUT_VERSION(version) == K_CUT_VERSION) ? true : false)
/* hal_vendor_e */
#define IS_CHIP_VENDOR_TSMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_TSMC) ? true : false)
#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? true : false)
#define IS_CHIP_VENDOR_SMIC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_SMIC) ? true : false)
#endif

2
drivers/staging/rtl8723bs/include/cmd_osdep.h
View File

@@ -7,12 +7,10 @@
#ifndef __CMD_OSDEP_H_
#define __CMD_OSDEP_H_
int rtw_init_cmd_priv(struct cmd_priv *pcmdpriv);
int rtw_init_evt_priv(struct evt_priv *pevtpriv);
extern void _rtw_free_evt_priv(struct evt_priv *pevtpriv);
extern void _rtw_free_cmd_priv(struct cmd_priv *pcmdpriv);
int _rtw_enqueue_cmd(struct __queue *queue, struct cmd_obj *obj);
extern struct cmd_obj *_rtw_dequeue_cmd(struct __queue *queue);
#endif

9
drivers/staging/rtl8723bs/include/drv_types.h
View File

@@ -258,9 +258,6 @@ static inline struct dvobj_priv *pwrctl_to_dvobj(struct pwrctrl_priv *pwrctl_pri
static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
{
/* todo: get interface type from dvobj and the return the dev accordingly */
#ifdef RTW_DVOBJ_CHIP_HW_TYPE
#endif
return &dvobj->intf_data.func->dev;
}
@@ -383,9 +380,9 @@ struct adapter {
/* */
/* Function disabled. */
/* */
#define DF_TX_BIT BIT0
#define DF_RX_BIT BIT1
#define DF_IO_BIT BIT2
#define DF_TX_BIT BIT(0)
#define DF_RX_BIT BIT(1)
#define DF_IO_BIT BIT(2)
/* define RTW_ENABLE_FUNC(padapter, func) (atomic_sub(&adapter_to_dvobj(padapter)->disable_func, (func))) */

3
drivers/staging/rtl8723bs/include/hal_com.h
View File

@@ -7,7 +7,6 @@
#ifndef __HAL_COMMON_H__
#define __HAL_COMMON_H__
#include "HalVerDef.h"
#include "hal_pg.h"
#include "hal_phy.h"
#include "hal_phy_reg.h"
@@ -92,8 +91,6 @@ enum rt_media_status {
u8 rtw_hal_data_init(struct adapter *padapter);
void rtw_hal_data_deinit(struct adapter *padapter);
void dump_chip_info(struct hal_version ChipVersion);
u8 /* return the final channel plan decision */
hal_com_config_channel_plan(
struct adapter *padapter,

104
drivers/staging/rtl8723bs/include/hal_com_reg.h
View File

@@ -204,22 +204,22 @@
/* */
/* 8723/8188E Host System Interrupt Status Register (offset 0x5C, 32 byte) */
/* */
#define HSISR_GPIO12_0_INT BIT0
#define HSISR_SPS_OCP_INT BIT5
#define HSISR_RON_INT BIT6
#define HSISR_PDNINT BIT7
#define HSISR_GPIO9_INT BIT25
#define HSISR_GPIO12_0_INT BIT(0)
#define HSISR_SPS_OCP_INT BIT(5)
#define HSISR_RON_INT BIT(6)
#define HSISR_PDNINT BIT(7)
#define HSISR_GPIO9_INT BIT(25)
/* */
/* Response Rate Set Register (offset 0x440, 24bits) */
/* */
#define RRSR_1M BIT0
#define RRSR_2M BIT1
#define RRSR_5_5M BIT2
#define RRSR_11M BIT3
#define RRSR_6M BIT4
#define RRSR_12M BIT6
#define RRSR_24M BIT8
#define RRSR_1M BIT(0)
#define RRSR_2M BIT(1)
#define RRSR_5_5M BIT(2)
#define RRSR_11M BIT(3)
#define RRSR_6M BIT(4)
#define RRSR_12M BIT(6)
#define RRSR_24M BIT(8)
#define RRSR_CCK_RATES (RRSR_11M|RRSR_5_5M|RRSR_2M|RRSR_1M)
@@ -250,12 +250,12 @@
/* */
/* BW_OPMODE bits (Offset 0x603, 8bit) */
/* */
#define BW_OPMODE_20MHZ BIT2
#define BW_OPMODE_20MHZ BIT(2)
/* */
/* CAM Config Setting (offset 0x680, 1 byte) */
/* */
#define CAM_VALID BIT15
#define CAM_VALID BIT(15)
#define CAM_CONTENT_COUNT 8
@@ -263,8 +263,8 @@
#define TOTAL_CAM_ENTRY 32
#define CAM_WRITE BIT16
#define CAM_POLLINIG BIT31
#define CAM_WRITE BIT(16)
#define CAM_POLLINIG BIT(31)
/* */
/* 12. Host Interrupt Status Registers */
@@ -273,20 +273,20 @@
/* */
/* 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) */
/* */
#define RCR_APPFCS BIT31 /* WMAC append FCS after pauload */
#define RCR_APP_MIC BIT30 /* MACRX will retain the MIC at the bottom of the packet. */
#define RCR_APP_ICV BIT29 /* MACRX will retain the ICV at the bottom of the packet. */
#define RCR_APP_PHYST_RXFF BIT28 /* PHY Status is appended before RX packet in RXFF */
#define RCR_APP_BA_SSN BIT27 /* SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. */
#define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC = 1 MFC-->HTC = 0 */
#define RCR_AMF BIT13 /* Accept management type frame */
#define RCR_ADF BIT11 /* Accept data type frame. This bit also regulates BA, BAR, and PS-Poll (AP mode only). */
#define RCR_ACRC32 BIT8 /* Accept CRC32 error packet */
#define RCR_CBSSID_BCN BIT7 /* Accept BSSID match packet (Rx beacon, probe rsp) */
#define RCR_CBSSID_DATA BIT6 /* Accept BSSID match packet (Data) */
#define RCR_AB BIT3 /* Accept broadcast packet */
#define RCR_AM BIT2 /* Accept multicast packet */
#define RCR_APM BIT1 /* Accept physical match packet */
#define RCR_APPFCS BIT(31) /* WMAC append FCS after pauload */
#define RCR_APP_MIC BIT(30) /* MACRX will retain the MIC at the bottom of the packet. */
#define RCR_APP_ICV BIT(29) /* MACRX will retain the ICV at the bottom of the packet. */
#define RCR_APP_PHYST_RXFF BIT(28) /* PHY Status is appended before RX packet in RXFF */
#define RCR_APP_BA_SSN BIT(27) /* SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. */
#define RCR_HTC_LOC_CTRL BIT(14) /* MFC<--HTC = 1 MFC-->HTC = 0 */
#define RCR_AMF BIT(13) /* Accept management type frame */
#define RCR_ADF BIT(11) /* Accept data type frame. This bit also regulates BA, BAR, and PS-Poll (AP mode only). */
#define RCR_ACRC32 BIT(8) /* Accept CRC32 error packet */
#define RCR_CBSSID_BCN BIT(7) /* Accept BSSID match packet (Rx beacon, probe rsp) */
#define RCR_CBSSID_DATA BIT(6) /* Accept BSSID match packet (Data) */
#define RCR_AB BIT(3) /* Accept broadcast packet */
#define RCR_AM BIT(2) /* Accept multicast packet */
#define RCR_APM BIT(1) /* Accept physical match packet */
/* */
@@ -540,26 +540,26 @@
#define SDIO_HIMR_DISABLED 0
/* RTL8723/RTL8188E SDIO Host Interrupt Mask Register */
#define SDIO_HIMR_RX_REQUEST_MSK BIT0
#define SDIO_HIMR_AVAL_MSK BIT1
#define SDIO_HIMR_RX_REQUEST_MSK BIT(0)
#define SDIO_HIMR_AVAL_MSK BIT(1)
/* SDIO Host Interrupt Service Routine */
#define SDIO_HISR_RX_REQUEST BIT0
#define SDIO_HISR_AVAL BIT1
#define SDIO_HISR_TXERR BIT2
#define SDIO_HISR_RXERR BIT3
#define SDIO_HISR_TXFOVW BIT4
#define SDIO_HISR_RXFOVW BIT5
#define SDIO_HISR_TXBCNOK BIT6
#define SDIO_HISR_TXBCNERR BIT7
#define SDIO_HISR_C2HCMD BIT17
#define SDIO_HISR_CPWM1 BIT18
#define SDIO_HISR_CPWM2 BIT19
#define SDIO_HISR_HSISR_IND BIT20
#define SDIO_HISR_GTINT3_IND BIT21
#define SDIO_HISR_GTINT4_IND BIT22
#define SDIO_HISR_PSTIMEOUT BIT23
#define SDIO_HISR_OCPINT BIT24
#define SDIO_HISR_RX_REQUEST BIT(0)
#define SDIO_HISR_AVAL BIT(1)
#define SDIO_HISR_TXERR BIT(2)
#define SDIO_HISR_RXERR BIT(3)
#define SDIO_HISR_TXFOVW BIT(4)
#define SDIO_HISR_RXFOVW BIT(5)
#define SDIO_HISR_TXBCNOK BIT(6)
#define SDIO_HISR_TXBCNERR BIT(7)
#define SDIO_HISR_C2HCMD BIT(17)
#define SDIO_HISR_CPWM1 BIT(18)
#define SDIO_HISR_CPWM2 BIT(19)
#define SDIO_HISR_HSISR_IND BIT(20)
#define SDIO_HISR_GTINT3_IND BIT(21)
#define SDIO_HISR_GTINT4_IND BIT(22)
#define SDIO_HISR_PSTIMEOUT BIT(23)
#define SDIO_HISR_OCPINT BIT(24)
#define MASK_SDIO_HISR_CLEAR (SDIO_HISR_TXERR |\
SDIO_HISR_RXERR |\
@@ -590,9 +590,9 @@
#define C2H_EVT_FW_CLOSE 0xFF /* Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. */
/* 2REG_MULTI_FUNC_CTRL(For RTL8723 Only) */
#define WL_HWPDN_SL BIT1 /* WiFi HW PDn polarity control */
#define WL_FUNC_EN BIT2 /* WiFi function enable */
#define BT_FUNC_EN BIT18 /* BT function enable */
#define GPS_FUNC_EN BIT22 /* GPS function enable */
#define WL_HWPDN_SL BIT(1) /* WiFi HW PDn polarity control */
#define WL_FUNC_EN BIT(2) /* WiFi function enable */
#define BT_FUNC_EN BIT(18) /* BT function enable */
#define GPS_FUNC_EN BIT(22) /* GPS function enable */
#endif /* __HAL_COMMON_H__ */

8
drivers/staging/rtl8723bs/include/hal_data.h
View File

@@ -77,7 +77,7 @@ enum {
struct dm_priv {
u8 DM_Type;
#define DYNAMIC_FUNC_BT BIT0
#define DYNAMIC_FUNC_BT BIT(0)
u8 DMFlag;
u8 InitDMFlag;
@@ -162,7 +162,6 @@ struct dm_priv {
struct hal_com_data {
struct hal_version VersionID;
enum rt_multi_func MultiFunc; /* For multi-function consideration. */
enum rt_polarity_ctl PolarityCtl; /* For Wifi PDn Polarity control. */
enum rt_regulator_mode RegulatorMode; /* switching regulator or LDO */
@@ -388,9 +387,8 @@ struct hal_com_data {
/* For bluetooth co-existence */
struct bt_coexist bt_coexist;
/* Interrupt related register information. */
u32 SysIntrStatus;
u32 SysIntrMask;
/* Chip version information */
bool chip_normal; /* true - normal chip, false - test chip */
};
#define GET_HAL_DATA(__padapter) ((struct hal_com_data *)((__padapter)->HalData))

31
drivers/staging/rtl8723bs/include/hal_intf.h
View File

@@ -9,10 +9,10 @@
enum {
RTW_PCIE = BIT0,
RTW_USB = BIT1,
RTW_SDIO = BIT2,
RTW_GSPI = BIT3,
RTW_PCIE = BIT(0),
RTW_USB = BIT(1),
RTW_SDIO = BIT(2),
RTW_GSPI = BIT(3),
};
enum {
@@ -161,10 +161,10 @@ enum hal_intf_ps_func {
typedef s32 (*c2h_id_filter)(u8 *c2h_evt);
#define RF_CHANGE_BY_INIT 0
#define RF_CHANGE_BY_IPS BIT28
#define RF_CHANGE_BY_PS BIT29
#define RF_CHANGE_BY_HW BIT30
#define RF_CHANGE_BY_SW BIT31
#define RF_CHANGE_BY_IPS BIT(28)
#define RF_CHANGE_BY_PS BIT(29)
#define RF_CHANGE_BY_HW BIT(30)
#define RF_CHANGE_BY_SW BIT(31)
#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv)
#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse)
@@ -181,12 +181,6 @@ typedef s32 (*c2h_id_filter)(u8 *c2h_evt);
#define RX_PNOWakeUp 0x55
#define AP_WakeUp 0x66
void rtw_hal_def_value_init(struct adapter *padapter);
void rtw_hal_free_data(struct adapter *padapter);
void rtw_hal_dm_init(struct adapter *padapter);
uint rtw_hal_init(struct adapter *padapter);
uint rtw_hal_deinit(struct adapter *padapter);
void rtw_hal_stop(struct adapter *padapter);
@@ -195,20 +189,13 @@ void rtw_hal_get_hwreg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_set_hwreg_with_buf(struct adapter *padapter, u8 variable, u8 *pbuf, int len);
void rtw_hal_chip_configure(struct adapter *padapter);
void rtw_hal_read_chip_info(struct adapter *padapter);
void rtw_hal_read_chip_version(struct adapter *padapter);
u8 rtw_hal_get_def_var(struct adapter *padapter, enum hal_def_variable eVariable, void *pValue);
void rtw_hal_set_odm_var(struct adapter *padapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet);
void rtw_hal_enable_interrupt(struct adapter *padapter);
void rtw_hal_disable_interrupt(struct adapter *padapter);
u8 rtw_hal_check_ips_status(struct adapter *padapter);
s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe);
int rtw_hal_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtw_hal_mgnt_xmit(struct adapter *padapter, struct xmit_frame *pmgntframe);

4
drivers/staging/rtl8723bs/include/hal_phy.h
View File

@@ -10,8 +10,8 @@
/* Antenna detection method, i.e., using single tone detection or RSSI reported from each antenna detected. */
/* Added by Roger, 2013.05.22. */
/* */
#define ANT_DETECT_BY_SINGLE_TONE BIT0
#define ANT_DETECT_BY_RSSI BIT1
#define ANT_DETECT_BY_SINGLE_TONE BIT(0)
#define ANT_DETECT_BY_RSSI BIT(1)
#define IS_ANT_DETECT_SUPPORT_SINGLE_TONE(__Adapter) ((GET_HAL_DATA(__Adapter)->AntDetection) & ANT_DETECT_BY_SINGLE_TONE)
#define IS_ANT_DETECT_SUPPORT_RSSI(__Adapter) ((GET_HAL_DATA(__Adapter)->AntDetection) & ANT_DETECT_BY_RSSI)

182
drivers/staging/rtl8723bs/include/hal_pwr_seq.h
View File

@@ -39,92 +39,92 @@
#define RTL8723B_TRANS_CARDEMU_TO_ACT \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \
{0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \
{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \
{0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \
{0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \
{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital , 1:isolation*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]= 0 and WLSUS_EN 0x04[11]= 0*/ \
{0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* Disable USB suspend */ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \
{0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* Enable USB suspend */ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]= 1*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]= 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \
{0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \
{0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\
{0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\
{0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\
{0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\
{0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\
{0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\
{0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\
{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), 0}, /*0x00[5] = 1b'0 release analog Ips to digital , 1:isolation*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT(4)|BIT(3)|BIT(2)), 0},/* disable SW LPS 0x04[10]= 0 and WLSUS_EN 0x04[11]= 0*/ \
{0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* Disable USB suspend */ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), BIT(1)},/* wait till 0x04[17] = 1 power ready*/ \
{0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), (0)},/* Enable USB suspend */ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* release WLON reset 0x04[16]= 1*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0},/* disable HWPDN 0x04[15]= 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT(4)|BIT(3)), 0},/* disable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* polling until return 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(0), 0},/**/ \
{0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6), BIT(6)},/* Enable WL control XTAL setting*/ \
{0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/*Enable falling edge triggering interrupt*/\
{0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/*Enable GPIO9 interrupt mode*/\
{0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*Enable GPIO9 input mode*/\
{0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/*Enable HSISR GPIO[C:0] interrupt*/\
{0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/*Enable HSISR GPIO9 interrupt*/\
{0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3), BIT(3)},/*For GPIO9 internal pull high setting by test chip*/\
{0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6), BIT(6)},/*For GPIO9 internal pull high setting*/\
#define RTL8723B_TRANS_ACT_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \
{0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]= 1*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \
{0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\
{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital , 1:isolation*/ \
{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\
{0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*Enable rising edge triggering interrupt*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* release WLON reset 0x04[16]= 1*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \
{0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6), 0},/* Enable BT control XTAL setting*/\
{0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), BIT(5)}, /*0x00[5] = 1b'1 analog Ips to digital , 1:isolation*/ \
{0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\
#define RTL8723B_TRANS_CARDEMU_TO_SUS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4)|BIT(3), (BIT(4)|BIT(3))}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), BIT(3)}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), BIT(3)|BIT(4)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, /*wait power state to suspend*/
#define RTL8723B_TRANS_SUS_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(7), 0}, /*clear suspend enable and power down enable*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, /*wait power state to suspend*/\
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
#define RTL8723B_TRANS_CARDEMU_TO_CARDDIS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, omments here*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \
{0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), BIT(3)}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(2), BIT(2)}, /*0x04[10] = 1, enable SW LPS*/ \
{0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, /*wait power state to suspend*/
#define RTL8723B_TRANS_CARDDIS_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
{0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(7), 0}, /*clear suspend enable and power down enable*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, /*wait power state to suspend*/\
{0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3)|BIT(4), 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \
{0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/
#define RTL8723B_TRANS_CARDEMU_TO_PDN \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/* 0x04[16] = 0*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)},/* 0x04[15] = 1*/
#define RTL8723B_TRANS_ACT_TO_LPS \
/* format */ \
@@ -135,13 +135,13 @@
{0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/*CCK and OFDM are disabled, and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*Whole BB is reset*/ \
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*check if removed later*/ \
{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \
{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \
{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), BIT(5)},/*Respond TxOK to scheduler*/ \
#define RTL8723B_TRANS_LPS_TO_ACT \
@@ -151,59 +151,59 @@
{0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\
{0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]= 0 TSF in 40M*/\
{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(7), 0}, /*Polling 0x109[7]= 0 TSF in 40M*/\
{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6)|BIT(7), 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, /*. 0x101[1] = 1*/\
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1)|BIT(0), BIT(1)|BIT(0)}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/
#define RTL8723B_TRANS_ACT_TO_SWLPS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable 32 K source*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \
{0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/*enable 32 K source*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/*CCK and OFDM are disabled, and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 1},/*CCK and OFDM are enable*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/*CCK and OFDM are disabled, and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 1},/*CCK and OFDM are enable*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/*CCK and OFDM are disabled, and clock are gated*/ \
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*disable security engine*/ \
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*disable security engine*/ \
{0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x40},/*When driver enter Sus/ Disable, enable LOP for BT*/ \
{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*reset dual TSF*/ \
{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/*Reset CPU*/ \
{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), BIT(5)},/*reset dual TSF*/ \
{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(2), 0},/*Reset CPU*/ \
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*Reset MCUFWDL register*/ \
{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \
{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*Reset CPU IO Wrapper*/ \
{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/*Reset CPU IO Wrapper*/ \
{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 1},/*Reset CPU IO Wrapper*/ \
{0x0287, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*polling RXFF packet number = 0 */ \
{0x0286, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/*polling RXDMA idle */ \
{0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Clear FW RPWM interrupt */\
{0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Set FW RPWM interrupt source*/\
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/*switch TSF to 32K*/\
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/*polling TSF stable*/\
{0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Set FW LPS*/ \
{0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/*polling FW LPS ready */
{0x0286, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), BIT(1)},/*polling RXDMA idle */ \
{0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/*Clear FW RPWM interrupt */\
{0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/*Set FW RPWM interrupt source*/\
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)},/*switch TSF to 32K*/\
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)},/*polling TSF stable*/\
{0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/*Set FW LPS*/ \
{0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(0), 0},/*polling FW LPS ready */
#define RTL8723B_TRANS_SWLPS_TO_ACT \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/*switch TSF to 32K*/\
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0},/*switch TSF to 32K*/\
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0},/*polling TSF stable*/\
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, /*. 0x101[1] = 1, enable security engine*/\
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\
{0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\
{0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \
{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \
{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \
{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \
{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/* set CPU RAM code ready*/ \
{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/*Reset CPU IO Wrapper*/ \
{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(2), 0},/* Enable CPU*/ \
{0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/*enable CPU IO Wrapper*/ \
{0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(2), BIT(2)},/* Enable CPU*/ \
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(7), BIT(7)},/*polling FW init ready */ \
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(6), BIT(6)},/*polling FW init ready */ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/
#define RTL8723B_TRANS_END \

54
drivers/staging/rtl8723bs/include/ieee80211.h
View File

@@ -231,7 +231,7 @@ struct eapol {
u8 version;
u8 type;
u16 length;
} __attribute__ ((packed));
} __packed;
#define IEEE80211_FCS_LEN 4
@@ -274,7 +274,7 @@ struct ieee80211_snap_hdr {
u8 ssap; /* always 0xAA */
u8 ctrl; /* always 0x03 */
u8 oui[P80211_OUI_LEN]; /* organizational universal id */
} __attribute__ ((packed));
} __packed;
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
@@ -394,18 +394,20 @@ enum {
};
#define IS_HT_RATE(_rate) (_rate >= MGN_MCS0 && _rate <= MGN_MCS31)
#define IS_CCK_RATE(_rate) (MGN_1M == _rate || _rate == MGN_2M || _rate == MGN_5_5M || _rate == MGN_11M)
#define IS_OFDM_RATE(_rate) (MGN_6M <= _rate && _rate <= MGN_54M && _rate != MGN_11M)
#define IS_CCK_RATE(_rate) (_rate == MGN_1M || _rate == MGN_2M || _rate == MGN_5_5M || _rate == MGN_11M)
#define IS_OFDM_RATE(_rate) (_rate >= MGN_6M && _rate <= MGN_54M && _rate != MGN_11M)
/* NOTE: This data is for statistical purposes; not all hardware provides this
* information for frames received. Not setting these will not cause
* any adverse affects. */
* any adverse affects.
*/
/* IEEE 802.11 requires that STA supports concurrent reception of at least
* three fragmented frames. This define can be increased to support more
* concurrent frames, but it should be noted that each entry can consume about
* 2 kB of RAM and increasing cache size will slow down frame reassembly. */
* 2 kB of RAM and increasing cache size will slow down frame reassembly.
*/
#define IEEE80211_FRAG_CACHE_LEN 4
#define SEC_KEY_1 (1<<0)
@@ -431,19 +433,17 @@ enum {
#define BIP_AAD_SIZE 20
/*
802.11 data frame from AP
,-------------------------------------------------------------------.
Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
|------|------|---------|---------|---------|------|---------|------|
Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
| | tion | (BSSID) | | | ence | data | |
`-------------------------------------------------------------------'
Total: 28-2340 bytes
*/
* 802.11 data frame from AP
*
* ,-------------------------------------------------------------------.
* Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
* |------|------|---------|---------|---------|------|---------|------|
* Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
* | | tion | (BSSID) | | | ence | data | |
* `-------------------------------------------------------------------'
*
* Total: 28-2340 bytes
*/
#define BEACON_PROBE_SSID_ID_POSITION 12
@@ -467,7 +467,8 @@ Total: 28-2340 bytes
/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
* only use 8, and then use extended rates for the remaining supported
* rates. Other APs, however, stick all of their supported rates on the
* main rates information element... */
* main rates information element...
*/
#define MAX_RATES_LENGTH ((u8)12)
#define MAX_RATES_EX_LENGTH ((u8)16)
#define MAX_NETWORK_COUNT 128
@@ -497,11 +498,11 @@ Total: 28-2340 bytes
#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
#define IW_ESSID_MAX_SIZE 32
/*
join_res:
-1: authentication fail
-2: association fail
> 0: TID
*/
* join_res:
* -1: authentication fail
* -2: association fail
* > 0: TID
*/
#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
#define DEFAULT_FTS 2346
@@ -555,8 +556,7 @@ enum {
ACT_PUBLIC_MAX
};
#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs)
* 00:50:F2 */
#define OUI_MICROSOFT 0x0050f2 /* Microsoft OUI (also used in Wi-Fi specs) */
#define WME_OUI_TYPE 2
#define WME_OUI_SUBTYPE_INFORMATION_ELEMENT 0
#define WME_OUI_SUBTYPE_PARAMETER_ELEMENT 1

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