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ASoC: ti: j721e-evm: Fix clock configuration for ti,j7200-cpb-audio compatible

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For 'ti,j7200-cpb-audio' compatible, there is support for only one PLL for
48k. For 11025, 22050, 44100 and 88200 sampling rates, due to absence of
J721E_CLK_PARENT_44100, we get EINVAL while running any audio application.
Add support for these rates by using the 48k parent clock and adjusting
the clock for these rates later in j721e_configure_refclk.

Fixes: 6748d05590 ("ASoC: ti: Add custom machine driver for j721e EVM (CPB and IVI)")
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://patch.msgid.link/20250318113524.57100-1-j-choudhary@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jayesh Choudhary
2025-03-18 17:05:24 +05:30
committed by Mark Brown
parent 309b367eaf
commit 45ff65e30d
1 changed files with 2 additions and 0 deletions
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2
sound/soc/ti/j721e-evm.c
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@@ -182,6 +182,8 @@ static int j721e_configure_refclk(struct j721e_priv *priv,
clk_id = J721E_CLK_PARENT_48000;
else if (!(rate % 11025) && priv->pll_rates[J721E_CLK_PARENT_44100])
clk_id = J721E_CLK_PARENT_44100;
else if (!(rate % 11025) && priv->pll_rates[J721E_CLK_PARENT_48000])
clk_id = J721E_CLK_PARENT_48000;
else
return ret;