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drm/mediatek: dpi: Add check for max clock rate in mode_valid

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Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.

Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
This commit is contained in:
Rex-BC Chen
2021-03-18 13:40:55 +08:00
committed by Chun-Kuang Hu
parent ee5ee188e2
commit 44b0712029
1 changed files with 18 additions and 0 deletions
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18
drivers/gpu/drm/mediatek/mtk_dpi.c
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@@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
struct mtk_dpi_conf {
unsigned int (*cal_factor)(int clock);
u32 reg_h_fre_con;
u32 max_clock_khz;
bool edge_sel_en;
};
@@ -557,9 +558,23 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
mtk_dpi_set_display_mode(dpi, &dpi->mode);
}
static enum drm_mode_status
mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
const struct drm_display_info *info,
const struct drm_display_mode *mode)
{
struct mtk_dpi *dpi = bridge_to_dpi(bridge);
if (mode->clock > dpi->conf->max_clock_khz)
return MODE_CLOCK_HIGH;
return MODE_OK;
}
static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
.attach = mtk_dpi_bridge_attach,
.mode_set = mtk_dpi_bridge_mode_set,
.mode_valid = mtk_dpi_bridge_mode_valid,
.disable = mtk_dpi_bridge_disable,
.enable = mtk_dpi_bridge_enable,
};
@@ -668,17 +683,20 @@ static unsigned int mt8183_calculate_factor(int clock)
static const struct mtk_dpi_conf mt8173_conf = {
.cal_factor = mt8173_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 300000,
};
static const struct mtk_dpi_conf mt2701_conf = {
.cal_factor = mt2701_calculate_factor,
.reg_h_fre_con = 0xb0,
.edge_sel_en = true,
.max_clock_khz = 150000,
};
static const struct mtk_dpi_conf mt8183_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 100000,
};
static int mtk_dpi_probe(struct platform_device *pdev)