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media: i2c: ds90ub960: Split ub960_init_tx_ports()

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Split ub960_init_tx_ports() to a UB960 and a UB9702 versions to make it
easier to update the UB9702 version in the following patch.

No funcional changes.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
This commit is contained in:
Tomi Valkeinen
2025-03-03 21:32:14 +05:30
committed by Hans Verkuil
parent 21a22b0feb
commit 43635b661e
1 changed files with 68 additions and 37 deletions
Download Patch File Download Diff File Expand all files Collapse all files

105
drivers/media/i2c/ds90ub960.c
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@@ -1992,67 +1992,98 @@ static int ub960_init_tx_port(struct ub960_data *priv,
return ub960_txport_write(priv, nport, UB960_TR_CSI_CTL, csi_ctl, NULL);
}
static int ub960_init_tx_ports(struct ub960_data *priv)
static int ub960_init_tx_ports_ub960(struct ub960_data *priv)
{
u8 speed_select;
switch (priv->tx_data_rate) {
case MHZ(400):
speed_select = 3;
break;
case MHZ(800):
speed_select = 2;
break;
case MHZ(1200):
speed_select = 1;
break;
case MHZ(1600):
default:
speed_select = 0;
break;
}
return ub960_write(priv, UB960_SR_CSI_PLL_CTL, speed_select, NULL);
}
static int ub960_init_tx_ports_ub9702(struct ub960_data *priv)
{
unsigned int nport;
u8 speed_select;
u8 pll_div;
int ret = 0;
/* TX ports */
switch (priv->tx_data_rate) {
case MHZ(1600):
default:
speed_select = 0;
case MHZ(400):
speed_select = 3;
pll_div = 0x10;
break;
case MHZ(800):
speed_select = 2;
pll_div = 0x10;
break;
case MHZ(1200):
speed_select = 1;
pll_div = 0x18;
break;
case MHZ(800):
speed_select = 2;
pll_div = 0x10;
break;
case MHZ(400):
speed_select = 3;
case MHZ(1600):
default:
speed_select = 0;
pll_div = 0x10;
break;
}
ub960_write(priv, UB960_SR_CSI_PLL_CTL, speed_select, &ret);
if (priv->hw_data->is_ub9702) {
ub960_write(priv, UB9702_SR_CSI_PLL_DIV, pll_div, &ret);
ub960_write(priv, UB9702_SR_CSI_PLL_DIV, pll_div, &ret);
switch (priv->tx_data_rate) {
case MHZ(1600):
default:
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x92,
0x80, &ret);
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x4b,
0x2a, &ret);
break;
case MHZ(800):
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x92,
0x90, &ret);
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x4f,
0x2a, &ret);
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x4b,
0x2a, &ret);
break;
case MHZ(400):
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x92,
0xa0, &ret);
break;
}
switch (priv->tx_data_rate) {
case MHZ(1600):
default:
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x92, 0x80,
&ret);
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x4b, 0x2a,
&ret);
break;
case MHZ(800):
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x92, 0x90,
&ret);
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x4f, 0x2a,
&ret);
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x4b, 0x2a,
&ret);
break;
case MHZ(400):
ub960_write_ind(priv, UB960_IND_TARGET_CSI_ANA, 0x92, 0xa0,
&ret);
break;
}
return ret;
}
static int ub960_init_tx_ports(struct ub960_data *priv)
{
int ret;
if (priv->hw_data->is_ub9702)
ret = ub960_init_tx_ports_ub9702(priv);
else
ret = ub960_init_tx_ports_ub960(priv);
if (ret)
return ret;
for (nport = 0; nport < priv->hw_data->num_txports; nport++) {
for (unsigned int nport = 0; nport < priv->hw_data->num_txports;
nport++) {
struct ub960_txport *txport = priv->txports[nport];
if (!txport)