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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-05-07 19:49:33 -04:00
wifi: rtw89: coex: Combine set grant WL/BT and correct the debug log
To reduce register IO, combine set_gnt_wl/set_gnt_bt to set the same register one time. Because RTL8852C use different register to control antenna path, so make correction of path control related debug logs. Signed-off-by: Ching-Te Ku <ku920601@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220913092546.43722-8-pkshih@realtek.com
This commit is contained in:
@@ -491,6 +491,11 @@ enum btc_gnt_state {
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BTC_GNT_MAX
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};
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enum btc_ctr_path {
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BTC_CTRL_BY_BT = 0,
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BTC_CTRL_BY_WL
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};
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enum btc_wl_max_tx_time {
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BTC_MAX_TX_TIME_L1 = 500,
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BTC_MAX_TX_TIME_L2 = 1000,
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@@ -1621,7 +1626,7 @@ void btc_fw_event(struct rtw89_dev *rtwdev, u8 evt_id, void *data, u32 len)
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}
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}
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static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
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static void _set_gnt(struct rtw89_dev *rtwdev, u8 phy_map, u8 wl_state, u8 bt_state)
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{
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struct rtw89_btc *btc = &rtwdev->btc;
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struct rtw89_btc_dm *dm = &btc->dm;
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@@ -1635,7 +1640,7 @@ static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
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if (!(phy_map & BIT(i)))
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continue;
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switch (state) {
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switch (wl_state) {
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case BTC_GNT_HW:
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g[i].gnt_wl_sw_en = 0;
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g[i].gnt_wl = 0;
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@@ -1649,6 +1654,21 @@ static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
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g[i].gnt_wl = 1;
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break;
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}
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switch (bt_state) {
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case BTC_GNT_HW:
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g[i].gnt_bt_sw_en = 0;
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g[i].gnt_bt = 0;
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break;
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case BTC_GNT_SW_LO:
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g[i].gnt_bt_sw_en = 1;
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g[i].gnt_bt = 0;
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break;
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case BTC_GNT_SW_HI:
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g[i].gnt_bt_sw_en = 1;
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g[i].gnt_bt = 1;
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break;
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}
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}
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rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
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@@ -2783,39 +2803,6 @@ void rtw89_btc_set_policy_v1(struct rtw89_dev *rtwdev, u16 policy_type)
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}
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EXPORT_SYMBOL(rtw89_btc_set_policy_v1);
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static void _set_gnt_bt(struct rtw89_dev *rtwdev, u8 phy_map, u8 state)
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{
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struct rtw89_btc *btc = &rtwdev->btc;
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struct rtw89_btc_dm *dm = &btc->dm;
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struct rtw89_mac_ax_gnt *g = dm->gnt.band;
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u8 i;
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if (phy_map > BTC_PHY_ALL)
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return;
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for (i = 0; i < RTW89_PHY_MAX; i++) {
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if (!(phy_map & BIT(i)))
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continue;
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switch (state) {
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case BTC_GNT_HW:
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g[i].gnt_bt_sw_en = 0;
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g[i].gnt_bt = 0;
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break;
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case BTC_GNT_SW_LO:
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g[i].gnt_bt_sw_en = 1;
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g[i].gnt_bt = 0;
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break;
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case BTC_GNT_SW_HI:
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g[i].gnt_bt_sw_en = 1;
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g[i].gnt_bt = 1;
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break;
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}
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}
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rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt);
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}
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static void _set_bt_plut(struct rtw89_dev *rtwdev, u8 phy_map,
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u8 tx_val, u8 rx_val)
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{
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@@ -2880,86 +2867,74 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec,
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switch (type) {
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case BTC_ANT_WPOWERON:
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rtw89_chip_cfg_ctrl_path(rtwdev, false);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_BT);
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break;
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case BTC_ANT_WINIT:
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if (bt->enable.now) {
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_LO);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI);
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} else {
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
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}
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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if (bt->enable.now)
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_set_gnt(rtwdev, phy_map, BTC_GNT_SW_LO, BTC_GNT_SW_HI);
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else
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_set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_SW_LO);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_BT, BTC_PLT_BT);
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break;
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case BTC_ANT_WONLY:
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_SW_LO);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_WOFF:
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rtw89_chip_cfg_ctrl_path(rtwdev, false);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_BT);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_W2G:
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
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if (rtwdev->dbcc_en) {
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for (i = 0; i < RTW89_PHY_MAX; i++) {
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b2g = (wl_dinfo->real_band[i] == RTW89_BAND_2G);
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gnt_wl_ctrl = b2g ? BTC_GNT_HW : BTC_GNT_SW_HI;
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_set_gnt_wl(rtwdev, BIT(i), gnt_wl_ctrl);
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gnt_bt_ctrl = b2g ? BTC_GNT_HW : BTC_GNT_SW_HI;
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/* BT should control by GNT_BT if WL_2G at S0 */
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if (i == 1 &&
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wl_dinfo->real_band[0] == RTW89_BAND_2G &&
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wl_dinfo->real_band[1] == RTW89_BAND_5G)
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gnt_bt_ctrl = BTC_GNT_HW;
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_set_gnt_bt(rtwdev, BIT(i), gnt_bt_ctrl);
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_set_gnt(rtwdev, BIT(i), gnt_wl_ctrl, gnt_bt_ctrl);
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plt_ctrl = b2g ? BTC_PLT_BT : BTC_PLT_NONE;
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_set_bt_plut(rtwdev, BIT(i),
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plt_ctrl, plt_ctrl);
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}
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} else {
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_HW);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
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_set_gnt(rtwdev, phy_map, BTC_GNT_HW, BTC_GNT_HW);
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_set_bt_plut(rtwdev, BTC_PHY_ALL,
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BTC_PLT_BT, BTC_PLT_BT);
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}
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break;
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case BTC_ANT_W5G:
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
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_set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_HW);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_W25G:
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_HW);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
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_set_gnt(rtwdev, phy_map, BTC_GNT_HW, BTC_GNT_HW);
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_set_bt_plut(rtwdev, BTC_PHY_ALL,
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BTC_PLT_GNT_WL, BTC_PLT_GNT_WL);
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break;
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case BTC_ANT_FREERUN:
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
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_set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_SW_HI);
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_set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_WRFK:
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rtw89_chip_cfg_ctrl_path(rtwdev, true);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
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_set_gnt(rtwdev, phy_map, BTC_GNT_SW_HI, BTC_GNT_SW_LO);
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_set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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case BTC_ANT_BRFK:
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rtw89_chip_cfg_ctrl_path(rtwdev, false);
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_set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_LO);
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_set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI);
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rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_BT);
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_set_gnt(rtwdev, phy_map, BTC_GNT_SW_LO, BTC_GNT_SW_HI);
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_set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE);
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break;
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default:
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@@ -4636,7 +4611,7 @@ void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode)
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_write_scbd(rtwdev,
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BTC_WSCB_ACTIVE | BTC_WSCB_ON | BTC_WSCB_BTLOG, true);
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_update_bt_scbd(rtwdev, true);
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if (rtw89_mac_get_ctrl_path(rtwdev)) {
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if (rtw89_mac_get_ctrl_path(rtwdev) && chip->chip_id == RTL8852A) {
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rtw89_debug(rtwdev, RTW89_DBG_BTC,
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"[BTC], %s(): PTA owner warning!!\n",
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__func__);
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@@ -6391,6 +6366,47 @@ static void _show_fw_dm_msg(struct rtw89_dev *rtwdev, struct seq_file *m)
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_show_fbtc_step(rtwdev, m);
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}
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static void _get_gnt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_coex_gnt *gnt_cfg)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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struct rtw89_mac_ax_gnt *gnt;
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u32 val, status;
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if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B) {
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rtw89_mac_read_lte(rtwdev, R_AX_LTE_SW_CFG_1, &val);
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rtw89_mac_read_lte(rtwdev, R_AX_GNT_VAL, &status);
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gnt = &gnt_cfg->band[0];
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gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S0_SW_CTRL);
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gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S0_STA);
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gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S0_SW_CTRL);
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gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S0_STA);
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gnt = &gnt_cfg->band[1];
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gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S1_SW_CTRL);
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gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S1_STA);
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gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S1_SW_CTRL);
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gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S1_STA);
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} else if (chip->chip_id == RTL8852C) {
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val = rtw89_read32(rtwdev, R_AX_GNT_SW_CTRL);
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status = rtw89_read32(rtwdev, R_AX_GNT_VAL_V1);
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gnt = &gnt_cfg->band[0];
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gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S0_SWCTRL);
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gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S0);
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gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S0_SWCTRL);
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gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S0);
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gnt = &gnt_cfg->band[1];
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gnt->gnt_bt_sw_en = !!(val & B_AX_GNT_BT_RFC_S1_SWCTRL);
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gnt->gnt_bt = !!(status & B_AX_GNT_BT_RFC_S1);
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gnt->gnt_wl_sw_en = !!(val & B_AX_GNT_WL_RFC_S1_SWCTRL);
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gnt->gnt_wl = !!(status & B_AX_GNT_WL_RFC_S1);
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} else {
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return;
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}
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}
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static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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@@ -6402,7 +6418,8 @@ static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m)
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struct rtw89_btc_cx *cx = &btc->cx;
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struct rtw89_btc_wl_info *wl = &btc->cx.wl;
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struct rtw89_btc_bt_info *bt = &btc->cx.bt;
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struct rtw89_mac_ax_gnt gnt[2] = {0};
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struct rtw89_mac_ax_coex_gnt gnt_cfg = {};
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struct rtw89_mac_ax_gnt gnt;
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u8 i = 0, type = 0, cnt = 0;
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u32 val, offset;
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@@ -6419,45 +6436,28 @@ static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m)
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/* To avoid I/O if WL LPS or power-off */
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if (!wl->status.map.lps && !wl->status.map.rf_off) {
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rtw89_mac_read_lte(rtwdev, R_AX_LTE_SW_CFG_1, &val);
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if (val & (B_AX_GNT_BT_RFC_S0_SW_VAL |
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B_AX_GNT_BT_BB_S0_SW_VAL))
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gnt[0].gnt_bt = true;
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if (val & (B_AX_GNT_BT_RFC_S0_SW_CTRL |
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B_AX_GNT_BT_BB_S0_SW_CTRL))
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gnt[0].gnt_bt_sw_en = true;
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if (val & (B_AX_GNT_WL_RFC_S0_SW_VAL |
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B_AX_GNT_WL_BB_S0_SW_VAL))
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gnt[0].gnt_wl = true;
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if (val & (B_AX_GNT_WL_RFC_S0_SW_CTRL |
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B_AX_GNT_WL_BB_S0_SW_CTRL))
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gnt[0].gnt_wl_sw_en = true;
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if (val & (B_AX_GNT_BT_RFC_S1_SW_VAL |
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B_AX_GNT_BT_BB_S1_SW_VAL))
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gnt[1].gnt_bt = true;
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if (val & (B_AX_GNT_BT_RFC_S1_SW_CTRL |
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B_AX_GNT_BT_BB_S1_SW_CTRL))
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gnt[1].gnt_bt_sw_en = true;
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if (val & (B_AX_GNT_WL_RFC_S1_SW_VAL |
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B_AX_GNT_WL_BB_S1_SW_VAL))
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gnt[1].gnt_wl = true;
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if (val & (B_AX_GNT_WL_RFC_S1_SW_CTRL |
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B_AX_GNT_WL_BB_S1_SW_CTRL))
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gnt[1].gnt_wl_sw_en = true;
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if (chip->chip_id == RTL8852A)
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btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev);
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else if (chip->chip_id == RTL8852C)
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btc->dm.pta_owner = 0;
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_get_gnt(rtwdev, &gnt_cfg);
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gnt = gnt_cfg.band[0];
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seq_printf(m,
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" %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ",
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"[gnt_status]",
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(rtw89_mac_get_ctrl_path(rtwdev) ? "WL" : "BT"),
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(gnt[0].gnt_wl_sw_en ? "SW" : "HW"), gnt[0].gnt_wl,
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(gnt[0].gnt_bt_sw_en ? "SW" : "HW"), gnt[0].gnt_bt);
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chip->chip_id == RTL8852C ? "HW" :
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btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT",
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gnt.gnt_wl_sw_en ? "SW" : "HW", gnt.gnt_wl,
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gnt.gnt_bt_sw_en ? "SW" : "HW", gnt.gnt_bt);
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gnt = gnt_cfg.band[1];
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seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n",
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(gnt[1].gnt_wl_sw_en ? "SW" : "HW"), gnt[1].gnt_wl,
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(gnt[1].gnt_bt_sw_en ? "SW" : "HW"), gnt[1].gnt_bt);
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gnt.gnt_wl_sw_en ? "SW" : "HW",
|
||||
gnt.gnt_wl,
|
||||
gnt.gnt_bt_sw_en ? "SW" : "HW",
|
||||
gnt.gnt_bt);
|
||||
}
|
||||
|
||||
pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo;
|
||||
if (!pcinfo->valid) {
|
||||
rtw89_debug(rtwdev, RTW89_DBG_BTC,
|
||||
|
||||
@@ -1798,8 +1798,9 @@ struct rtw89_btc_dm {
|
||||
u32 wl_btg_rx: 1;
|
||||
u32 trx_para_level: 8;
|
||||
u32 wl_stb_chg: 1;
|
||||
u32 pta_owner: 1;
|
||||
u32 tdma_instant_excute: 1;
|
||||
u32 rsvd: 2;
|
||||
u32 rsvd: 1;
|
||||
|
||||
u16 slot_dur[CXST_MAX];
|
||||
|
||||
|
||||
@@ -3156,6 +3156,18 @@
|
||||
#define B_AX_GNT_WL_BB_VAL BIT(1)
|
||||
#define B_AX_GNT_WL_BB_SWCTRL BIT(0)
|
||||
|
||||
#define R_AX_GNT_VAL 0x0054
|
||||
#define B_AX_GNT_BT_RFC_S1_STA BIT(5)
|
||||
#define B_AX_GNT_WL_RFC_S1_STA BIT(4)
|
||||
#define B_AX_GNT_BT_RFC_S0_STA BIT(3)
|
||||
#define B_AX_GNT_WL_RFC_S0_STA BIT(2)
|
||||
|
||||
#define R_AX_GNT_VAL_V1 0xDA4C
|
||||
#define B_AX_GNT_BT_RFC_S1 BIT(4)
|
||||
#define B_AX_GNT_BT_RFC_S0 BIT(3)
|
||||
#define B_AX_GNT_WL_RFC_S1 BIT(2)
|
||||
#define B_AX_GNT_WL_RFC_S0 BIT(1)
|
||||
|
||||
#define R_AX_TDMA_MODE 0xDA4C
|
||||
#define R_AX_TDMA_MODE_C1 0xFA4C
|
||||
#define B_AX_R_BT_CMD_RPT_MASK GENMASK(31, 16)
|
||||
|
||||
Reference in New Issue
Block a user