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arm64: dts: renesas: falcon: Move AVB0 to main DTS

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The Ethernet PHY for the first AVB instance is located on the Falcon
BreakOut board.  Hence move its description from the DTS file that
describes the CPU board to the main Falcon DTS file.

Fixes: e8ac55a5e7 ("arm64: dts: renesas: falcon: Add Ethernet-AVB0 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210316154705.2433528-4-geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven
2021-03-16 16:47:05 +01:00
parent 0fc129ba37
commit 431c8ae451
2 changed files with 37 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
View File

@@ -60,22 +60,6 @@ reg_3p3v: regulator-3p3v {
};
};
&avb0 {
pinctrl-0 = <&avb0_pins>;
pinctrl-names = "default";
phy-handle = <&phy0>;
tx-internal-delay-ps = <2000>;
status = "okay";
phy0: ethernet-phy@0 {
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio4>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
};
};
&extal_clk {
clock-frequency = <16666666>;
};
@@ -136,24 +120,6 @@ &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
avb0_pins: avb0 {
mux {
groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
function = "avb0";
};
pins_mdio {
groups = "avb0_mdio";
drive-strength = <21>;
};
pins_mii {
groups = "avb0_rgmii";
drive-strength = <21>;
};
};
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";

37
arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
View File

@@ -19,6 +19,22 @@ aliases {
};
};
&avb0 {
pinctrl-0 = <&avb0_pins>;
pinctrl-names = "default";
phy-handle = <&phy0>;
tx-internal-delay-ps = <2000>;
status = "okay";
phy0: ethernet-phy@0 {
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio4>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
};
};
&i2c0 {
eeprom@51 {
compatible = "rohm,br24g01", "atmel,24c01";
@@ -27,3 +43,24 @@ eeprom@51 {
pagesize = <8>;
};
};
&pfc {
avb0_pins: avb0 {
mux {
groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
"avb0_txcrefclk";
function = "avb0";
};
pins_mdio {
groups = "avb0_mdio";
drive-strength = <21>;
};
pins_mii {
groups = "avb0_rgmii";
drive-strength = <21>;
};
};
};