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arm64: dts: qcom: sm8250: Fix the base addresses of LLCC banks

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The LLCC block has several banks each with a different base address
and holes in between. So it is not a correct approach to cover these
banks with a single offset/size. Instead, the individual bank's base
address needs to be specified in devicetree with the exact size.

Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230314080443.64635-9-manivannan.sadhasivam@linaro.org
This commit is contained in:
Manivannan Sadhasivam
2023-03-14 13:34:37 +05:30
committed by Bjorn Andersson
parent c5ccf8d33f
commit 42c9b15782
1 changed files with 5 additions and 2 deletions
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7
arch/arm64/boot/dts/qcom/sm8250.dtsi
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@@ -3568,8 +3568,11 @@ usb_1_dwc3: usb@a600000 {
system-cache-controller@9200000 {
compatible = "qcom,sm8250-llcc";
reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>;
reg-names = "llcc_base", "llcc_broadcast_base";
reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>,
<0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>,
<0 0x09600000 0 0x50000>;
reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
"llcc3_base", "llcc_broadcast_base";
};
usb_2: usb@a8f8800 {