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drm/i915/display: Disable FBC when PSR2 is enabled display 12 and newer

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This is now a requirement for all display 12 and newer, not only for
tigerlake.

BSpec: 50422
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210625235600.765677-2-jose.souza@intel.com
This commit is contained in:
José Roberto de Souza
2021-06-25 16:56:00 -07:00
parent 36203e4fb4
commit 425057e725
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/display/intel_fbc.c
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@@ -912,11 +912,11 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
}
/*
* Tigerlake is not supporting FBC with PSR2.
* Display 12+ is not supporting FBC with PSR2.
* Recommendation is to keep this combination disabled
* Bspec: 50422 HSD: 14010260002
*/
if (fbc->state_cache.psr2_active && IS_TIGERLAKE(dev_priv)) {
if (fbc->state_cache.psr2_active && DISPLAY_VER(dev_priv) >= 12) {
fbc->no_fbc_reason = "not supported with PSR2";
return false;
}