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Staging: qlge: Rewrite two while loops as simple for loops
This is a task from the TODO list of qlge driver: - some "while" loops could be rewritten with simple "for" The change is in functions ql_wait_reg_rdy and ql_wait_cfg in qlge_main.c. The while loops are basically count based (they decrement on each iteration), and it makes more sense to be a for loop construction instead. Signed-off-by: Samuil Ivanov <samuil.ivanovbg@gmail.com> Link: https://lore.kernel.org/r/20191023205855.GA1841@samuil-ThinkCentre-M92P Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
f29acb9c5d
commit
41e1bf811a
@@ -167,9 +167,9 @@ void ql_sem_unlock(struct ql_adapter *qdev, u32 sem_mask)
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int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit)
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{
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u32 temp;
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int count = UDELAY_COUNT;
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int count;
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while (count) {
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for (count = 0; count < UDELAY_COUNT; count++) {
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temp = ql_read32(qdev, reg);
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/* check for errors */
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@@ -181,7 +181,6 @@ int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit)
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} else if (temp & bit)
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return 0;
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udelay(UDELAY_DELAY);
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count--;
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}
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netif_alert(qdev, probe, qdev->ndev,
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"Timed out waiting for reg %x to come ready.\n", reg);
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@@ -193,17 +192,16 @@ int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit)
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*/
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static int ql_wait_cfg(struct ql_adapter *qdev, u32 bit)
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{
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int count = UDELAY_COUNT;
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int count;
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u32 temp;
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while (count) {
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for (count = 0; count < UDELAY_COUNT; count++) {
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temp = ql_read32(qdev, CFG);
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if (temp & CFG_LE)
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return -EIO;
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if (!(temp & bit))
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return 0;
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udelay(UDELAY_DELAY);
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count--;
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}
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return -ETIMEDOUT;
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}
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