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drm/i915/display: Implement Wa_14013723622

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This WA fix some display glitches when the system is under high
memory pressure.

BSpec: 52890
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210408204917.254272-1-jose.souza@intel.com
This commit is contained in:
José Roberto de Souza
2021-04-08 13:49:16 -07:00
parent c87eba8047
commit 41c70d2b71
2 changed files with 8 additions and 0 deletions
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3
drivers/gpu/drm/i915/i915_reg.h
View File

@@ -12549,4 +12549,7 @@ enum skl_power_gate {
#define TGL_ROOT_DEVICE_SKU_ULX 0x2
#define TGL_ROOT_DEVICE_SKU_ULT 0x4
#define CLKREQ_POLICY _MMIO(0x101038)
#define CLKREQ_POLICY_MEM_UP_OVRD REG_BIT(1)
#endif /* _I915_REG_H_ */

5
drivers/gpu/drm/i915/intel_pm.c
View File

@@ -7141,6 +7141,11 @@ static void gen12lp_init_clock_gating(struct drm_i915_private *dev_priv)
/* Wa_14011059788:tgl,rkl,adl_s,dg1 */
intel_uncore_rmw(&dev_priv->uncore, GEN10_DFR_RATIO_EN_AND_CHICKEN,
0, DFR_DISABLE);
/* Wa_14013723622:tgl,rkl,dg1,adl-s */
if (DISPLAY_VER(dev_priv) == 12)
intel_uncore_rmw(&dev_priv->uncore, CLKREQ_POLICY,
CLKREQ_POLICY_MEM_UP_OVRD, 0);
}
static void dg1_init_clock_gating(struct drm_i915_private *dev_priv)