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arm64: dts: qcom: msm8976: Add IOMMU nodes

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Add the nodes describing the apps and gpu iommu and its context banks
that are found on msm8976 SoCs.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Link: https://lore.kernel.org/r/20240508163455.8757-2-a39.skl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Adam Skladowski
2024-05-08 18:34:34 +02:00
committed by Bjorn Andersson
parent f44da5d872
commit 418c2ffd7d
1 changed files with 81 additions and 0 deletions
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81
arch/arm64/boot/dts/qcom/msm8976.dtsi
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@@ -808,6 +808,87 @@ tcsr: syscon@1937000 {
reg = <0x01937000 0x30000>;
};
apps_iommu: iommu@1ee0000 {
compatible = "qcom,msm8976-iommu", "qcom,msm-iommu-v2";
reg = <0x01ee0000 0x3000>;
ranges = <0 0x01e20000 0x20000>;
clocks = <&gcc GCC_SMMU_CFG_CLK>,
<&gcc GCC_APSS_TCU_CLK>;
clock-names = "iface", "bus";
qcom,iommu-secure-id = <17>;
#address-cells = <1>;
#size-cells = <1>;
#iommu-cells = <1>;
/* VFE */
iommu-ctx@15000 {
compatible = "qcom,msm-iommu-v2-ns";
reg = <0x15000 0x1000>;
qcom,ctx-asid = <20>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
};
/* VENUS NS */
iommu-ctx@16000 {
compatible = "qcom,msm-iommu-v2-ns";
reg = <0x16000 0x1000>;
qcom,ctx-asid = <21>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
};
/* MDP0 */
iommu-ctx@17000 {
compatible = "qcom,msm-iommu-v2-ns";
reg = <0x17000 0x1000>;
qcom,ctx-asid = <22>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
};
};
gpu_iommu: iommu@1f08000 {
compatible = "qcom,msm8976-iommu", "qcom,msm-iommu-v2";
ranges = <0 0x01f08000 0x8000>;
clocks = <&gcc GCC_SMMU_CFG_CLK>,
<&gcc GCC_GFX3D_TCU_CLK>;
clock-names = "iface", "bus";
power-domains = <&gcc OXILI_CX_GDSC>;
qcom,iommu-secure-id = <18>;
#address-cells = <1>;
#size-cells = <1>;
#iommu-cells = <1>;
/* gfx3d user */
iommu-ctx@0 {
compatible = "qcom,msm-iommu-v2-ns";
reg = <0x0 0x1000>;
qcom,ctx-asid = <0>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
};
/* gfx3d secure */
iommu-ctx@1000 {
compatible = "qcom,msm-iommu-v2-sec";
reg = <0x1000 0x1000>;
qcom,ctx-asid = <2>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
};
/* gfx3d priv */
iommu-ctx@2000 {
compatible = "qcom,msm-iommu-v2-sec";
reg = <0x2000 0x1000>;
qcom,ctx-asid = <1>;
interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
};
};
spmi_bus: spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0200f000 0x1000>,