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ARM: dts: berlin: convert BG2Q to DT clock nodes

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This converts Berlin BG2Q SoC dtsi to make use of the new DT clock
nodes for Berlin SoCs.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This commit is contained in:
Alexandre Belloni
2014-05-12 22:07:35 +02:00
committed by Sebastian Hesselbarth
parent 36601dbf69
commit 414dcf8f30
1 changed files with 19 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

54
arch/arm/boot/dts/berlin2q.dtsi
View File

@@ -6,6 +6,7 @@
* warranty of any kind, whether express or implied.
*/
#include <dt-bindings/clock/berlin2q.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
@@ -47,32 +48,12 @@ cpu@3 {
};
};
smclk: sysmgr-clock {
refclk: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
cfgclk: config-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
cpuclk: cpu-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1200000000>;
};
twdclk: twdclk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clocks = <&cpuclk>;
clock-mult = <1>;
clock-div = <3>;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -95,7 +76,7 @@ scu: snoop-control-unit@ad0000 {
local-timer@ad0600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xad0600 0x20>;
clocks = <&twdclk>;
clocks = <&chip CLKID_TWD>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
};
@@ -189,7 +170,7 @@ portd: gpio-port@3 {
timer0: timer@2c00 {
compatible = "snps,dw-apb-timer";
reg = <0x2c00 0x14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
interrupts = <8>;
};
@@ -197,7 +178,7 @@ timer0: timer@2c00 {
timer1: timer@2c14 {
compatible = "snps,dw-apb-timer";
reg = <0x2c14 0x14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -205,7 +186,7 @@ timer1: timer@2c14 {
timer2: timer@2c28 {
compatible = "snps,dw-apb-timer";
reg = <0x2c28 0x14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -213,7 +194,7 @@ timer2: timer@2c28 {
timer3: timer@2c3c {
compatible = "snps,dw-apb-timer";
reg = <0x2c3c 0x14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -221,7 +202,7 @@ timer3: timer@2c3c {
timer4: timer@2c50 {
compatible = "snps,dw-apb-timer";
reg = <0x2c50 0x14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -229,7 +210,7 @@ timer4: timer@2c50 {
timer5: timer@2c64 {
compatible = "snps,dw-apb-timer";
reg = <0x2c64 0x14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -237,7 +218,7 @@ timer5: timer@2c64 {
timer6: timer@2c78 {
compatible = "snps,dw-apb-timer";
reg = <0x2c78 0x14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -245,7 +226,7 @@ timer6: timer@2c78 {
timer7: timer@2c8c {
compatible = "snps,dw-apb-timer";
reg = <0x2c8c 0x14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@@ -290,9 +271,12 @@ portf: gpio-port@5 {
};
};
generic-regs@ea0110 {
compatible = "marvell,berlin-generic-regs", "syscon";
reg = <0xea0110 0x10>;
chip: chip-control@ea0000 {
compatible = "marvell,berlin2q-chip-ctrl";
#clock-cells = <1>;
reg = <0xea0000 0x400>, <0xdd0170 0x10>;
clocks = <&refclk>;
clock-names = "refclk";
};
apb@fc0000 {
@@ -308,7 +292,7 @@ uart0: uart@9000 {
reg = <0x9000 0x100>;
interrupt-parent = <&sic>;
interrupts = <8>;
clocks = <&smclk>;
clocks = <&refclk>;
reg-shift = <2>;
status = "disabled";
};
@@ -318,7 +302,7 @@ uart1: uart@a000 {
reg = <0xa000 0x100>;
interrupt-parent = <&sic>;
interrupts = <9>;
clocks = <&smclk>;
clocks = <&refclk>;
reg-shift = <2>;
status = "disabled";
};