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ASoC: Intel: avs: Adjust DSP status register names
Both status and error are "codes". Update the wording to make code cohesive. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://patch.msgid.link/20250109122216.3667847-12-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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committed by
Mark Brown
parent
aea305d285
commit
3eede0fc99
@@ -168,7 +168,7 @@ int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw)
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AVS_ROM_INIT_POLLING_US, SKL_ROM_INIT_TIMEOUT_US);
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if (ret < 0) {
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dev_err(adev->dev, "rom init failed: %d, status: 0x%08x, lec: 0x%08x\n",
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ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
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ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
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avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
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return ret;
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}
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@@ -182,7 +182,7 @@ int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw)
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hda_cldma_stop(cl);
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if (ret < 0) {
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dev_err(adev->dev, "transfer fw failed: %d, status: 0x%08x, lec: 0x%08x\n",
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ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
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ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
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avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
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return ret;
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}
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@@ -316,7 +316,7 @@ avs_hda_init_rom(struct avs_dev *adev, unsigned int dma_id, bool purge)
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AVS_ROM_INIT_POLLING_US, APL_ROM_INIT_TIMEOUT_US);
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if (ret < 0) {
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dev_err(adev->dev, "rom init failed: %d, status: 0x%08x, lec: 0x%08x\n",
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ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
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ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
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goto err;
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}
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@@ -348,7 +348,7 @@ static int avs_imr_load_basefw(struct avs_dev *adev)
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if (!ret) {
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dev_err(adev->dev, "firmware ready timeout, status: 0x%08x, lec: 0x%08x\n",
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snd_hdac_adsp_readl(adev, AVS_FW_REG_STATUS(adev)),
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snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
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snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
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avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
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return -ETIMEDOUT;
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}
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@@ -408,7 +408,7 @@ int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw)
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snd_hdac_dsp_trigger(hstream, false);
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if (ret < 0) {
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dev_err(adev->dev, "transfer fw failed: %d, status: 0x%08x, lec: 0x%08x\n",
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ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
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ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
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avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
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}
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@@ -590,7 +590,7 @@ static int avs_dsp_load_basefw(struct avs_dev *adev)
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if (!ret) {
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dev_err(adev->dev, "firmware ready timeout, status: 0x%08x, lec: 0x%08x\n",
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snd_hdac_adsp_readl(adev, AVS_FW_REG_STATUS(adev)),
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snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
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snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
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avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
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ret = -ETIMEDOUT;
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goto release_fw;
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@@ -74,7 +74,7 @@
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/* Constants used when accessing SRAM, space shared with firmware */
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#define AVS_FW_REG_BASE(adev) ((adev)->spec->sram->base_offset)
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#define AVS_FW_REG_STATUS(adev) (AVS_FW_REG_BASE(adev) + 0x0)
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#define AVS_FW_REG_ERROR_CODE(adev) (AVS_FW_REG_BASE(adev) + 0x4)
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#define AVS_FW_REG_ERROR(adev) (AVS_FW_REG_BASE(adev) + 0x4)
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#define AVS_WINDOW_CHUNK_SIZE SZ_4K
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#define AVS_FW_REGS_SIZE AVS_WINDOW_CHUNK_SIZE
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