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drm/amd/display: update max streams per surface

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Increse to 6 as that is the max surfaces supported asics can have.
The is no practical use case yet, but this is valuable for pre-si
validation.

Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin
2023-03-27 15:33:54 -04:00
committed by Alex Deucher
parent c0162a05bd
commit 3cfd03b794
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/amd/display/dc/dc_types.h
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@@ -83,7 +83,7 @@ struct dc_perf_trace {
unsigned long last_entry_write;
};
#define MAX_SURFACE_NUM 4
#define MAX_SURFACE_NUM 6
#define NUM_PIXEL_FORMATS 10
enum tiling_mode {