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drm/msm/dp: move/inline AUX register functions

Browse Source 
Move all register-level functions to dp_aux.c, inlining one line
wrappers during this process.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Stephen Boyd <swboyd@chromium.org> # sc7180-trogdor
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/654322/
Link: https://lore.kernel.org/r/20250518-fd-dp-audio-fixup-v6-5-2f0ec3ec000d@oss.qualcomm.com
This commit is contained in:
Dmitry Baryshkov
2025-05-18 14:21:38 +03:00
committed by Dmitry Baryshkov
parent d803592e11
commit 39b9a68bf4
3 changed files with 82 additions and 119 deletions
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96
drivers/gpu/drm/msm/dp/dp_aux.c
View File

@@ -4,6 +4,7 @@
*/
#include <linux/delay.h>
#include <linux/iopoll.h>
#include <linux/phy/phy.h>
#include <drm/drm_print.h>
@@ -45,6 +46,71 @@ struct msm_dp_aux_private {
struct drm_dp_aux msm_dp_aux;
};
static void msm_dp_aux_clear_hw_interrupts(struct msm_dp_aux_private *aux)
{
struct msm_dp_catalog *msm_dp_catalog = aux->catalog;
msm_dp_read_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_STATUS);
msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f);
msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f);
msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0);
}
/*
* NOTE: resetting AUX controller will also clear any pending HPD related interrupts
*/
static void msm_dp_aux_reset(struct msm_dp_aux_private *aux)
{
struct msm_dp_catalog *msm_dp_catalog = aux->catalog;
u32 aux_ctrl;
aux_ctrl = msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL);
aux_ctrl |= DP_AUX_CTRL_RESET;
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl);
usleep_range(1000, 1100); /* h/w recommended delay */
aux_ctrl &= ~DP_AUX_CTRL_RESET;
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl);
}
static void msm_dp_aux_enable(struct msm_dp_aux_private *aux)
{
struct msm_dp_catalog *msm_dp_catalog = aux->catalog;
u32 aux_ctrl;
aux_ctrl = msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL);
msm_dp_write_aux(msm_dp_catalog, REG_DP_TIMEOUT_COUNT, 0xffff);
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_LIMITS, 0xffff);
aux_ctrl |= DP_AUX_CTRL_ENABLE;
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl);
}
static void msm_dp_aux_disable(struct msm_dp_aux_private *aux)
{
struct msm_dp_catalog *msm_dp_catalog = aux->catalog;
u32 aux_ctrl;
aux_ctrl = msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL);
aux_ctrl &= ~DP_AUX_CTRL_ENABLE;
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl);
}
static int msm_dp_aux_wait_for_hpd_connect_state(struct msm_dp_aux_private *aux,
unsigned long wait_us)
{
struct msm_dp_catalog *msm_dp_catalog = aux->catalog;
u32 state;
/* poll for hpd connected status every 2ms and timeout after wait_us */
return readl_poll_timeout(msm_dp_catalog->aux_base +
REG_DP_DP_HPD_INT_STATUS,
state, state & DP_DP_HPD_STATE_STATUS_CONNECTED,
min(wait_us, 2000), wait_us);
}
#define MAX_AUX_RETRIES 5
static ssize_t msm_dp_aux_write(struct msm_dp_aux_private *aux,
@@ -88,11 +154,11 @@ static ssize_t msm_dp_aux_write(struct msm_dp_aux_private *aux,
/* index = 0, write */
if (i == 0)
reg |= DP_AUX_DATA_INDEX_WRITE;
msm_dp_catalog_aux_write_data(aux->catalog, reg);
msm_dp_write_aux(aux->catalog, REG_DP_AUX_DATA, reg);
}
msm_dp_catalog_aux_clear_trans(aux->catalog, false);
msm_dp_catalog_aux_clear_hw_interrupts(aux->catalog);
msm_dp_write_aux(aux->catalog, REG_DP_AUX_TRANS_CTRL, 0);
msm_dp_aux_clear_hw_interrupts(aux);
reg = 0; /* Transaction number == 1 */
if (!aux->native) { /* i2c */
@@ -106,7 +172,7 @@ static ssize_t msm_dp_aux_write(struct msm_dp_aux_private *aux,
}
reg |= DP_AUX_TRANS_CTRL_GO;
msm_dp_catalog_aux_write_trans(aux->catalog, reg);
msm_dp_write_aux(aux->catalog, REG_DP_AUX_TRANS_CTRL, reg);
return len;
}
@@ -139,20 +205,22 @@ static ssize_t msm_dp_aux_cmd_fifo_rx(struct msm_dp_aux_private *aux,
u32 i, actual_i;
u32 len = msg->size;
msm_dp_catalog_aux_clear_trans(aux->catalog, true);
data = msm_dp_read_aux(aux->catalog, REG_DP_AUX_TRANS_CTRL);
data &= ~DP_AUX_TRANS_CTRL_GO;
msm_dp_write_aux(aux->catalog, REG_DP_AUX_TRANS_CTRL, data);
data = DP_AUX_DATA_INDEX_WRITE; /* INDEX_WRITE */
data |= DP_AUX_DATA_READ; /* read */
msm_dp_catalog_aux_write_data(aux->catalog, data);
msm_dp_write_aux(aux->catalog, REG_DP_AUX_DATA, data);
dp = msg->buffer;
/* discard first byte */
data = msm_dp_catalog_aux_read_data(aux->catalog);
data = msm_dp_read_aux(aux->catalog, REG_DP_AUX_DATA);
for (i = 0; i < len; i++) {
data = msm_dp_catalog_aux_read_data(aux->catalog);
data = msm_dp_read_aux(aux->catalog, REG_DP_AUX_DATA);
*dp++ = (u8)((data >> DP_AUX_DATA_OFFSET) & 0xff);
actual_i = (data >> DP_AUX_DATA_INDEX_OFFSET) & 0xFF;
@@ -336,7 +404,7 @@ static ssize_t msm_dp_aux_transfer(struct drm_dp_aux *msm_dp_aux,
}
/* reset aux if link is in connected state */
if (msm_dp_catalog_link_is_connected(aux->catalog))
msm_dp_catalog_aux_reset(aux->catalog);
msm_dp_aux_reset(aux);
} else {
aux->retry_cnt = 0;
switch (aux->aux_error_num) {
@@ -403,7 +471,7 @@ irqreturn_t msm_dp_aux_isr(struct drm_dp_aux *msm_dp_aux)
if (isr & DP_INTR_AUX_ERROR) {
aux->aux_error_num = DP_AUX_ERR_PHY;
msm_dp_catalog_aux_clear_hw_interrupts(aux->catalog);
msm_dp_aux_clear_hw_interrupts(aux);
} else if (isr & DP_INTR_NACK_DEFER) {
aux->aux_error_num = DP_AUX_ERR_NACK_DEFER;
} else if (isr & DP_INTR_WRONG_ADDR) {
@@ -444,7 +512,7 @@ void msm_dp_aux_reconfig(struct drm_dp_aux *msm_dp_aux)
aux = container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux);
phy_calibrate(aux->phy);
msm_dp_catalog_aux_reset(aux->catalog);
msm_dp_aux_reset(aux);
}
void msm_dp_aux_init(struct drm_dp_aux *msm_dp_aux)
@@ -460,7 +528,7 @@ void msm_dp_aux_init(struct drm_dp_aux *msm_dp_aux)
mutex_lock(&aux->mutex);
msm_dp_catalog_aux_enable(aux->catalog, true);
msm_dp_aux_enable(aux);
aux->retry_cnt = 0;
aux->initted = true;
@@ -476,7 +544,7 @@ void msm_dp_aux_deinit(struct drm_dp_aux *msm_dp_aux)
mutex_lock(&aux->mutex);
aux->initted = false;
msm_dp_catalog_aux_enable(aux->catalog, false);
msm_dp_aux_disable(aux);
mutex_unlock(&aux->mutex);
}
@@ -517,7 +585,7 @@ static int msm_dp_wait_hpd_asserted(struct drm_dp_aux *msm_dp_aux,
if (ret)
return ret;
ret = msm_dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog, wait_us);
ret = msm_dp_aux_wait_for_hpd_connect_state(aux, wait_us);
pm_runtime_put_sync(aux->dev);
return ret;

96
drivers/gpu/drm/msm/dp/dp_catalog.c
View File

@@ -81,102 +81,6 @@ void msm_dp_catalog_snapshot(struct msm_dp_catalog *msm_dp_catalog, struct msm_d
msm_dp_catalog->p0_len, msm_dp_catalog->p0_base, "dp_p0");
}
/* aux related catalog functions */
u32 msm_dp_catalog_aux_read_data(struct msm_dp_catalog *msm_dp_catalog)
{
return msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_DATA);
}
int msm_dp_catalog_aux_write_data(struct msm_dp_catalog *msm_dp_catalog, u32 data)
{
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_DATA, data);
return 0;
}
int msm_dp_catalog_aux_write_trans(struct msm_dp_catalog *msm_dp_catalog, u32 data)
{
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_TRANS_CTRL, data);
return 0;
}
int msm_dp_catalog_aux_clear_trans(struct msm_dp_catalog *msm_dp_catalog, bool read)
{
u32 data;
if (read) {
data = msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_TRANS_CTRL);
data &= ~DP_AUX_TRANS_CTRL_GO;
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_TRANS_CTRL, data);
} else {
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_TRANS_CTRL, 0);
}
return 0;
}
int msm_dp_catalog_aux_clear_hw_interrupts(struct msm_dp_catalog *msm_dp_catalog)
{
msm_dp_read_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_STATUS);
msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f);
msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f);
msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0);
return 0;
}
/**
* msm_dp_catalog_aux_reset() - reset AUX controller
*
* @msm_dp_catalog: DP catalog structure
*
* return: void
*
* This function reset AUX controller
*
* NOTE: reset AUX controller will also clear any pending HPD related interrupts
*
*/
void msm_dp_catalog_aux_reset(struct msm_dp_catalog *msm_dp_catalog)
{
u32 aux_ctrl;
aux_ctrl = msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL);
aux_ctrl |= DP_AUX_CTRL_RESET;
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl);
usleep_range(1000, 1100); /* h/w recommended delay */
aux_ctrl &= ~DP_AUX_CTRL_RESET;
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl);
}
void msm_dp_catalog_aux_enable(struct msm_dp_catalog *msm_dp_catalog, bool enable)
{
u32 aux_ctrl;
aux_ctrl = msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL);
if (enable) {
msm_dp_write_aux(msm_dp_catalog, REG_DP_TIMEOUT_COUNT, 0xffff);
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_LIMITS, 0xffff);
aux_ctrl |= DP_AUX_CTRL_ENABLE;
} else {
aux_ctrl &= ~DP_AUX_CTRL_ENABLE;
}
msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl);
}
int msm_dp_catalog_aux_wait_for_hpd_connect_state(struct msm_dp_catalog *msm_dp_catalog,
unsigned long wait_us)
{
u32 state;
/* poll for hpd connected status every 2ms and timeout after wait_us */
return readl_poll_timeout(msm_dp_catalog->aux_base +
REG_DP_DP_HPD_INT_STATUS,
state, state & DP_DP_HPD_STATE_STATUS_CONNECTED,
min(wait_us, 2000), wait_us);
}
u32 msm_dp_catalog_aux_get_irq(struct msm_dp_catalog *msm_dp_catalog)
{
u32 intr, intr_ack;

9
drivers/gpu/drm/msm/dp/dp_catalog.h
View File

@@ -114,15 +114,6 @@ static inline void msm_dp_write_link(struct msm_dp_catalog *msm_dp_catalog,
void msm_dp_catalog_snapshot(struct msm_dp_catalog *msm_dp_catalog, struct msm_disp_state *disp_state);
/* AUX APIs */
u32 msm_dp_catalog_aux_read_data(struct msm_dp_catalog *msm_dp_catalog);
int msm_dp_catalog_aux_write_data(struct msm_dp_catalog *msm_dp_catalog, u32 data);
int msm_dp_catalog_aux_write_trans(struct msm_dp_catalog *msm_dp_catalog, u32 data);
int msm_dp_catalog_aux_clear_trans(struct msm_dp_catalog *msm_dp_catalog, bool read);
int msm_dp_catalog_aux_clear_hw_interrupts(struct msm_dp_catalog *msm_dp_catalog);
void msm_dp_catalog_aux_reset(struct msm_dp_catalog *msm_dp_catalog);
void msm_dp_catalog_aux_enable(struct msm_dp_catalog *msm_dp_catalog, bool enable);
int msm_dp_catalog_aux_wait_for_hpd_connect_state(struct msm_dp_catalog *msm_dp_catalog,
unsigned long wait_us);
u32 msm_dp_catalog_aux_get_irq(struct msm_dp_catalog *msm_dp_catalog);
/* DP Controller APIs */