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arm64: dts: rockchip: add WLAN to rk3588-evb1 controller

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The RK3588 EVB1 has an onboard AP6275P WLAN/BT module. This adds
support for the WLAN side, which is connected to the second
PCIe bus. The Bluetooth side is connected to UART and handled
separately.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20241210162452.116767-1-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Sebastian Reichel
2024-12-10 17:24:04 +01:00
committed by Heiko Stuebner
parent 9d241b0680
commit 3948b4a9bb
1 changed files with 82 additions and 0 deletions
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82
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
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@@ -206,6 +206,28 @@ vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
pinctrl-0 = <&vcc3v3_pcie30_en>;
};
vcc3v3_pciewl_vbat: regulator-vcc3v3-pciewl-vbat {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "wlan-vbat";
vin-supply = <&vcc_3v3_s0>;
};
vcc3v3_wlan: regulator-vcc3v3-wlan {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&wifi_pwren>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "wlan-en";
vin-supply = <&vcc3v3_pciewl_vbat>;
};
vcc5v0_host: regulator-vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
@@ -249,12 +271,26 @@ vcc5v0_usb: regulator-vcc5v0-usb {
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_usbdcin>;
};
vccio_wl: regulator-vccio-wl {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "wlan-vddio";
vin-supply = <&vcc_1v8_s0>;
};
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
@@ -440,6 +476,30 @@ rgmii_phy: ethernet-phy@1 {
};
};
&pcie2x1l0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie2_0_rst>, <&pcie2_0_wake>, <&pcie2_0_clkreq>, <&wifi_host_wake_irq>;
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_wlan>;
status = "okay";
pcie@0,0 {
reg = <0x200000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
device_type = "pci";
bus-range = <0x20 0x2f>;
wifi: wifi@0,0 {
compatible = "pci14e4,449d";
reg = <0x210000 0 0 0 0>;
clocks = <&hym8563>;
clock-names = "lpo";
};
};
};
&pcie2x1l1 {
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@@ -494,6 +554,18 @@ hym8563_int: hym8563-int {
};
pcie2 {
pcie2_0_rst: pcie2-0-rst {
rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie2_0_wake: pcie2-0-wake {
rockchip,pins = <4 RK_PA4 4 &pcfg_pull_none>;
};
pcie2_0_clkreq: pcie2-0-clkreq {
rockchip,pins = <4 RK_PA3 4 &pcfg_pull_none>;
};
pcie2_1_rst: pcie2-1-rst {
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -524,6 +596,16 @@ usbc0_int: usbc0-int {
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
wifi_pwren: wifi-pwren {
rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&pwm2 {