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drm/i915/mtl: Update PLL c20 phy value for DP uhbr20

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Update mtl c20 phy DP table for uhbr20 values according to the revised
specifications.

Bspec: 74165
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240827141356.3024760-1-dnyaneshwar.bhadane@intel.com
This commit is contained in:
Dnyaneshwar Bhadane
2024-08-27 19:43:56 +05:30
committed by Matt Roper
parent 87aaea1234
commit 388629a219
1 changed files with 4 additions and 4 deletions
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8
drivers/gpu/drm/i915/display/intel_cx0_phy.c
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@@ -923,10 +923,10 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr20 = {
},
.mplla = { 0x3104, /* mplla cfg0 */
0xd105, /* mplla cfg1 */
0xc025, /* mplla cfg2 */
0xc025, /* mplla cfg3 */
0xa6ab, /* mplla cfg4 */
0x8c00, /* mplla cfg5 */
0x9217, /* mplla cfg2 */
0x9217, /* mplla cfg3 */
0x8c00, /* mplla cfg4 */
0x759a, /* mplla cfg5 */
0x4000, /* mplla cfg6 */
0x0003, /* mplla cfg7 */
0x3555, /* mplla cfg8 */