staging: comedi: ni_stc.h: tidy up AO_Command_2_Register and bits

Rename the CamelCase. Use the BIT() macro to define the bits.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
2015-05-01 14:58:57 -07:00
committed by Greg Kroah-Hartman
parent a1da35a5c5
commit 382b3c4f9a
2 changed files with 24 additions and 24 deletions

View File

@@ -317,7 +317,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
[NISTC_INTA_ACK_REG] = { 0x104, 2 },
[NISTC_INTB_ACK_REG] = { 0x106, 2 },
[NISTC_AI_CMD2_REG] = { 0x108, 2 },
[AO_Command_2_Register] = { 0x10a, 2 },
[NISTC_AO_CMD2_REG] = { 0x10a, 2 },
[G_Command_Register(0)] = { 0x10c, 2 },
[G_Command_Register(1)] = { 0x10e, 2 },
[AI_Command_1_Register] = { 0x110, 2 },
@@ -2909,8 +2909,8 @@ static int ni_ao_inttrig(struct comedi_device *dev,
AO_DAC1_Update_Mode | AO_DAC0_Update_Mode,
AO_Command_1_Register);
ni_stc_writew(dev, devpriv->ao_cmd2 | AO_START1_Pulse,
AO_Command_2_Register);
ni_stc_writew(dev, NISTC_AO_CMD2_START1_PULSE | devpriv->ao_cmd2,
NISTC_AO_CMD2_REG);
return 0;
}
@@ -3024,7 +3024,7 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
AO_UPDATE_Source_Select(0x1f) | AO_UPDATE_Source_Polarity);
switch (cmd->scan_begin_src) {
case TRIG_TIMER:
devpriv->ao_cmd2 &= ~AO_BC_Gate_Enable;
devpriv->ao_cmd2 &= ~NISTC_AO_CMD2_BC_GATE_ENA;
trigvar =
ni_ns_to_timer(dev, cmd->scan_begin_arg,
CMDF_ROUND_NEAREST);
@@ -3037,13 +3037,13 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
AO_UPDATE_Source_Select(cmd->scan_begin_arg);
if (cmd->scan_begin_arg & CR_INVERT)
devpriv->ao_mode1 |= AO_UPDATE_Source_Polarity;
devpriv->ao_cmd2 |= AO_BC_Gate_Enable;
devpriv->ao_cmd2 |= NISTC_AO_CMD2_BC_GATE_ENA;
break;
default:
BUG();
break;
}
ni_stc_writew(dev, devpriv->ao_cmd2, AO_Command_2_Register);
ni_stc_writew(dev, devpriv->ao_cmd2, NISTC_AO_CMD2_REG);
ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
devpriv->ao_mode2 &=
~(AO_UI_Reload_Mode(3) | AO_UI_Initial_Load_Source);
@@ -3216,7 +3216,7 @@ static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s)
devpriv->ao_cmd1 = 0;
ni_stc_writew(dev, devpriv->ao_cmd1, AO_Command_1_Register);
devpriv->ao_cmd2 = 0;
ni_stc_writew(dev, devpriv->ao_cmd2, AO_Command_2_Register);
ni_stc_writew(dev, devpriv->ao_cmd2, NISTC_AO_CMD2_REG);
devpriv->ao_mode1 = 0;
ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
devpriv->ao_mode2 = 0;

View File

@@ -109,6 +109,23 @@
#define NISTC_AI_CMD2_START2_PULSE BIT(1)
#define NISTC_AI_CMD2_START1_PULSE BIT(0)
#define NISTC_AO_CMD2_REG 5
#define NISTC_AO_CMD2_END_ON_BC_TC(x) (((x) & 0x3) << 14)
#define NISTC_AO_CMD2_START_STOP_GATE_ENA BIT(13)
#define NISTC_AO_CMD2_UC_SAVE_TRACE BIT(12)
#define NISTC_AO_CMD2_BC_GATE_ENA BIT(11)
#define NISTC_AO_CMD2_BC_SAVE_TRACE BIT(10)
#define NISTC_AO_CMD2_UI_SW_ON_BC_TC BIT(9)
#define NISTC_AO_CMD2_UI_SW_ON_STOP BIT(8)
#define NISTC_AO_CMD2_UI_SW_ON_TC BIT(7)
#define NISTC_AO_CMD2_UC_SW_ON_BC_TC BIT(6)
#define NISTC_AO_CMD2_UC_SW_ON_TC BIT(5)
#define NISTC_AO_CMD2_BC_SW_ON_TC BIT(4)
#define NISTC_AO_CMD2_MUTE_B BIT(3)
#define NISTC_AO_CMD2_MUTE_A BIT(2)
#define NISTC_AO_CMD2_UPDATE2_PULSE BIT(1)
#define NISTC_AO_CMD2_START1_PULSE BIT(0)
#define AI_Status_1_Register 2
#define Interrupt_A_St 0x8000
#define AI_FIFO_Full_St 0x4000
@@ -147,23 +164,6 @@
#define AO_FIFO_Request_St _bit1
#define Pass_Thru_1_Interrupt_St _bit0
#define AO_Command_2_Register 5
#define AO_End_On_BC_TC(x) (((x) & 0x3) << 14)
#define AO_Start_Stop_Gate_Enable _bit13
#define AO_UC_Save_Trace _bit12
#define AO_BC_Gate_Enable _bit11
#define AO_BC_Save_Trace _bit10
#define AO_UI_Switch_Load_On_BC_TC _bit9
#define AO_UI_Switch_Load_On_Stop _bit8
#define AO_UI_Switch_Load_On_TC _bit7
#define AO_UC_Switch_Load_On_BC_TC _bit6
#define AO_UC_Switch_Load_On_TC _bit5
#define AO_BC_Switch_Load_On_TC _bit4
#define AO_Mute_B _bit3
#define AO_Mute_A _bit2
#define AO_UPDATE2_Pulse _bit1
#define AO_START1_Pulse _bit0
#define AO_Status_2_Register 6
#define DIO_Parallel_Input_Register 7