drm/amdgpu: Fix RRMT for gfx v12_1

Correct NORMALIZE_XCC_REG_OFFSET to 0xFFFF
because reg offset is in DW. Also set mode 3
temporarily for out of XCD access for MMHUB
TLB flush. Will need to figure out how to
differentiate between AID and MID access later.

Signed-off-by: Michael Chen <michael.chen@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Michael Chen
2026-01-06 15:22:57 +08:00
committed by Alex Deucher
parent 44e5195fa3
commit 370deb69ea

View File

@@ -512,7 +512,7 @@ static void mes_v12_1_get_rrmt(uint32_t reg, uint32_t xcc_id,
rrmt_opt->mode = (xcc_id == rrmt_opt->xcd_die_id) ?
MES_RRMT_MODE_LOCAL_XCD : MES_RRMT_MODE_REMOTE_XCD;
} else {
rrmt_opt->mode = MES_RRMT_MODE_LOCAL_REMOTE_AID;
rrmt_opt->mode = MES_RRMT_MODE_REMOTE_MID;
}
}