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arm64: dts: rockchip: Add rk3588 based Radxa CM5
Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a proprietary connector. Specification: - Rockchip RK3588 - Up to 32 GB LPDDR4X - Up to 128 GB eMMC - 1x HDMI TX up to 8k@60 hz - 1x eDP TX up to 4k@60 hz - Gigabit Ethernet PHY Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251205120703.14721-3-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Joseph Kogut
committed by
Heiko Stuebner
Heiko Stuebner
parent
7beae528dd
commit
36ee19ba42
280
arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
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280
arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2025 Joseph Kogut <joseph.kogut@gmail.com>
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*/
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/*
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* CM5 data sheet
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* https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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#include <dt-bindings/usb/pd.h>
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/ {
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compatible = "radxa,cm5", "rockchip,rk3588s";
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aliases {
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mmc0 = &sdhci;
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};
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leds {
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compatible = "gpio-leds";
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led_sys: led-0 {
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color = <LED_COLOR_ID_BLUE>;
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default-state = "on";
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function = LED_FUNCTION_HEARTBEAT;
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gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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};
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_big0_s0>;
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};
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&cpu_b1 {
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cpu-supply = <&vdd_cpu_big0_s0>;
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};
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&cpu_b2 {
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cpu-supply = <&vdd_cpu_big1_s0>;
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};
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&cpu_b3 {
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cpu-supply = <&vdd_cpu_big1_s0>;
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};
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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&cpu_l1 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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&cpu_l2 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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&cpu_l3 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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&gmac1 {
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clock_in_out = "output";
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phy-handle = <&rgmii_phy1>;
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phy-mode = "rgmii-id";
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phy-supply = <&vcc_3v3_s0>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1_miim
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&gmac1_tx_bus2
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&gmac1_rx_bus2
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&gmac1_rgmii_clk
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&gmac1_rgmii_bus
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&gmac1_clkinout>;
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};
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&gpu {
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mali-supply = <&vdd_gpu_s0>;
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0m2_xfer>;
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status = "okay";
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vdd_cpu_big0_s0: regulator@42 {
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compatible = "rockchip,rk8602";
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reg = <0x42>;
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fcs,suspend-voltage-selector = <1>;
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regulator-name = "vdd_cpu_big0_s0";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <550000>;
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regulator-max-microvolt = <1050000>;
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regulator-ramp-delay = <2300>;
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vin-supply = <&vcc5v0_sys>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_cpu_big1_s0: regulator@43 {
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compatible = "rockchip,rk8602";
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reg = <0x43>;
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fcs,suspend-voltage-selector = <1>;
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regulator-name = "vdd_cpu_big1_s0";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <550000>;
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regulator-max-microvolt = <1050000>;
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regulator-ramp-delay = <2300>;
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vin-supply = <&vcc5v0_sys>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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&mdio1 {
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rgmii_phy1: phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x1>;
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};
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};
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&pd_gpu {
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domain-supply = <&vdd_gpu_s0>;
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};
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&sdhci {
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bus-width = <8>;
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no-sdio;
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no-sd;
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non-removable;
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max-frequency = <200000000>;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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mmc-hs200-1_8v;
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status = "okay";
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};
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&spi2 {
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assigned-clocks = <&cru CLK_SPI2>;
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assigned-clock-rates = <200000000>;
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num-cs = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
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status = "okay";
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pmic@0 {
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compatible = "rockchip,rk806";
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reg = <0x0>;
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interrupt-parent = <&gpio0>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
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<&rk806_dvs2_null>, <&rk806_dvs3_null>;
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spi-max-frequency = <1000000>;
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system-power-controller;
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vcc1-supply = <&vcc5v0_sys>;
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vcc2-supply = <&vcc5v0_sys>;
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vcc3-supply = <&vcc5v0_sys>;
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vcc4-supply = <&vcc5v0_sys>;
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vcc5-supply = <&vcc5v0_sys>;
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vcc6-supply = <&vcc5v0_sys>;
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vcc7-supply = <&vcc5v0_sys>;
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vcc8-supply = <&vcc5v0_sys>;
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vcc9-supply = <&vcc5v0_sys>;
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vcc10-supply = <&vcc5v0_sys>;
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vcc11-supply = <&vcc_2v0_pldo_s3>;
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vcc12-supply = <&vcc5v0_sys>;
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vcc13-supply = <&vdd2_ddr_s3>;
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vcc14-supply = <&vdd2_ddr_s3>;
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vcca-supply = <&vcc5v0_sys>;
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gpio-controller;
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#gpio-cells = <2>;
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rk806_dvs1_null: dvs1-null-pins {
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pins = "gpio_pwrctrl1";
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function = "pin_fun0";
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};
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rk806_dvs2_null: dvs2-null-pins {
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pins = "gpio_pwrctrl2";
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function = "pin_fun0";
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};
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rk806_dvs3_null: dvs3-null-pins {
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pins = "gpio_pwrctrl3";
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function = "pin_fun0";
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};
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regulators {
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vdd_gpu_s0: dcdc-reg1 {
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regulator-name = "vdd_gpu_s0";
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regulator-boot-on;
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regulator-enable-ramp-delay = <400>;
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regulator-min-microvolt = <550000>;
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regulator-max-microvolt = <950000>;
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regulator-ramp-delay = <12500>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_cpu_lit_s0: dcdc-reg2 {
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regulator-name = "vdd_cpu_lit_s0";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <550000>;
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regulator-max-microvolt = <950000>;
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regulator-ramp-delay = <12500>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vccio_sd_s0: pldo-reg5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_sd_s0";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd2_ddr_s3: dcdc-reg6 {
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regulator-name = "vdd2_ddr_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc_2v0_pldo_s3: dcdc-reg7 {
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regulator-name = "vdd_2v0_pldo_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <2000000>;
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regulator-max-microvolt = <2000000>;
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regulator-ramp-delay = <12500>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <2000000>;
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};
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};
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vcc_3v3_s3: dcdc-reg8 {
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regulator-name = "vcc_3v3_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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};
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};
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};
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