arm64: dts: qcom: sm8650: move dp0 data-lanes to SoC dtsi

The connection between the QMP Combo PHY and the DisplayPort
controller is fixed in SoC, so move the data-lanes property
in the SoC dtsi.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-5-5363acad9e32@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Neil Armstrong
2025-08-22 17:56:53 +02:00
committed by Bjorn Andersson
parent bdd235f2df
commit 35f549fcf5
3 changed files with 1 additions and 8 deletions

View File

@@ -941,10 +941,6 @@ &mdss_dp0 {
status = "okay";
};
&mdss_dp0_out {
data-lanes = <0 1>;
};
&pcie0 {
wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;

View File

@@ -892,10 +892,6 @@ &mdss_dp0 {
status = "okay";
};
&mdss_dp0_out {
data-lanes = <0 1>;
};
&pcie0 {
wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;

View File

@@ -5723,6 +5723,7 @@ port@1 {
reg = <1>;
mdss_dp0_out: endpoint {
data-lanes = <0 1>;
remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
};