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ASoC: tegra: CIF: Add Tegra264 support

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In Tegra264, the CIF register data bit positions are changed for I2S,
AMX, ADX and ADMAIF AHUB modules, as they now support a maximum of
32 channels. tegra264_set_cif API added to set the CIF for IPs supporting
32 channels.

Signed-off-by: Sheetal <sheetal@nvidia.com>
Link: https://patch.msgid.link/20250512051747.1026770-4-sheetal@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Sheetal
2025-05-12 05:17:39 +00:00
committed by Mark Brown
parent 628dafc476
commit 35c0d1de8e
1 changed files with 26 additions and 4 deletions
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30
sound/soc/tegra/tegra_cif.h
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@@ -1,8 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* tegra_cif.h - TEGRA Audio CIF Programming
/* SPDX-License-Identifier: GPL-2.0-only
* SPDX-FileCopyrightText: Copyright (c) 2020-2025 NVIDIA CORPORATION. All rights reserved.
*
* Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved.
* tegra_cif.h - TEGRA Audio CIF Programming
*
*/
@@ -22,6 +21,10 @@
#define TEGRA_ACIF_CTRL_TRUNCATE_SHIFT 1
#define TEGRA_ACIF_CTRL_MONO_CONV_SHIFT 0
#define TEGRA264_ACIF_CTRL_AUDIO_BITS_SHIFT 11
#define TEGRA264_ACIF_CTRL_CLIENT_CH_SHIFT 14
#define TEGRA264_ACIF_CTRL_AUDIO_CH_SHIFT 19
/* AUDIO/CLIENT_BITS values */
#define TEGRA_ACIF_BITS_8 1
#define TEGRA_ACIF_BITS_16 3
@@ -62,4 +65,23 @@ static inline void tegra_set_cif(struct regmap *regmap, unsigned int reg,
regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value);
}
static inline void tegra264_set_cif(struct regmap *regmap, unsigned int reg,
struct tegra_cif_conf *conf)
{
unsigned int value;
value = (conf->threshold << TEGRA_ACIF_CTRL_FIFO_TH_SHIFT) |
((conf->audio_ch - 1) << TEGRA264_ACIF_CTRL_AUDIO_CH_SHIFT) |
((conf->client_ch - 1) << TEGRA264_ACIF_CTRL_CLIENT_CH_SHIFT) |
(conf->audio_bits << TEGRA264_ACIF_CTRL_AUDIO_BITS_SHIFT) |
(conf->client_bits << TEGRA_ACIF_CTRL_CLIENT_BITS_SHIFT) |
(conf->expand << TEGRA_ACIF_CTRL_EXPAND_SHIFT) |
(conf->stereo_conv << TEGRA_ACIF_CTRL_STEREO_CONV_SHIFT) |
(conf->replicate << TEGRA_ACIF_CTRL_REPLICATE_SHIFT) |
(conf->truncate << TEGRA_ACIF_CTRL_TRUNCATE_SHIFT) |
(conf->mono_conv << TEGRA_ACIF_CTRL_MONO_CONV_SHIFT);
regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value);
}
#endif