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arm64: dts: rockchip: Add PCIEe v3 nodes to ODROID-M1
Add nodes to ODROID-M1 to support PCIe v3 on the M2 slot. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Tested-by: Dan Johansen <strit@manjaro.org> Link: https://lore.kernel.org/r/20220930051246.391614-13-aurelien@aurel32.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
committed by
Heiko Stuebner
parent
6a5a04d52c
commit
35b28582aa
@@ -96,6 +96,19 @@ simple-audio-card,codec {
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};
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};
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vcc3v3_pcie: vcc3v3-pcie-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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enable-active-high;
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gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_pcie_en_pin>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc3v3_sys>;
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};
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vcc3v3_sys: vcc3v3-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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@@ -479,6 +492,18 @@ rgmii_phy0: ethernet-phy@0 {
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};
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};
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&pcie30phy {
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status = "okay";
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};
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&pcie3x2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_reset_pin>;
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reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_pcie>;
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status = "okay";
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};
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&pinctrl {
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fspi {
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fspi_dual_io_pins: fspi-dual-io-pins {
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@@ -503,6 +528,15 @@ led_work_pin: led-work-pin {
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};
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};
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pcie {
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pcie_reset_pin: pcie-reset-pin {
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rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
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rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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pmic_int_l: pmic-int-l {
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rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
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