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drm/xe: Mimic i915 behavior for non-sleeping MMIO wait

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In upcoming display changes, we will modify the DMC wakelock MMIO
waiting code to choose a non-sleeping variant implementation, because
the wakelock is also taking in atomic context.

While xe provides an explicit parameter (namely "atomic") to prevent
xe_mmio_wait32() from sleeping, i915 does not and implements that
behavior when slow_timeout_ms is zero.

So, for now, let's mimic what i915 does to allow for display to use
non-sleeping MMIO wait. In the future, we should come up with a better
and explicit interface for this behavior in i915, at least while display
code is not an independent entity with proper interfaces between xe and
i915.

v2:
  - Make the tone in comment the comment added in
    __intel_wait_for_register() more explanatory than a FIXME-like text.
    (Luca)

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241108130218.24125-3-gustavo.sousa@intel.com
This commit is contained in:
Gustavo Sousa
2024-11-08 09:57:07 -03:00
committed by Matt Roper
parent 75f5405e7f
commit 359d2cc1f3
1 changed files with 10 additions and 1 deletions
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11
drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
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@@ -117,10 +117,19 @@ __intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t i915_reg,
unsigned int slow_timeout_ms, u32 *out_value)
{
struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg));
bool atomic;
/*
* Replicate the behavior from i915 here, in which sleep is not
* performed if slow_timeout_ms == 0. This is necessary because
* of some paths in display code where waits are done in atomic
* context.
*/
atomic = !slow_timeout_ms && fast_timeout_us > 0;
return xe_mmio_wait32(__compat_uncore_to_mmio(uncore), reg, mask, value,
fast_timeout_us + 1000 * slow_timeout_ms,
out_value, false);
out_value, atomic);
}
static inline u32 intel_uncore_read_fw(struct intel_uncore *uncore,