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riscv: dts: spacemit: add pinctrl property to uart0 in BPI-F3

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Before pinctrl driver implemented, the uart0 controller reply on
bootloader for setting correct pin mux and configurations.

Now, let's add pinctrl property to uart0 of Bananapi-F3 board.

Signed-off-by: Yixun Lan <dlan@gentoo.org>
This commit is contained in:
Yixun Lan
2024-10-16 08:59:43 +08:00
parent 21bef40ad1
commit 3579b3506f
3 changed files with 28 additions and 0 deletions
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3
arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
View File

@@ -4,6 +4,7 @@
*/
#include "k1.dtsi"
#include "k1-pinctrl.dtsi"
/ {
model = "Banana Pi BPI-F3";
@@ -15,5 +16,7 @@ chosen {
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;
status = "okay";
};

20
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi Normal file
View File

@@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (c) 2024 Yixun Lan <dlan@gentoo.org>
*/
#include <dt-bindings/gpio/gpio.h>
#define K1_PADCONF(pin, func) (((pin) << 16) | (func))
&pinctrl {
uart0_2_cfg: uart0-2-cfg {
uart0-2-pins {
pinmux = <K1_PADCONF(68, 2)>,
<K1_PADCONF(69, 2)>;
bias-pull-up = <0>;
drive-strength = <32>;
};
};
};

5
arch/riscv/boot/dts/spacemit/k1.dtsi
View File

@@ -416,6 +416,11 @@ uart9: serial@d4017800 {
status = "disabled";
};
pinctrl: pinctrl@d401e000 {
compatible = "spacemit,k1-pinctrl";
reg = <0x0 0xd401e000 0x0 0x400>;
};
plic: interrupt-controller@e0000000 {
compatible = "spacemit,k1-plic", "sifive,plic-1.0.0";
reg = <0x0 0xe0000000 0x0 0x4000000>;