Merge tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

ARM: tegra: Device tree changes for v5.9-rc1

This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.

* tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits)
  ARM: tegra: Add device-tree for ASUS Google Nexus 7
  ARM: tegra: Add device-tree for Acer Iconia Tab A500
  ARM: tegra: Add HDMI supplies on Nyan boards
  ARM: tegra: Add missing DSI controller on Tegra30
  ARM: tegra: Add i2c-bus subnode for DPAUX controllers
  ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
  ARM: tegra: The Tegra30 DC is not backwards-compatible
  ARM: tegra: Remove spurious comma from node name
  ARM: tegra: Add parent clock to DSI output
  ARM: tegra: Use standard names for SRAM nodes
  ARM: tegra: seaboard: Use standard battery bindings
  ARM: tegra: Use standard names for LED nodes
  ARM: tegra: Use numeric unit-addresses
  ARM: tegra: medcom-wide: Remove extra panel power supply
  ARM: tegra: Use proper unit-addresses for OPPs
  ARM: tegra: Add missing clock-names for SDHCI controllers
  ARM: tegra: Fix order of XUSB controller clocks
  ARM: tegra: Add #reset-cells to Tegra124 memory controller
  ARM: tegra: Add missing panel power supplies
  ARM: tegra: Add micro-USB A/B port on Jetson TK1
  ...

Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2020-07-17 20:03:49 +02:00
53 changed files with 7251 additions and 2195 deletions

View File

@@ -1198,6 +1198,7 @@ dtb-$(CONFIG_MACH_SUNIV) += \
dtb-$(CONFIG_ARCH_TANGO) += \
tango4-vantage-1172.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
tegra20-acer-a500-picasso.dtb \
tegra20-harmony.dtb \
tegra20-colibri-eval-v3.dtb \
tegra20-colibri-iris.dtb \
@@ -1211,6 +1212,9 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \
tegra30-apalis-eval.dtb \
tegra30-apalis-v1.1-eval.dtb \
tegra30-asus-nexus7-grouper-PM269.dtb \
tegra30-asus-nexus7-grouper-E1565.dtb \
tegra30-asus-nexus7-tilapia-E1565.dtb \
tegra30-beaver.dtb \
tegra30-cardhu-a02.dtb \
tegra30-cardhu-a04.dtb \

View File

@@ -769,7 +769,6 @@ i2c@7000c000 {
battery: smart-battery@b {
compatible = "ti,bq20z45", "sbs,sbs-battery";
reg = <0xb>;
battery-name = "battery";
sbs,i2c-retry-count = <2>;
sbs,poll-retry-count = <100>;
power-supplies = <&charger>;
@@ -1109,14 +1108,14 @@ i2s@70080400 {
};
};
sdhci@78000400 {
mmc@78000400 {
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
status = "okay";
};
sdhci@78000600 {
mmc@78000600 {
bus-width = <8>;
status = "okay";
non-removable;
@@ -1152,17 +1151,10 @@ backlight: backlight {
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@@ -1194,83 +1186,70 @@ volume_up {
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_ac_bat_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd_ac_bat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_ac_bat_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_ac_bat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
dvdd_ts_reg: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "dvdd_ts";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
};
dvdd_ts_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "dvdd_ts";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
};
usb1_vbus_reg: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&tps65090_dcdc1_reg>;
};
usb1_vbus_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&tps65090_dcdc1_reg>;
};
usb3_vbus_reg: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "usb2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&tps65090_dcdc1_reg>;
};
usb3_vbus_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "usb2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&tps65090_dcdc1_reg>;
};
vdd_hdmi_reg: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "vdd_hdmi_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&tps65090_dcdc1_reg>;
};
vdd_hdmi_reg: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "vdd_hdmi_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&tps65090_dcdc1_reg>;
};
vdd_cam_1v8_reg: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "vdd_cam_1v8_reg";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
gpio = <&palmas_gpio 6 0>;
};
vdd_cam_1v8_reg: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "vdd_cam_1v8_reg";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
gpio = <&palmas_gpio 6 0>;
};
vdd_5v0_hdmi: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "VDD_5V0_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&tps65090_dcdc1_reg>;
};
vdd_5v0_hdmi: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&tps65090_dcdc1_reg>;
};
sound {

View File

@@ -37,7 +37,7 @@ host1x@50000000 {
dsi@54300000 {
status = "okay";
vdd-supply = <&vdd_1v2_ap>;
avdd-dsi-csi-supply = <&vdd_1v2_ap>;
panel@0 {
compatible = "lg,lh500wx1-sd03";
@@ -962,7 +962,7 @@ pmc@7000e400 {
};
/* SD card */
sdhci@78000400 {
mmc@78000400 {
status = "okay";
bus-width = <4>;
vqmmc-supply = <&vddio_sdmmc3>;
@@ -971,7 +971,7 @@ sdhci@78000400 {
};
/* eMMC */
sdhci@78000600 {
mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
@@ -1016,17 +1016,10 @@ backlight: backlight {
enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@@ -1052,76 +1045,64 @@ power {
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
lcd_bl_en: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "lcd_bl_en";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
lcd_bl_en: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "lcd_bl_en";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
vdd_lcd: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "vdd_lcd_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vdd_1v8>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
vdd_lcd: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_lcd_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vdd_1v8>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
regulator@2 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v8_ts";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_LOW>;
regulator-boot-on;
};
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "vdd_1v8_ts";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_LOW>;
regulator-boot-on;
};
regulator@3 {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3_ts";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd_3v3_ts";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
regulator@4 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v8_com";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vdd_1v8>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "vdd_1v8_com";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vdd_1v8>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "vdd_3v3_com";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_sys>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
regulator-always-on;
regulator-boot-on;
};
regulator@5 {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3_com";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_sys>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
regulator-always-on;
regulator-boot-on;
};
};

View File

@@ -37,7 +37,7 @@ host1x@50000000 {
dsi@54300000 {
status = "okay";
vdd-supply = <&vdd_1v2_ap>;
avdd-dsi-csi-supply = <&vdd_1v2_ap>;
panel@0 {
compatible = "lg,ld070wx3-sl01";
@@ -242,7 +242,7 @@ pmc@7000e400 {
};
/* eMMC */
sdhci@78000600 {
mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
@@ -273,17 +273,10 @@ backlight: backlight {
power-supply = <&lcd_bl_en>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@@ -309,44 +302,35 @@ volume_up {
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
/* FIXME: output of BQ24192 */
vs_sys: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "VS_SYS";
regulator-min-microvolt = <4200000>;
regulator-max-microvolt = <4200000>;
regulator-always-on;
regulator-boot-on;
};
/* FIXME: output of BQ24192 */
vs_sys: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "VS_SYS";
regulator-min-microvolt = <4200000>;
regulator-max-microvolt = <4200000>;
regulator-always-on;
regulator-boot-on;
};
lcd_bl_en: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "VDD_LCD_BL";
regulator-min-microvolt = <16500000>;
regulator-max-microvolt = <16500000>;
gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vs_sys>;
regulator-boot-on;
};
lcd_bl_en: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "VDD_LCD_BL";
regulator-min-microvolt = <16500000>;
regulator-max-microvolt = <16500000>;
gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vs_sys>;
regulator-boot-on;
};
vdd_lcd: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "VD_LCD_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&palmas_gpio 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_1v8>;
regulator-boot-on;
};
vdd_lcd: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "VD_LCD_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&palmas_gpio 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_1v8>;
regulator-boot-on;
};
};

View File

@@ -18,11 +18,13 @@ memory@80000000 {
};
host1x@50000000 {
compatible = "nvidia,tegra114-host1x", "simple-bus";
compatible = "nvidia,tegra114-host1x";
reg = <0x50000000 0x00028000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA114_CLK_HOST1X>;
clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
iommus = <&mc TEGRA_SWGROUP_HC>;
@@ -33,7 +35,7 @@ host1x@50000000 {
ranges = <0x54000000 0x54000000 0x01000000>;
gr2d@54140000 {
compatible = "nvidia,tegra114-gr2d", "nvidia,tegra20-gr2d";
compatible = "nvidia,tegra114-gr2d";
reg = <0x54140000 0x00040000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_GR2D>;
@@ -44,7 +46,7 @@ gr2d@54140000 {
};
gr3d@54180000 {
compatible = "nvidia,tegra114-gr3d", "nvidia,tegra20-gr3d";
compatible = "nvidia,tegra114-gr3d";
reg = <0x54180000 0x00040000>;
clocks = <&tegra_car TEGRA114_CLK_GR3D>;
resets = <&tegra_car 24>;
@@ -54,7 +56,7 @@ gr3d@54180000 {
};
dc@54200000 {
compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
compatible = "nvidia,tegra114-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_DISP1>,
@@ -73,7 +75,7 @@ rgb {
};
dc@54240000 {
compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
compatible = "nvidia,tegra114-dc";
reg = <0x54240000 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_DISP2>,
@@ -253,14 +255,14 @@ gpio: gpio@6000d000 {
apbmisc@70000800 {
compatible = "nvidia,tegra114-apbmisc", "nvidia,tegra20-apbmisc";
reg = <0x70000800 0x64 /* Chip revision */
0x70000008 0x04>; /* Strapping options */
reg = <0x70000800 0x64>, /* Chip revision */
<0x70000008 0x04>; /* Strapping options */
};
pinmux: pinmux@70000868 {
compatible = "nvidia,tegra114-pinmux";
reg = <0x70000868 0x148 /* Pad control registers */
0x70003000 0x40c>; /* Mux registers */
reg = <0x70000868 0x148>, /* Pad control registers */
<0x70003000 0x40c>; /* Mux registers */
};
/*
@@ -644,41 +646,45 @@ mipi: mipi@700e3000 {
#nvidia,mipi-calibrate-cells = <1>;
};
sdhci@78000000 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
mmc@78000000 {
compatible = "nvidia,tegra114-sdhci";
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@78000200 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
mmc@78000200 {
compatible = "nvidia,tegra114-sdhci";
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@78000400 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
mmc@78000400 {
compatible = "nvidia,tegra114-sdhci";
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@78000600 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
mmc@78000600 {
compatible = "nvidia,tegra114-sdhci";
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
@@ -698,7 +704,8 @@ usb@7d000000 {
phy1: usb-phy@7d000000 {
compatible = "nvidia,tegra114-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
reg = <0x7d000000 0x4000>,
<0x7d000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USBD>,
<&tegra_car TEGRA114_CLK_PLL_U>,
@@ -706,6 +713,7 @@ phy1: usb-phy@7d000000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 22>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -734,7 +742,8 @@ usb@7d008000 {
phy3: usb-phy@7d008000 {
compatible = "nvidia,tegra114-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
reg = <0x7d008000 0x4000>,
<0x7d000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USB3>,
<&tegra_car TEGRA114_CLK_PLL_U>,
@@ -742,6 +751,7 @@ phy3: usb-phy@7d008000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 59>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;

View File

@@ -130,7 +130,7 @@ usb@70090000 {
};
/* Apalis MMC1 */
sdhci@700b0000 {
mmc@700b0000 {
status = "okay";
bus-width = <4>;
/* MMC1_CD# */
@@ -139,7 +139,7 @@ sdhci@700b0000 {
};
/* Apalis SD1 */
sdhci@700b0400 {
mmc@700b0400 {
status = "okay";
bus-width = <4>;
/* SD1_CD# */

View File

@@ -132,7 +132,7 @@ usb@70090000 {
};
/* Apalis MMC1 */
sdhci@700b0000 {
mmc@700b0000 {
status = "okay";
bus-width = <4>;
/* MMC1_CD# */
@@ -141,7 +141,7 @@ sdhci@700b0000 {
};
/* Apalis SD1 */
sdhci@700b0400 {
mmc@700b0400 {
status = "okay";
bus-width = <4>;
/* SD1_CD# */

View File

@@ -40,7 +40,7 @@ pci@2,0 {
phy-names = "pcie-0";
status = "okay";
pcie@0 {
ethernet@0,0 {
reg = <0 0 0 0 0>;
local-mac-address = [00 00 00 00 00 00];
};
@@ -1562,6 +1562,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
VDDA-supply = <&reg_module_3v3_audio>;
VDDD-supply = <&reg_1v8_vddio>;
VDDIO-supply = <&reg_1v8_vddio>;
@@ -1916,7 +1917,7 @@ usb3-1 {
};
/* eMMC */
sdhci@700b0600 {
mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;

View File

@@ -39,7 +39,7 @@ pci@2,0 {
phy-names = "pcie-0";
status = "okay";
pcie@0 {
ethernet@0,0 {
reg = <0 0 0 0 0>;
local-mac-address = [00 00 00 00 00 00];
};
@@ -1555,6 +1555,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
VDDA-supply = <&reg_module_3v3_audio>;
VDDD-supply = <&reg_1v8_vddio>;
VDDIO-supply = <&reg_1v8_vddio>;
@@ -1908,7 +1909,7 @@ usb3-1 {
};
/* eMMC */
sdhci@700b0600 {
mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;

View File

@@ -1782,6 +1782,12 @@ sata-0 {
};
ports {
/* Micro A/B */
usb2-0 {
status = "okay";
mode = "host";
};
/* Mini PCIe */
usb2-1 {
status = "okay";
@@ -1804,7 +1810,7 @@ usb3-0 {
};
/* SD card */
sdhci@700b0400 {
mmc@700b0400 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
@@ -1814,7 +1820,7 @@ sdhci@700b0400 {
};
/* eMMC */
sdhci@700b0600 {
mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
@@ -1862,17 +1868,10 @@ usb-phy@7d008000 {
vbus-supply = <&vdd_usb3_vbus>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
cpus {
@@ -1893,145 +1892,127 @@ power {
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_mux: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "+VDD_MUX";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_mux: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "+VDD_MUX";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "+5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "+5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "+3.3V_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_run: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_RUN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_run: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "+3.3V_RUN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_hdmi: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_run>;
};
vdd_3v3_hdmi: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_run>;
};
vdd_usb1_vbus: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "+USB0_VBUS_SW";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb1_vbus: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "+USB0_VBUS_SW";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb3_vbus: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "+5V_USB_HS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb3_vbus: regulator@8 {
compatible = "regulator-fixed";
reg = <8>;
regulator-name = "+5V_USB_HS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_3v3_lp0: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_LP0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_lp0: regulator@10 {
compatible = "regulator-fixed";
reg = <10>;
regulator-name = "+3.3V_LP0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_hdmi_pll: regulator@8 {
compatible = "regulator-fixed";
regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
vin-supply = <&vdd_1v05_run>;
};
vdd_hdmi_pll: regulator@11 {
compatible = "regulator-fixed";
reg = <11>;
regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
vin-supply = <&vdd_1v05_run>;
};
vdd_5v0_hdmi: regulator@9 {
compatible = "regulator-fixed";
regulator-name = "+5V_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_5v0_hdmi: regulator@12 {
compatible = "regulator-fixed";
reg = <12>;
regulator-name = "+5V_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
/* Molex power connector */
vdd_5v0_sata: regulator@10 {
compatible = "regulator-fixed";
regulator-name = "+5V_SATA";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
/* Molex power connector */
vdd_5v0_sata: regulator@13 {
compatible = "regulator-fixed";
reg = <13>;
regulator-name = "+5V_SATA";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_12v0_sata: regulator@14 {
compatible = "regulator-fixed";
reg = <14>;
regulator-name = "+12V_SATA";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_mux>;
};
vdd_12v0_sata: regulator@11 {
compatible = "regulator-fixed";
regulator-name = "+12V_SATA";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_mux>;
};
sound {

View File

@@ -16,11 +16,12 @@ / {
panel: panel {
compatible = "auo,b133xtn01";
power-supply = <&vdd_3v3_panel>;
backlight = <&backlight>;
ddc-i2c-bus = <&dpaux>;
};
sdhci@700b0400 { /* SD Card on this bus */
mmc@700b0400 { /* SD Card on this bus */
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
};

View File

@@ -18,6 +18,7 @@ / {
panel: panel {
compatible = "samsung,ltn140at29-301";
power-supply = <&vdd_3v3_panel>;
backlight = <&backlight>;
ddc-i2c-bus = <&dpaux>;
};

View File

@@ -48,6 +48,9 @@ hdmi@54280000 {
sor@54540000 {
status = "okay";
avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>;
vdd-hdmi-dp-pll-supply = <&vdd_hdmi_pll>;
nvidia,dpaux = <&dpaux>;
nvidia,panel = <&panel>;
};
@@ -495,7 +498,7 @@ sdhci0_pwrseq: sdhci0_pwrseq {
reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
};
sdhci@700b0000 { /* WiFi/BT on this bus */
mmc@700b0000 { /* WiFi/BT on this bus */
status = "okay";
bus-width = <4>;
no-1-8-v;
@@ -506,7 +509,7 @@ sdhci@700b0000 { /* WiFi/BT on this bus */
keep-power-in-suspend;
};
sdhci@700b0400 { /* SD Card on this bus */
mmc@700b0400 { /* SD Card on this bus */
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
@@ -515,7 +518,7 @@ sdhci@700b0400 { /* SD Card on this bus */
vqmmc-supply = <&vddio_sdmmc3>;
};
sdhci@700b0600 { /* eMMC on this bus */
mmc@700b0600 { /* eMMC on this bus */
status = "okay";
bus-width = <8>;
no-1-8-v;
@@ -579,17 +582,10 @@ backlight: backlight {
256>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
cpus {
@@ -619,157 +615,138 @@ power {
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_mux: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "+VDD_MUX";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_mux: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "+VDD_MUX";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "+5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "+5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "+3.3V_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_run: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_RUN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_run: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "+3.3V_RUN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_hdmi: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_run>;
};
vdd_3v3_hdmi: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_run>;
};
vdd_led: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "+VDD_LED";
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_mux>;
};
vdd_led: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "+VDD_LED";
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_mux>;
};
vdd_5v0_ts: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "+5V_VDD_TS_SW";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_5v0_ts: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "+5V_VDD_TS_SW";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb1_vbus: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "+5V_USB_HS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb1_vbus: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "+5V_USB_HS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb3_vbus: regulator@8 {
compatible = "regulator-fixed";
regulator-name = "+5V_USB_SS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb3_vbus: regulator@8 {
compatible = "regulator-fixed";
reg = <8>;
regulator-name = "+5V_USB_SS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_3v3_panel: regulator@9 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_PANEL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_run>;
};
vdd_3v3_panel: regulator@9 {
compatible = "regulator-fixed";
reg = <9>;
regulator-name = "+3.3V_PANEL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_run>;
};
vdd_3v3_lp0: regulator@10 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_LP0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
/*
* TODO: find a way to wire this up with the USB EHCI
* controllers so that it can be enabled on demand.
*/
regulator-always-on;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_lp0: regulator@10 {
compatible = "regulator-fixed";
reg = <10>;
regulator-name = "+3.3V_LP0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
/*
* TODO: find a way to wire this up with the USB EHCI
* controllers so that it can be enabled on demand.
*/
regulator-always-on;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_hdmi_pll: regulator@11 {
compatible = "regulator-fixed";
regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
vin-supply = <&vdd_1v05_run>;
};
vdd_hdmi_pll: regulator@11 {
compatible = "regulator-fixed";
reg = <11>;
regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
vin-supply = <&vdd_1v05_run>;
};
vdd_5v0_hdmi: regulator@12 {
compatible = "regulator-fixed";
reg = <12>;
regulator-name = "+5V_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_5v0_hdmi: regulator@12 {
compatible = "regulator-fixed";
regulator-name = "+5V_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
sound {

View File

@@ -1002,7 +1002,7 @@ usb3-1 {
};
};
sdhci@700b0400 {
mmc@700b0400 {
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
@@ -1011,7 +1011,7 @@ sdhci@700b0400 {
vqmmc-supply = <&vddio_sdmmc3>;
};
sdhci@700b0600 {
mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
@@ -1061,17 +1061,10 @@ backlight: backlight {
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@@ -1088,164 +1081,145 @@ power {
panel: panel {
compatible = "lg,lp129qe";
power-supply = <&vdd_3v3_panel>;
backlight = <&backlight>;
ddc-i2c-bus = <&dpaux>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_mux: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "+VDD_MUX";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_mux: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "+VDD_MUX";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
regulator-boot-on;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "+5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_5v0_sys: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "+5V_SYS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_sys: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "+3.3V_SYS";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd_mux>;
};
vdd_3v3_run: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_RUN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_run: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "+3.3V_RUN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_hdmi: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_run>;
};
vdd_3v3_hdmi: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vdd_3v3_run>;
};
vdd_led: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "+VDD_LED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_mux>;
};
vdd_led: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "+VDD_LED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_mux>;
};
vdd_5v0_ts: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "+5V_VDD_TS_SW";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_5v0_ts: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "+5V_VDD_TS_SW";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb1_vbus: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "+5V_USB_HS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb1_vbus: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "+5V_USB_HS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb3_vbus: regulator@8 {
compatible = "regulator-fixed";
regulator-name = "+5V_USB_SS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb3_vbus: regulator@8 {
compatible = "regulator-fixed";
reg = <8>;
regulator-name = "+5V_USB_SS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio-open-drain;
vin-supply = <&vdd_5v0_sys>;
};
vdd_3v3_panel: regulator@9 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_PANEL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_run>;
};
vdd_3v3_panel: regulator@9 {
compatible = "regulator-fixed";
reg = <9>;
regulator-name = "+3.3V_PANEL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_run>;
};
vdd_3v3_lp0: regulator@10 {
compatible = "regulator-fixed";
regulator-name = "+3.3V_LP0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
/*
* TODO: find a way to wire this up with the USB EHCI
* controllers so that it can be enabled on demand.
*/
regulator-always-on;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_3v3_lp0: regulator@10 {
compatible = "regulator-fixed";
reg = <10>;
regulator-name = "+3.3V_LP0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
/*
* TODO: find a way to wire this up with the USB EHCI
* controllers so that it can be enabled on demand.
*/
regulator-always-on;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
vdd_hdmi_pll: regulator@11 {
compatible = "regulator-fixed";
regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
vin-supply = <&vdd_1v05_run>;
};
vdd_hdmi_pll: regulator@11 {
compatible = "regulator-fixed";
reg = <11>;
regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
vin-supply = <&vdd_1v05_run>;
};
vdd_5v0_hdmi: regulator@12 {
compatible = "regulator-fixed";
reg = <12>;
regulator-name = "+5V_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_5v0_hdmi: regulator@12 {
compatible = "regulator-fixed";
regulator-name = "+5V_HDMI_CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
sound {

View File

@@ -22,9 +22,9 @@ memory@80000000 {
pcie@1003000 {
compatible = "nvidia,tegra124-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
0x0 0x01003800 0x0 0x00000800 /* AFI registers */
0x0 0x02000000 0x0 0x10000000>; /* configuration space */
reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
<0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
<0x0 0x02000000 0x0 0x10000000>; /* configuration space */
reg-names = "pads", "afi", "cs";
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
@@ -38,11 +38,11 @@ pcie@1003000 {
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
<0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
<0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
<0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
<0x42000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
clocks = <&tegra_car TEGRA124_CLK_PCIE>,
<&tegra_car TEGRA124_CLK_AFI>,
@@ -85,11 +85,13 @@ pci@2,0 {
};
host1x@50000000 {
compatible = "nvidia,tegra124-host1x", "simple-bus";
compatible = "nvidia,tegra124-host1x";
reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
iommus = <&mc TEGRA_SWGROUP_HC>;
@@ -103,9 +105,8 @@ dc@54200000 {
compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54200000 0x0 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_DISP1>,
<&tegra_car TEGRA124_CLK_PLL_P>;
clock-names = "dc", "parent";
clocks = <&tegra_car TEGRA124_CLK_DISP1>;
clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
@@ -118,9 +119,8 @@ dc@54240000 {
compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54240000 0x0 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_DISP2>,
<&tegra_car TEGRA124_CLK_PLL_P>;
clock-names = "dc", "parent";
clocks = <&tegra_car TEGRA124_CLK_DISP2>;
clock-names = "dc";
resets = <&tegra_car 26>;
reset-names = "dc";
@@ -178,6 +178,11 @@ dpaux: dpaux@545c0000 {
resets = <&tegra_car 181>;
reset-names = "dpaux";
status = "disabled";
i2c-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
};
@@ -622,6 +627,7 @@ mc: memory-controller@70019000 {
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
#reset-cells = <1>;
};
emc: external-memory-controller@7001b000 {
@@ -679,8 +685,8 @@ usb@70090000 {
<&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_SS>,
<&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA124_CLK_PLL_U_480M>,
@@ -688,7 +694,7 @@ usb@70090000 {
<&tegra_car TEGRA124_CLK_PLL_E>;
clock-names = "xusb_host", "xusb_host_src",
"xusb_falcon_src", "xusb_ss",
"xusb_ss_div2", "xusb_ss_src",
"xusb_ss_src", "xusb_ss_div2",
"xusb_hs_src", "xusb_fs_src",
"pll_u_480m", "clk_m", "pll_e";
resets = <&tegra_car 89>, <&tegra_car 156>,
@@ -833,41 +839,45 @@ usb3-1 {
};
};
sdhci@700b0000 {
mmc@700b0000 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC1>;
clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@700b0200 {
mmc@700b0200 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC2>;
clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@700b0400 {
mmc@700b0400 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC3>;
clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@700b0600 {
mmc@700b0600 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_SDMMC4>;
clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
@@ -885,8 +895,8 @@ cec@70015000 {
soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra124-soctherm";
reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
reg = <0x0 0x700e2000 0x0 0x600>, /* SOC_THERM reg_base */
<0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
reg-names = "soctherm-reg", "car-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
@@ -1056,6 +1066,7 @@ phy1: usb-phy@7d000000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 22>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -1093,6 +1104,7 @@ phy2: usb-phy@7d004000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -1129,6 +1141,7 @@ phy3: usb-phy@7d008000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 59>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;

File diff suppressed because it is too large Load Diff

View File

@@ -183,7 +183,7 @@ can@0 {
};
/* SD/MMC */
sdhci@c8000600 {
mmc@c8000600 {
status = "okay";
bus-width = <4>;
cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */

View File

@@ -171,7 +171,7 @@ spi@7000da00 {
};
/* SD/MMC */
sdhci@c8000600 {
mmc@c8000600 {
status = "okay";
bus-width = <4>;
cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */

View File

@@ -2,199 +2,199 @@
/ {
cpu0_opp_table: cpu_opp_table0 {
opp@216000000_750 {
opp@216000000,750 {
opp-microvolt = <750000 750000 1125000>;
};
opp@216000000_800 {
opp@216000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
opp@312000000_750 {
opp@312000000,750 {
opp-microvolt = <750000 750000 1125000>;
};
opp@312000000_800 {
opp@312000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
opp@456000000_750 {
opp@456000000,750 {
opp-microvolt = <750000 750000 1125000>;
};
opp@456000000_800 {
opp@456000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
opp@456000000_800_2_2 {
opp@456000000,800,2,2 {
opp-microvolt = <800000 800000 1125000>;
};
opp@456000000_800_3_2 {
opp@456000000,800,3,2 {
opp-microvolt = <800000 800000 1125000>;
};
opp@456000000_825 {
opp@456000000,825 {
opp-microvolt = <825000 825000 1125000>;
};
opp@608000000_750 {
opp@608000000,750 {
opp-microvolt = <750000 750000 1125000>;
};
opp@608000000_800 {
opp@608000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
opp@608000000_800_3_2 {
opp@608000000,800,3,2 {
opp-microvolt = <800000 800000 1125000>;
};
opp@608000000_825 {
opp@608000000,825 {
opp-microvolt = <825000 825000 1125000>;
};
opp@608000000_850 {
opp@608000000,850 {
opp-microvolt = <850000 850000 1125000>;
};
opp@608000000_900 {
opp@608000000,900 {
opp-microvolt = <900000 900000 1125000>;
};
opp@760000000_775 {
opp@760000000,775 {
opp-microvolt = <775000 775000 1125000>;
};
opp@760000000_800 {
opp@760000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
opp@760000000_850 {
opp@760000000,850 {
opp-microvolt = <850000 850000 1125000>;
};
opp@760000000_875 {
opp@760000000,875 {
opp-microvolt = <875000 875000 1125000>;
};
opp@760000000_875_1_1 {
opp@760000000,875,1,1 {
opp-microvolt = <875000 875000 1125000>;
};
opp@760000000_875_0_2 {
opp@760000000,875,0,2 {
opp-microvolt = <875000 875000 1125000>;
};
opp@760000000_875_1_2 {
opp@760000000,875,1,2 {
opp-microvolt = <875000 875000 1125000>;
};
opp@760000000_900 {
opp@760000000,900 {
opp-microvolt = <900000 900000 1125000>;
};
opp@760000000_975 {
opp@760000000,975 {
opp-microvolt = <975000 975000 1125000>;
};
opp@816000000_800 {
opp@816000000,800 {
opp-microvolt = <800000 800000 1125000>;
};
opp@816000000_850 {
opp@816000000,850 {
opp-microvolt = <850000 850000 1125000>;
};
opp@816000000_875 {
opp@816000000,875 {
opp-microvolt = <875000 875000 1125000>;
};
opp@816000000_950 {
opp@816000000,950 {
opp-microvolt = <950000 950000 1125000>;
};
opp@816000000_1000 {
opp@816000000,1000 {
opp-microvolt = <1000000 1000000 1125000>;
};
opp@912000000_850 {
opp@912000000,850 {
opp-microvolt = <850000 850000 1125000>;
};
opp@912000000_900 {
opp@912000000,900 {
opp-microvolt = <900000 900000 1125000>;
};
opp@912000000_925 {
opp@912000000,925 {
opp-microvolt = <925000 925000 1125000>;
};
opp@912000000_950 {
opp@912000000,950 {
opp-microvolt = <950000 950000 1125000>;
};
opp@912000000_950_0_2 {
opp@912000000,950,0,2 {
opp-microvolt = <950000 950000 1125000>;
};
opp@912000000_950_2_2 {
opp@912000000,950,2,2 {
opp-microvolt = <950000 950000 1125000>;
};
opp@912000000_1000 {
opp@912000000,1000 {
opp-microvolt = <1000000 1000000 1125000>;
};
opp@912000000_1050 {
opp@912000000,1050 {
opp-microvolt = <1050000 1050000 1125000>;
};
opp@1000000000_875 {
opp@1000000000,875 {
opp-microvolt = <875000 875000 1125000>;
};
opp@1000000000_900 {
opp@1000000000,900 {
opp-microvolt = <900000 900000 1125000>;
};
opp@1000000000_950 {
opp@1000000000,950 {
opp-microvolt = <950000 950000 1125000>;
};
opp@1000000000_975 {
opp@1000000000,975 {
opp-microvolt = <975000 975000 1125000>;
};
opp@1000000000_1000 {
opp@1000000000,1000 {
opp-microvolt = <1000000 1000000 1125000>;
};
opp@1000000000_1000_0_2 {
opp@1000000000,1000,0,2 {
opp-microvolt = <1000000 1000000 1125000>;
};
opp@1000000000_1025 {
opp@1000000000,1025 {
opp-microvolt = <1025000 1025000 1125000>;
};
opp@1000000000_1100 {
opp@1000000000,1100 {
opp-microvolt = <1100000 1100000 1125000>;
};
opp@1200000000_1000 {
opp@1200000000,1000 {
opp-microvolt = <1000000 1000000 1125000>;
};
opp@1200000000_1050 {
opp@1200000000,1050 {
opp-microvolt = <1050000 1050000 1125000>;
};
opp@1200000000_1100 {
opp@1200000000,1100 {
opp-microvolt = <1100000 1100000 1125000>;
};
opp@1200000000_1125 {
opp@1200000000,1125 {
opp-microvolt = <1125000 1125000 1125000>;
};
};

View File

@@ -5,295 +5,295 @@ cpu0_opp_table: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp@216000000_750 {
opp@216000000,750 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0003>;
opp-hz = /bits/ 64 <216000000>;
};
opp@216000000_800 {
opp@216000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0004>;
opp-hz = /bits/ 64 <216000000>;
};
opp@312000000_750 {
opp@312000000,750 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0003>;
opp-hz = /bits/ 64 <312000000>;
};
opp@312000000_800 {
opp@312000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0F 0x0004>;
opp-hz = /bits/ 64 <312000000>;
};
opp@456000000_750 {
opp@456000000,750 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x0C 0x0003>;
opp-hz = /bits/ 64 <456000000>;
};
opp@456000000_800 {
opp@456000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0006>;
opp-hz = /bits/ 64 <456000000>;
};
opp@456000000_800_2_2 {
opp@456000000,800,2,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <456000000>;
};
opp@456000000_800_3_2 {
opp@456000000,800,3,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <456000000>;
};
opp@456000000_825 {
opp@456000000,825 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <456000000>;
};
opp@608000000_750 {
opp@608000000,750 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0003>;
opp-hz = /bits/ 64 <608000000>;
};
opp@608000000_800 {
opp@608000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0006>;
opp-hz = /bits/ 64 <608000000>;
};
opp@608000000_800_3_2 {
opp@608000000,800,3,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <608000000>;
};
opp@608000000_825 {
opp@608000000,825 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <608000000>;
};
opp@608000000_850 {
opp@608000000,850 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0006>;
opp-hz = /bits/ 64 <608000000>;
};
opp@608000000_900 {
opp@608000000,900 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <608000000>;
};
opp@760000000_775 {
opp@760000000,775 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0003>;
opp-hz = /bits/ 64 <760000000>;
};
opp@760000000_800 {
opp@760000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <760000000>;
};
opp@760000000_850 {
opp@760000000,850 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0006>;
opp-hz = /bits/ 64 <760000000>;
};
opp@760000000_875 {
opp@760000000,875 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <760000000>;
};
opp@760000000_875_1_1 {
opp@760000000,875,1,1 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0002>;
opp-hz = /bits/ 64 <760000000>;
};
opp@760000000_875_0_2 {
opp@760000000,875,0,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0004>;
opp-hz = /bits/ 64 <760000000>;
};
opp@760000000_875_1_2 {
opp@760000000,875,1,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0004>;
opp-hz = /bits/ 64 <760000000>;
};
opp@760000000_900 {
opp@760000000,900 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0002>;
opp-hz = /bits/ 64 <760000000>;
};
opp@760000000_975 {
opp@760000000,975 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <760000000>;
};
opp@816000000_800 {
opp@816000000,800 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0007>;
opp-hz = /bits/ 64 <816000000>;
};
opp@816000000_850 {
opp@816000000,850 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <816000000>;
};
opp@816000000_875 {
opp@816000000,875 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0005>;
opp-hz = /bits/ 64 <816000000>;
};
opp@816000000_950 {
opp@816000000,950 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0006>;
opp-hz = /bits/ 64 <816000000>;
};
opp@816000000_1000 {
opp@816000000,1000 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <816000000>;
};
opp@912000000_850 {
opp@912000000,850 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0007>;
opp-hz = /bits/ 64 <912000000>;
};
opp@912000000_900 {
opp@912000000,900 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <912000000>;
};
opp@912000000_925 {
opp@912000000,925 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <912000000>;
};
opp@912000000_950 {
opp@912000000,950 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0006>;
opp-hz = /bits/ 64 <912000000>;
};
opp@912000000_950_0_2 {
opp@912000000,950,0,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0004>;
opp-hz = /bits/ 64 <912000000>;
};
opp@912000000_950_2_2 {
opp@912000000,950,2,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <912000000>;
};
opp@912000000_1000 {
opp@912000000,1000 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0002>;
opp-hz = /bits/ 64 <912000000>;
};
opp@912000000_1050 {
opp@912000000,1050 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <912000000>;
};
opp@1000000000_875 {
opp@1000000000,875 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0007>;
opp-hz = /bits/ 64 <1000000000>;
};
opp@1000000000_900 {
opp@1000000000,900 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0002>;
opp-hz = /bits/ 64 <1000000000>;
};
opp@1000000000_950 {
opp@1000000000,950 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <1000000000>;
};
opp@1000000000_975 {
opp@1000000000,975 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0001>;
opp-hz = /bits/ 64 <1000000000>;
};
opp@1000000000_1000 {
opp@1000000000,1000 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0006>;
opp-hz = /bits/ 64 <1000000000>;
};
opp@1000000000_1000_0_2 {
opp@1000000000,1000,0,2 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0004>;
opp-hz = /bits/ 64 <1000000000>;
};
opp@1000000000_1025 {
opp@1000000000,1025 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0002>;
opp-hz = /bits/ 64 <1000000000>;
};
opp@1000000000_1100 {
opp@1000000000,1100 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x03 0x0001>;
opp-hz = /bits/ 64 <1000000000>;
};
opp@1200000000_1000 {
opp@1200000000,1000 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x08 0x0004>;
opp-hz = /bits/ 64 <1200000000>;
};
opp@1200000000_1050 {
opp@1200000000,1050 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x04 0x0004>;
opp-hz = /bits/ 64 <1200000000>;
};
opp@1200000000_1100 {
opp@1200000000,1100 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x02 0x0004>;
opp-hz = /bits/ 64 <1200000000>;
};
opp@1200000000_1125 {
opp@1200000000,1125 {
clock-latency-ns = <400000>;
opp-supported-hw = <0x01 0x0004>;
opp-hz = /bits/ 64 <1200000000>;

View File

@@ -613,7 +613,7 @@ usb-phy@c5008000 {
status = "okay";
};
sdhci@c8000200 {
mmc@c8000200 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
@@ -621,7 +621,7 @@ sdhci@c8000200 {
bus-width = <4>;
};
sdhci@c8000600 {
mmc@c8000600 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
@@ -640,17 +640,10 @@ backlight: backlight {
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@@ -673,79 +666,66 @@ panel: panel {
backlight = <&backlight>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_5v0_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_5v0_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
regulator@1 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_1v5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
regulator@2 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "vdd_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
pci_vdd_reg: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v05";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
pci_vdd_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd_1v05";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_pnl_reg: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_pnl_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_bl_reg: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_bl_reg: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_5v0_hdmi: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "VDDIO_HDMI";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_reg>;
};
vdd_5v0_hdmi: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_HDMI";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_reg>;
};
sound {

View File

@@ -59,7 +59,7 @@ backlight: backlight {
panel: panel {
compatible = "innolux,n156bge-l21";
power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
power-supply = <&vdd_1v8_reg>; // <&vdd_3v3_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
@@ -92,44 +92,38 @@ sound {
clock-names = "pll_a", "pll_a_out0", "mclk";
};
regulators {
vcc_24v_reg: regulator@100 {
compatible = "regulator-fixed";
reg = <100>;
regulator-name = "vcc_24v";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
regulator-always-on;
};
vcc_24v_reg: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "vcc_24v";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
regulator-always-on;
};
vdd_5v0_reg: regulator@101 {
compatible = "regulator-fixed";
reg = <101>;
regulator-name = "vdd_5v0";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_5v0_reg: regulator@101 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v0";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_3v3_reg: regulator@102 {
compatible = "regulator-fixed";
reg = <102>;
regulator-name = "vdd_3v3";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_3v3_reg: regulator@102 {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_1v8_reg: regulator@103 {
compatible = "regulator-fixed";
reg = <103>;
regulator-name = "vdd_1v8";
vin-supply = <&vdd_3v3_reg>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_1v8_reg: regulator@103 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v8";
vin-supply = <&vdd_3v3_reg>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};

View File

@@ -314,7 +314,7 @@ nvec@7000c500 {
memory-controller@7000f400 {
nvidia,use-ram-code;
emc-tables@hynix {
emc-tables@0 {
nvidia,ram-code = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
@@ -543,7 +543,7 @@ usb-phy@c5008000 {
status = "okay";
};
sdhci@c8000000 {
mmc@c8000000 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
@@ -551,7 +551,7 @@ sdhci@c8000000 {
bus-width = <4>;
};
sdhci@c8000600 {
mmc@c8000600 {
status = "okay";
bus-width = <8>;
non-removable;
@@ -569,17 +569,10 @@ backlight: backlight {
backlight-boot-off;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@@ -596,7 +589,7 @@ wakeup {
gpio-leds {
compatible = "gpio-leds";
wifi {
led-0 {
label = "wifi-led";
gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
linux,default-trigger = "rfkill0";
@@ -613,30 +606,22 @@ panel: panel {
backlight = <&backlight>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
p5valw_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "+5valw";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
p5valw_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "+5valw";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_pnl_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "+3VS,vdd_pnl";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_pnl_reg: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "+3VS,vdd_pnl";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
sound {

View File

@@ -60,44 +60,38 @@ sound {
clock-names = "pll_a", "pll_a_out0", "mclk";
};
regulators {
vcc_24v_reg: regulator@100 {
compatible = "regulator-fixed";
reg = <100>;
regulator-name = "vcc_24v";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
regulator-always-on;
};
vcc_24v_reg: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "vcc_24v";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
regulator-always-on;
};
vdd_5v0_reg: regulator@101 {
compatible = "regulator-fixed";
reg = <101>;
regulator-name = "vdd_5v0";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_5v0_reg: regulator@101 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v0";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_3v3_reg: regulator@102 {
compatible = "regulator-fixed";
reg = <102>;
regulator-name = "vdd_3v3";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_3v3_reg: regulator@102 {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_1v8_reg: regulator@103 {
compatible = "regulator-fixed";
reg = <103>;
regulator-name = "vdd_1v8";
vin-supply = <&vdd_3v3_reg>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_1v8_reg: regulator@103 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v8";
vin-supply = <&vdd_3v3_reg>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};

View File

@@ -394,10 +394,10 @@ lvds_ddc: i2c@1 {
#size-cells = <0>;
smart-battery@b {
compatible = "ti,bq20z75", "smart-battery-1.1";
compatible = "ti,bq20z75", "sbs,sbs-battery";
reg = <0xb>;
ti,i2c-retry-count = <2>;
ti,poll-retry-count = <10>;
sbs,i2c-retry-count = <2>;
sbs,poll-retry-count = <10>;
};
};
};
@@ -760,14 +760,14 @@ usb-phy@c5008000 {
status = "okay";
};
sdhci@c8000000 {
mmc@c8000000 {
status = "okay";
power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
keep-power-in-suspend;
};
sdhci@c8000400 {
mmc@c8000400 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
@@ -775,7 +775,7 @@ sdhci@c8000400 {
bus-width = <4>;
};
sdhci@c8000600 {
mmc@c8000600 {
status = "okay";
bus-width = <8>;
non-removable;
@@ -792,17 +792,10 @@ backlight: backlight {
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@@ -835,81 +828,68 @@ panel: panel {
ddc-i2c-bus = <&lvds_ddc>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_5v0_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_5v0_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
regulator@1 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_1v5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
regulator@2 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "vdd_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vbus_reg: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "vdd_vbus_wup1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
regulator-always-on;
regulator-boot-on;
};
vbus_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd_vbus_wup1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
regulator-always-on;
regulator-boot-on;
};
vdd_pnl_reg: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_pnl_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_bl_reg: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_bl_reg: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_hdmi: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "VDDIO_HDMI";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_reg>;
};
vdd_hdmi: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_HDMI";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_reg>;
};
sound {

View File

@@ -495,40 +495,25 @@ usb-phy@c5008000 {
status = "okay";
};
sdhci@c8000600 {
mmc@c8000600 {
cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
status = "okay";
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pci_vdd_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_1v05";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&pmic 2 0>;
enable-active-high;
};
pci_vdd_reg: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v05";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&pmic 2 0>;
enable-active-high;
};
};

View File

@@ -69,44 +69,38 @@ sound {
clock-names = "pll_a", "pll_a_out0", "mclk";
};
regulators {
vcc_24v_reg: regulator@100 {
compatible = "regulator-fixed";
reg = <100>;
regulator-name = "vcc_24v";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
regulator-always-on;
};
vcc_24v_reg: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "vcc_24v";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
regulator-always-on;
};
vdd_5v0_reg: regulator@101 {
compatible = "regulator-fixed";
reg = <101>;
regulator-name = "vdd_5v0";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_5v0_reg: regulator@101 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v0";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_3v3_reg: regulator@102 {
compatible = "regulator-fixed";
reg = <102>;
regulator-name = "vdd_3v3";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_3v3_reg: regulator@102 {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3";
vin-supply = <&vcc_24v_reg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_1v8_reg: regulator@103 {
compatible = "regulator-fixed";
reg = <103>;
regulator-name = "vdd_1v8";
vin-supply = <&vdd_3v3_reg>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vdd_1v8_reg: regulator@103 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v8";
vin-supply = <&vdd_3v3_reg>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};

View File

@@ -366,30 +366,23 @@ usb-phy@c5008000 {
status = "okay";
};
sdhci@c8000000 {
mmc@c8000000 {
status = "okay";
broken-cd;
bus-width = <4>;
};
sdhci@c8000600 {
mmc@c8000600 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@@ -408,58 +401,47 @@ poweroff {
gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
hdmi_vdd_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "avdd_hdmi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
hdmi_vdd_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "avdd_hdmi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
hdmi_pll_reg: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "avdd_hdmi_pll";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
hdmi_pll_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "avdd_hdmi_pll";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vbus_reg: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
regulator-always-on;
regulator-boot-on;
};
vbus_reg: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
regulator-always-on;
regulator-boot-on;
};
pci_clk_reg: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "pci_clk";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
pci_clk_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "pci_clk";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
pci_vdd_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "pci_vdd";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
regulator-always-on;
};
pci_vdd_reg: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "pci_vdd";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
regulator-always-on;
};
sound {

View File

@@ -554,14 +554,14 @@ usb-phy@c5008000 {
status = "okay";
};
sdhci@c8000000 {
mmc@c8000000 {
status = "okay";
power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
keep-power-in-suspend;
};
sdhci@c8000400 {
mmc@c8000400 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
@@ -569,7 +569,7 @@ sdhci@c8000400 {
bus-width = <4>;
};
sdhci@c8000600 {
mmc@c8000600 {
status = "okay";
bus-width = <8>;
non-removable;
@@ -586,17 +586,10 @@ backlight: backlight {
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-keys {
@@ -620,58 +613,47 @@ panel: panel {
ddc-i2c-bus = <&lvds_ddc>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_5v0_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_5v0_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
regulator@1 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_1v5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
regulator@2 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "vdd_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_pnl_reg: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_pnl_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_bl_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_bl_reg: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
sound {

View File

@@ -17,25 +17,27 @@ memory@0 {
reg = <0 0>;
};
iram@40000000 {
sram@40000000 {
compatible = "mmio-sram";
reg = <0x40000000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x40000000 0x40000>;
vde_pool: vde@400 {
vde_pool: sram@400 {
reg = <0x400 0x3fc00>;
pool;
};
};
host1x@50000000 {
compatible = "nvidia,tegra20-host1x", "simple-bus";
compatible = "nvidia,tegra20-host1x";
reg = <0x50000000 0x00024000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA20_CLK_HOST1X>;
clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
@@ -154,7 +156,9 @@ tvo@542c0000 {
dsi@54300000 {
compatible = "nvidia,tegra20-dsi";
reg = <0x54300000 0x00040000>;
clocks = <&tegra_car TEGRA20_CLK_DSI>;
clocks = <&tegra_car TEGRA20_CLK_DSI>,
<&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
clock-names = "dsi", "parent";
resets = <&tegra_car 48>;
reset-names = "dsi";
status = "disabled";
@@ -172,8 +176,8 @@ timer@50040600 {
intc: interrupt-controller@50041000 {
compatible = "arm,cortex-a9-gic";
reg = <0x50041000 0x1000
0x50040100 0x0100>;
reg = <0x50041000 0x1000>,
<0x50040100 0x0100>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&intc>;
@@ -272,15 +276,15 @@ gpio: gpio@6000d000 {
vde@6001a000 {
compatible = "nvidia,tegra20-vde";
reg = <0x6001a000 0x1000 /* Syntax Engine */
0x6001b000 0x1000 /* Video Bitstream Engine */
0x6001c000 0x100 /* Macroblock Engine */
0x6001c200 0x100 /* Post-processing Engine */
0x6001c400 0x100 /* Motion Compensation Engine */
0x6001c600 0x100 /* Transform Engine */
0x6001c800 0x100 /* Pixel prediction block */
0x6001ca00 0x100 /* Video DMA */
0x6001d800 0x300>; /* Video frame controls */
reg = <0x6001a000 0x1000>, /* Syntax Engine */
<0x6001b000 0x1000>, /* Video Bitstream Engine */
<0x6001c000 0x100>, /* Macroblock Engine */
<0x6001c200 0x100>, /* Post-processing Engine */
<0x6001c400 0x100>, /* Motion Compensation Engine */
<0x6001c600 0x100>, /* Transform Engine */
<0x6001c800 0x100>, /* Pixel prediction block */
<0x6001ca00 0x100>, /* Video DMA */
<0x6001d800 0x300>; /* Video frame controls */
reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
"tfe", "ppb", "vdma", "frameid";
iram = <&vde_pool>; /* IRAM region */
@@ -295,16 +299,16 @@ vde@6001a000 {
apbmisc@70000800 {
compatible = "nvidia,tegra20-apbmisc";
reg = <0x70000800 0x64 /* Chip revision */
0x70000008 0x04>; /* Strapping options */
reg = <0x70000800 0x64>, /* Chip revision */
<0x70000008 0x04>; /* Strapping options */
};
pinmux: pinmux@70000014 {
compatible = "nvidia,tegra20-pinmux";
reg = <0x70000014 0x10 /* Tri-state registers */
0x70000080 0x20 /* Mux registers */
0x700000a0 0x14 /* Pull-up/down registers */
0x70000868 0xa8>; /* Pad control registers */
reg = <0x70000014 0x10>, /* Tri-state registers */
<0x70000080 0x20>, /* Mux registers */
<0x700000a0 0x14>, /* Pull-up/down registers */
<0x70000868 0xa8>; /* Pad control registers */
};
das@70000c00 {
@@ -619,8 +623,8 @@ tegra_pmc: pmc@7000e400 {
mc: memory-controller@7000f000 {
compatible = "nvidia,tegra20-mc-gart";
reg = <0x7000f000 0x400 /* controller registers */
0x58000000 0x02000000>; /* GART aperture */
reg = <0x7000f000 0x00000400>, /* controller registers */
<0x58000000 0x02000000>; /* GART aperture */
clocks = <&tegra_car TEGRA20_CLK_MC>;
clock-names = "mc";
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
@@ -649,12 +653,12 @@ fuse@7000f800 {
pcie@80003000 {
compatible = "nvidia,tegra20-pcie";
device_type = "pci";
reg = <0x80003000 0x00000800 /* PADS registers */
0x80003800 0x00000200 /* AFI registers */
0x90000000 0x10000000>; /* configuration space */
reg = <0x80003000 0x00000800>, /* PADS registers */
<0x80003800 0x00000200>, /* AFI registers */
<0x90000000 0x10000000>; /* configuration space */
reg-names = "pads", "afi", "cs";
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH /* controller interrupt */
GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
@@ -665,11 +669,11 @@ pcie@80003000 {
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x82000000 0 0x80000000 0x80000000 0 0x00001000 /* port 0 registers */
0x82000000 0 0x80001000 0x80001000 0 0x00001000 /* port 1 registers */
0x81000000 0 0 0x82000000 0 0x00010000 /* downstream I/O */
0x82000000 0 0xa0000000 0xa0000000 0 0x08000000 /* non-prefetchable memory */
0xc2000000 0 0xa8000000 0xa8000000 0 0x18000000>; /* prefetchable memory */
ranges = <0x02000000 0 0x80000000 0x80000000 0 0x00001000>, /* port 0 registers */
<0x02000000 0 0x80001000 0x80001000 0 0x00001000>, /* port 1 registers */
<0x01000000 0 0 0x82000000 0 0x00010000>, /* downstream I/O */
<0x02000000 0 0xa0000000 0xa0000000 0 0x08000000>, /* non-prefetchable memory */
<0x42000000 0 0xa8000000 0xa8000000 0 0x18000000>; /* prefetchable memory */
clocks = <&tegra_car TEGRA20_CLK_PEX>,
<&tegra_car TEGRA20_CLK_AFI>,
@@ -726,7 +730,8 @@ usb@c5000000 {
phy1: usb-phy@c5000000 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5000000 0x4000 0xc5000000 0x4000>;
reg = <0xc5000000 0x4000>,
<0xc5000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA20_CLK_USBD>,
<&tegra_car TEGRA20_CLK_PLL_U>,
@@ -735,6 +740,7 @@ phy1: usb-phy@c5000000 {
clock-names = "reg", "pll_u", "timer", "utmi-pads";
resets = <&tegra_car 22>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,has-legacy-mode;
nvidia,hssync-start-delay = <9>;
nvidia,idle-wait-delay = <17>;
@@ -769,6 +775,7 @@ phy2: usb-phy@c5004000 {
clock-names = "reg", "pll_u", "ulpi-link";
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
status = "disabled";
};
@@ -786,7 +793,8 @@ usb@c5008000 {
phy3: usb-phy@c5008000 {
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5008000 0x4000 0xc5000000 0x4000>;
reg = <0xc5008000 0x4000>,
<0xc5000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA20_CLK_USB3>,
<&tegra_car TEGRA20_CLK_PLL_U>,
@@ -795,6 +803,7 @@ phy3: usb-phy@c5008000 {
clock-names = "reg", "pll_u", "timer", "utmi-pads";
resets = <&tegra_car 59>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <9>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -805,41 +814,45 @@ phy3: usb-phy@c5008000 {
status = "disabled";
};
sdhci@c8000000 {
mmc@c8000000 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@c8000200 {
mmc@c8000200 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC2>;
clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@c8000400 {
mmc@c8000400 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC3>;
clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@c8000600 {
mmc@c8000600 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_SDMMC4>;
clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";

View File

@@ -120,7 +120,7 @@ spi@7000dc00 {
};
/* Apalis SD1 */
sdhci@78000000 {
mmc@78000000 {
status = "okay";
bus-width = <4>;
/* SD1_CD# */
@@ -129,7 +129,7 @@ sdhci@78000000 {
};
/* Apalis MMC1 */
sdhci@78000400 {
mmc@78000400 {
status = "okay";
bus-width = <8>;
/* MMC1_CD# */

View File

@@ -121,7 +121,7 @@ spi@7000dc00 {
};
/* Apalis SD1 */
sdhci@78000000 {
mmc@78000000 {
status = "okay";
bus-width = <4>;
/* SD1_CD# */
@@ -130,7 +130,7 @@ sdhci@78000000 {
};
/* Apalis MMC1 */
sdhci@78000400 {
mmc@78000400 {
status = "okay";
bus-width = <8>;
/* MMC1_CD# */
@@ -248,8 +248,8 @@ reg_vddio_sdmmc3: regulator-vddio-sdmmc3 {
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
gpios = <&gpio TEGRA_GPIO(J, 5) GPIO_ACTIVE_HIGH>;
states = <1800000 0x0
3300000 0x1>;
states = <1800000 0x0>,
<3300000 0x1>;
startup-delay-us = <100000>;
vin-supply = <&vddio_sdmmc_1v8_reg>;
};

View File

@@ -37,7 +37,7 @@ pci@3,0 {
status = "okay";
nvidia,num-lanes = <1>;
pcie@0 {
ethernet@0,0 {
reg = <0 0 0 0 0>;
local-mac-address = [00 00 00 00 00 00];
};
@@ -855,6 +855,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
VDDA-supply = <&reg_module_3v3_audio>;
VDDD-supply = <&reg_1v8_vio>;
VDDIO-supply = <&reg_module_3v3>;
@@ -1112,7 +1113,7 @@ i2s@70080500 {
};
/* eMMC */
sdhci@78000600 {
mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;

View File

@@ -36,7 +36,7 @@ pci@3,0 {
status = "okay";
nvidia,num-lanes = <1>;
pcie@0 {
ethernet@0,0 {
reg = <0 0 0 0 0>;
local-mac-address = [00 00 00 00 00 00];
};
@@ -846,6 +846,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
VDDA-supply = <&reg_module_3v3_audio>;
VDDD-supply = <&reg_1v8_vio>;
VDDIO-supply = <&reg_module_3v3>;
@@ -1094,7 +1095,7 @@ i2s@70080500 {
};
/* eMMC */
sdhci@78000600 {
mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;

View File

@@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tegra30-asus-nexus7-grouper-maxim-pmic.dtsi"
#include "tegra30-asus-nexus7-grouper.dtsi"
/ {
model = "ASUS Google Nexus 7 (Project Nakasi / ME370T) E1565";
};

View File

@@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tegra30-asus-nexus7-grouper-ti-pmic.dtsi"
#include "tegra30-asus-nexus7-grouper.dtsi"
/ {
model = "ASUS Google Nexus 7 (Project Nakasi / ME370T) PM269";
};

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,185 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mfd/max77620.h>
/ {
i2c@7000d000 {
pmic: pmic@3c {
compatible = "maxim,max77663";
reg = <0x3c>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
#gpio-cells = <2>;
gpio-controller;
system-power-controller;
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;
max77620_default: pinmux {
gpio4 {
pins = "gpio4";
function = "32k-out1";
};
};
cpu-pwr-req {
gpio-hog;
gpios = <6 GPIO_ACTIVE_HIGH>;
input;
};
fps {
fps0 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
fps1 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
};
fps2 {
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
};
};
regulators {
in-sd0-supply = <&vdd_5v0_sys>;
in-sd1-supply = <&vdd_5v0_sys>;
in-sd2-supply = <&vdd_5v0_sys>;
in-sd3-supply = <&vdd_5v0_sys>;
in-sd4-supply = <&vdd_5v0_sys>;
in-ldo0-1-supply = <&vdd_1v35>;
in-ldo2-supply = <&vdd_3v3_sys>;
in-ldo3-5-supply = <&vdd_3v3_sys>;
in-ldo4-6-supply = <&vdd_5v0_sys>;
in-ldo7-8-supply = <&vdd_1v35>;
vdd_cpu: sd0 {
regulator-name = "vdd_cpu";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1250000>;
regulator-coupled-with = <&vdd_core>;
regulator-coupled-max-spread = <300000>;
regulator-max-step-microvolt = <100000>;
regulator-always-on;
regulator-boot-on;
nvidia,tegra-cpu-regulator;
};
vdd_core: sd1 {
regulator-name = "vdd_core";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-coupled-with = <&vdd_cpu>;
regulator-coupled-max-spread = <300000>;
regulator-max-step-microvolt = <100000>;
regulator-always-on;
regulator-boot-on;
nvidia,tegra-core-regulator;
};
vdd_1v8: sd2 {
regulator-name = "vdd_gen1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_1v35: sd3 {
regulator-name = "vdd_ddr3l_1v35";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
ldo0 {
regulator-name = "vdd_ddr_hs";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
};
ldo2 {
regulator-name = "vdd_ddr_rx";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
regulator-boot-on;
};
vcore_emmc: ldo3 {
regulator-name = "vcore_emmc";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <3100000>;
regulator-always-on;
};
ldo4 {
regulator-name = "vdd_rtc";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
};
ldo5 {
regulator-name = "vdd_camera";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo6 {
regulator-name = "vddio_sdmmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldo7 {
regulator-name = "avdd_dsi_csi";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo8 {
regulator-name = "avdd_pll";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
};
};
};
};
vdd_3v3_sys: regulator@1 {
gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
regulator@4 {
compatible = "regulator-fixed";
regulator-name = "avdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
};

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,149 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
/ {
i2c@7000d000 {
pmic: pmic@2d {
compatible = "ti,tps65911";
reg = <0x2d>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>;
ti,system-power-controller;
ti,sleep-keep-ck32k;
ti,sleep-enable;
#gpio-cells = <2>;
gpio-controller;
vcc1-supply = <&vdd_5v0_sys>;
vcc2-supply = <&vdd_5v0_sys>;
vcc3-supply = <&vdd_1v8>;
vcc4-supply = <&vdd_5v0_sys>;
vcc5-supply = <&vdd_5v0_sys>;
vcc6-supply = <&vdd2_reg>;
vcc7-supply = <&vdd_5v0_sys>;
vccio-supply = <&vdd_5v0_sys>;
regulators {
vdd1 {
regulator-name = "vddio_ddr_1v2";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
ti,regulator-ext-sleep-control = <8>;
};
vdd2_reg: vdd2 {
regulator-name = "vdd2_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
};
vdd_cpu: vddctrl {
regulator-name = "vdd_cpu,vdd_sys";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1250000>;
regulator-coupled-with = <&vdd_core>;
regulator-coupled-max-spread = <300000>;
regulator-max-step-microvolt = <100000>;
regulator-always-on;
ti,regulator-ext-sleep-control = <1>;
nvidia,tegra-cpu-regulator;
};
vdd_1v8: vio {
regulator-name = "vdd_1v8_gen";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vcore_emmc: ldo1 {
regulator-name = "vdd_pexa,vdd_pexb";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo2 {
regulator-name = "vdd_sata,avdd_plle";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
};
/* LDO3 is not connected to anything */
ldo4 {
regulator-name = "vdd_rtc";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
ldo5 {
regulator-name = "vddio_sdmmc,avdd_vdac";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo6 {
regulator-name = "avdd_dsi_csi,pwrdet_mipi";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo7 {
regulator-name = "vdd_pllm,x,u,a_p_c_s";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
ti,regulator-ext-sleep-control = <8>;
};
ldo8 {
regulator-name = "vdd_ddr_hs";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
ti,regulator-ext-sleep-control = <8>;
};
};
};
vdd_core: core-regulator@60 {
compatible = "ti,tps62361";
reg = <0x60>;
regulator-name = "tps62361-vout";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-coupled-with = <&vdd_cpu>;
regulator-coupled-max-spread = <300000>;
regulator-max-step-microvolt = <100000>;
regulator-boot-on;
regulator-always-on;
ti,enable-vout-discharge;
ti,vsel0-state-high;
ti,vsel1-state-high;
nvidia,tegra-core-regulator;
};
};
vdd_3v3_sys: regulator@1 {
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};

View File

@@ -0,0 +1,149 @@
// SPDX-License-Identifier: GPL-2.0
#include "tegra30-asus-nexus7-grouper-common.dtsi"
#include "tegra30-asus-nexus7-grouper-memory-timings.dtsi"
/ {
compatible = "asus,grouper", "nvidia,tegra30";
display-panel {
panel-timing {
clock-frequency = <68000000>;
hactive = <800>;
vactive = <1280>;
hfront-porch = <24>;
hback-porch = <32>;
hsync-len = <24>;
vsync-len = <1>;
vfront-porch = <5>;
vback-porch = <32>;
};
};
pinmux@70000868 {
state_default: pinmux {
lcd_dc1_pd2 {
nvidia,pins = "lcd_dc1_pd2";
nvidia,function = "displaya";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
lcd_pwr2_pc6 {
nvidia,pins = "lcd_pwr2_pc6";
nvidia,function = "displaya";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
spi2_cs2_n_pw3 {
nvidia,pins = "spi2_cs2_n_pw3";
nvidia,function = "spi2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
spi1_sck_px5 {
nvidia,pins = "spi1_sck_px5";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pu5 {
nvidia,pins = "pu5";
nvidia,function = "pwm2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
spi1_miso_px7 {
nvidia,pins = "spi1_miso_px7";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
spi2_mosi_px0 {
nvidia,pins = "spi2_mosi_px0";
nvidia,function = "spi2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
kb_row7_pr7 {
nvidia,pins = "kb_row7_pr7";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
pu3 {
nvidia,pins = "pu3";
nvidia,function = "rsvd4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pu4 {
nvidia,pins = "pu4";
nvidia,function = "pwm1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
kb_row15_ps7 {
nvidia,pins = "kb_row15_ps7";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
kb_row3_pr3 {
nvidia,pins = "kb_row3_pr3";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
kb_row13_ps5 {
nvidia,pins = "kb_row13_ps5";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
gmi_wp_n_pc7 {
nvidia,pins = "gmi_wp_n_pc7",
"gmi_wait_pi7",
"gmi_cs4_n_pk2",
"gmi_cs3_n_pk4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
gmi_cs6_n_pi3 {
nvidia,pins = "gmi_cs6_n_pi3";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
};
};
i2c@7000c500 {
nfc@28 {
compatible = "nxp,pn544-i2c";
reg = <0x28>;
clock-frequency = <100000>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_EDGE_RISING>;
enable-gpios = <&gpio TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
firmware-gpios = <&gpio TEGRA_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
};
};
};

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// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tegra30-asus-nexus7-grouper-maxim-pmic.dtsi"
#include "tegra30-asus-nexus7-tilapia.dtsi"
/ {
model = "ASUS Google Nexus 7 (Project Bach / ME370TG) E1565";
};

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// SPDX-License-Identifier: GPL-2.0
#include "tegra30-asus-nexus7-grouper-memory-timings.dtsi"
/ {
/*
* Tilapia's memory timings are pretty much the same as the Grouper's
* ones. There are few minor tunings made for a higher clock rates,
* these differentiating timings are overridden here for Tilapia.
*/
memory-controller@7000f400 {
emc-timings-0 {
timing-667000000 {
clock-frequency = <667000000>;
nvidia,emc-auto-cal-interval = <0x001fffff>;
nvidia,emc-mode-1 = <0x80100002>;
nvidia,emc-mode-2 = <0x80200018>;
nvidia,emc-mode-reset = <0x80000b71>;
nvidia,emc-zcal-cnt-long = <0x00000040>;
nvidia,emc-cfg-periodic-qrst;
nvidia,emc-configuration = <
0x0000001f /* EMC_RC */
0x00000069 /* EMC_RFC */
0x00000017 /* EMC_RAS */
0x00000007 /* EMC_RP */
0x00000005 /* EMC_R2W */
0x0000000c /* EMC_W2R */
0x00000003 /* EMC_R2P */
0x00000011 /* EMC_W2P */
0x00000007 /* EMC_RD_RCD */
0x00000007 /* EMC_WR_RCD */
0x00000002 /* EMC_RRD */
0x00000001 /* EMC_REXT */
0x00000000 /* EMC_WEXT */
0x00000007 /* EMC_WDV */
0x0000000b /* EMC_QUSE */
0x00000009 /* EMC_QRST */
0x0000000b /* EMC_QSAFE */
0x00000011 /* EMC_RDV */
0x00001412 /* EMC_REFRESH */
0x00000000 /* EMC_BURST_REFRESH_NUM */
0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */
0x00000002 /* EMC_PDEX2WR */
0x0000000e /* EMC_PDEX2RD */
0x00000001 /* EMC_PCHG2PDEN */
0x00000000 /* EMC_ACT2PDEN */
0x0000000c /* EMC_AR2PDEN */
0x00000016 /* EMC_RW2PDEN */
0x00000072 /* EMC_TXSR */
0x00000200 /* EMC_TXSRDLL */
0x00000005 /* EMC_TCKE */
0x00000015 /* EMC_TFAW */
0x00000000 /* EMC_TRPAB */
0x00000006 /* EMC_TCLKSTABLE */
0x00000007 /* EMC_TCLKSTOP */
0x00001453 /* EMC_TREFBW */
0x0000000c /* EMC_QUSE_EXTRA */
0x00000004 /* EMC_FBIO_CFG6 */
0x00000000 /* EMC_ODT_WRITE */
0x00000000 /* EMC_ODT_READ */
0x00005088 /* EMC_FBIO_CFG5 */
0xf00b0191 /* EMC_CFG_DIG_DLL */
0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
0x00000008 /* EMC_DLL_XFORM_DQS0 */
0x00000008 /* EMC_DLL_XFORM_DQS1 */
0x00000008 /* EMC_DLL_XFORM_DQS2 */
0x00000008 /* EMC_DLL_XFORM_DQS3 */
0x0000000a /* EMC_DLL_XFORM_DQS4 */
0x0000000a /* EMC_DLL_XFORM_DQS5 */
0x0000000a /* EMC_DLL_XFORM_DQS6 */
0x0000000a /* EMC_DLL_XFORM_DQS7 */
0x00000000 /* EMC_DLL_XFORM_QUSE0 */
0x00000000 /* EMC_DLL_XFORM_QUSE1 */
0x00000000 /* EMC_DLL_XFORM_QUSE2 */
0x00000000 /* EMC_DLL_XFORM_QUSE3 */
0x00000000 /* EMC_DLL_XFORM_QUSE4 */
0x00000000 /* EMC_DLL_XFORM_QUSE5 */
0x00000000 /* EMC_DLL_XFORM_QUSE6 */
0x00000000 /* EMC_DLL_XFORM_QUSE7 */
0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
0x0000000c /* EMC_DLL_XFORM_DQ0 */
0x0000000c /* EMC_DLL_XFORM_DQ1 */
0x0000000c /* EMC_DLL_XFORM_DQ2 */
0x0000000c /* EMC_DLL_XFORM_DQ3 */
0x000002a0 /* EMC_XM2CMDPADCTRL */
0x0800013d /* EMC_XM2DQSPADCTRL2 */
0x22220000 /* EMC_XM2DQPADCTRL2 */
0x77fff884 /* EMC_XM2CLKPADCTRL */
0x01f1f501 /* EMC_XM2COMPPADCTRL */
0x07077404 /* EMC_XM2VTTGENPADCTRL */
0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
0x080001e8 /* EMC_XM2QUSEPADCTRL */
0x08000021 /* EMC_XM2DQSPADCTRL3 */
0x00000802 /* EMC_CTT_TERM_CTRL */
0x00020000 /* EMC_ZCAL_INTERVAL */
0x00000100 /* EMC_ZCAL_WAIT_CNT */
0x0156000c /* EMC_MRS_WAIT_CNT */
0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
0x00000000 /* EMC_CTT */
0x00000000 /* EMC_CTT_DURATION */
0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */
0xe8000000 /* EMC_FBIO_SPARE */
0xff00ff49 /* EMC_CFG_RSV */
>;
};
};
emc-timings-1 {
timing-333500000 {
clock-frequency = <333500000>;
nvidia,emc-auto-cal-interval = <0x001fffff>;
nvidia,emc-mode-1 = <0x80100002>;
nvidia,emc-mode-2 = <0x80200000>;
nvidia,emc-mode-reset = <0x80000321>;
nvidia,emc-zcal-cnt-long = <0x00000040>;
nvidia,emc-configuration = <
0x0000000f /* EMC_RC */
0x00000034 /* EMC_RFC */
0x0000000a /* EMC_RAS */
0x00000003 /* EMC_RP */
0x00000003 /* EMC_R2W */
0x00000008 /* EMC_W2R */
0x00000002 /* EMC_R2P */
0x00000009 /* EMC_W2P */
0x00000003 /* EMC_RD_RCD */
0x00000003 /* EMC_WR_RCD */
0x00000002 /* EMC_RRD */
0x00000001 /* EMC_REXT */
0x00000000 /* EMC_WEXT */
0x00000004 /* EMC_WDV */
0x00000006 /* EMC_QUSE */
0x00000004 /* EMC_QRST */
0x0000000a /* EMC_QSAFE */
0x0000000c /* EMC_RDV */
0x000009e9 /* EMC_REFRESH */
0x00000000 /* EMC_BURST_REFRESH_NUM */
0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */
0x00000001 /* EMC_PDEX2WR */
0x00000008 /* EMC_PDEX2RD */
0x00000001 /* EMC_PCHG2PDEN */
0x00000000 /* EMC_ACT2PDEN */
0x00000007 /* EMC_AR2PDEN */
0x0000000e /* EMC_RW2PDEN */
0x00000039 /* EMC_TXSR */
0x00000200 /* EMC_TXSRDLL */
0x00000004 /* EMC_TCKE */
0x0000000a /* EMC_TFAW */
0x00000000 /* EMC_TRPAB */
0x00000004 /* EMC_TCLKSTABLE */
0x00000005 /* EMC_TCLKSTOP */
0x00000a2a /* EMC_TREFBW */
0x00000000 /* EMC_QUSE_EXTRA */
0x00000004 /* EMC_FBIO_CFG6 */
0x00000000 /* EMC_ODT_WRITE */
0x00000000 /* EMC_ODT_READ */
0x00007088 /* EMC_FBIO_CFG5 */
0x002600a4 /* EMC_CFG_DIG_DLL */
0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
0x0003c000 /* EMC_DLL_XFORM_DQS0 */
0x0003c000 /* EMC_DLL_XFORM_DQS1 */
0x0003c000 /* EMC_DLL_XFORM_DQS2 */
0x0003c000 /* EMC_DLL_XFORM_DQS3 */
0x00014000 /* EMC_DLL_XFORM_DQS4 */
0x00014000 /* EMC_DLL_XFORM_DQS5 */
0x00014000 /* EMC_DLL_XFORM_DQS6 */
0x00014000 /* EMC_DLL_XFORM_DQS7 */
0x00000000 /* EMC_DLL_XFORM_QUSE0 */
0x00000000 /* EMC_DLL_XFORM_QUSE1 */
0x00000000 /* EMC_DLL_XFORM_QUSE2 */
0x00000000 /* EMC_DLL_XFORM_QUSE3 */
0x00000000 /* EMC_DLL_XFORM_QUSE4 */
0x00000000 /* EMC_DLL_XFORM_QUSE5 */
0x00000000 /* EMC_DLL_XFORM_QUSE6 */
0x00000000 /* EMC_DLL_XFORM_QUSE7 */
0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
0x00048000 /* EMC_DLL_XFORM_DQ0 */
0x00048000 /* EMC_DLL_XFORM_DQ1 */
0x00048000 /* EMC_DLL_XFORM_DQ2 */
0x00048000 /* EMC_DLL_XFORM_DQ3 */
0x000002a0 /* EMC_XM2CMDPADCTRL */
0x0800013d /* EMC_XM2DQSPADCTRL2 */
0x00000000 /* EMC_XM2DQPADCTRL2 */
0x77fff884 /* EMC_XM2CLKPADCTRL */
0x01f1f508 /* EMC_XM2COMPPADCTRL */
0x05057404 /* EMC_XM2VTTGENPADCTRL */
0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
0x080001e8 /* EMC_XM2QUSEPADCTRL */
0x08000021 /* EMC_XM2DQSPADCTRL3 */
0x00000802 /* EMC_CTT_TERM_CTRL */
0x00020000 /* EMC_ZCAL_INTERVAL */
0x00000100 /* EMC_ZCAL_WAIT_CNT */
0x018b000c /* EMC_MRS_WAIT_CNT */
0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
0x00000000 /* EMC_CTT */
0x00000000 /* EMC_CTT_DURATION */
0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */
0xe8000000 /* EMC_FBIO_SPARE */
0xff00ff89 /* EMC_CFG_RSV */
>;
};
timing-667000000 {
clock-frequency = <667000000>;
nvidia,emc-auto-cal-interval = <0x001fffff>;
nvidia,emc-mode-1 = <0x80100002>;
nvidia,emc-mode-2 = <0x80200018>;
nvidia,emc-mode-reset = <0x80000b71>;
nvidia,emc-zcal-cnt-long = <0x00000040>;
nvidia,emc-cfg-periodic-qrst;
nvidia,emc-configuration = <
0x00000020 /* EMC_RC */
0x0000006a /* EMC_RFC */
0x00000017 /* EMC_RAS */
0x00000007 /* EMC_RP */
0x00000005 /* EMC_R2W */
0x0000000c /* EMC_W2R */
0x00000003 /* EMC_R2P */
0x00000011 /* EMC_W2P */
0x00000007 /* EMC_RD_RCD */
0x00000007 /* EMC_WR_RCD */
0x00000002 /* EMC_RRD */
0x00000001 /* EMC_REXT */
0x00000000 /* EMC_WEXT */
0x00000007 /* EMC_WDV */
0x0000000a /* EMC_QUSE */
0x00000009 /* EMC_QRST */
0x0000000b /* EMC_QSAFE */
0x00000011 /* EMC_RDV */
0x00001412 /* EMC_REFRESH */
0x00000000 /* EMC_BURST_REFRESH_NUM */
0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */
0x00000002 /* EMC_PDEX2WR */
0x0000000e /* EMC_PDEX2RD */
0x00000001 /* EMC_PCHG2PDEN */
0x00000000 /* EMC_ACT2PDEN */
0x0000000c /* EMC_AR2PDEN */
0x00000016 /* EMC_RW2PDEN */
0x00000072 /* EMC_TXSR */
0x00000200 /* EMC_TXSRDLL */
0x00000005 /* EMC_TCKE */
0x00000015 /* EMC_TFAW */
0x00000000 /* EMC_TRPAB */
0x00000006 /* EMC_TCLKSTABLE */
0x00000007 /* EMC_TCLKSTOP */
0x00001453 /* EMC_TREFBW */
0x0000000b /* EMC_QUSE_EXTRA */
0x00000006 /* EMC_FBIO_CFG6 */
0x00000000 /* EMC_ODT_WRITE */
0x00000000 /* EMC_ODT_READ */
0x00005088 /* EMC_FBIO_CFG5 */
0xf00b0191 /* EMC_CFG_DIG_DLL */
0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
0x00000008 /* EMC_DLL_XFORM_DQS0 */
0x00000008 /* EMC_DLL_XFORM_DQS1 */
0x00000008 /* EMC_DLL_XFORM_DQS2 */
0x00000008 /* EMC_DLL_XFORM_DQS3 */
0x0000000a /* EMC_DLL_XFORM_DQS4 */
0x0000000a /* EMC_DLL_XFORM_DQS5 */
0x0000000a /* EMC_DLL_XFORM_DQS6 */
0x0000000a /* EMC_DLL_XFORM_DQS7 */
0x00018000 /* EMC_DLL_XFORM_QUSE0 */
0x00018000 /* EMC_DLL_XFORM_QUSE1 */
0x00018000 /* EMC_DLL_XFORM_QUSE2 */
0x00018000 /* EMC_DLL_XFORM_QUSE3 */
0x00000000 /* EMC_DLL_XFORM_QUSE4 */
0x00000000 /* EMC_DLL_XFORM_QUSE5 */
0x00000000 /* EMC_DLL_XFORM_QUSE6 */
0x00000000 /* EMC_DLL_XFORM_QUSE7 */
0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
0x0000000a /* EMC_DLL_XFORM_DQ0 */
0x0000000a /* EMC_DLL_XFORM_DQ1 */
0x0000000a /* EMC_DLL_XFORM_DQ2 */
0x0000000a /* EMC_DLL_XFORM_DQ3 */
0x000002a0 /* EMC_XM2CMDPADCTRL */
0x0800013d /* EMC_XM2DQSPADCTRL2 */
0x22220000 /* EMC_XM2DQPADCTRL2 */
0x77fff884 /* EMC_XM2CLKPADCTRL */
0x01f1f501 /* EMC_XM2COMPPADCTRL */
0x07077404 /* EMC_XM2VTTGENPADCTRL */
0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
0x080001e8 /* EMC_XM2QUSEPADCTRL */
0x0c000021 /* EMC_XM2DQSPADCTRL3 */
0x00000802 /* EMC_CTT_TERM_CTRL */
0x00020000 /* EMC_ZCAL_INTERVAL */
0x00000100 /* EMC_ZCAL_WAIT_CNT */
0x0155000c /* EMC_MRS_WAIT_CNT */
0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
0x00000000 /* EMC_CTT */
0x00000000 /* EMC_CTT_DURATION */
0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */
0xe8000000 /* EMC_FBIO_SPARE */
0xff00ff49 /* EMC_CFG_RSV */
>;
};
};
};
};

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@@ -0,0 +1,235 @@
// SPDX-License-Identifier: GPL-2.0
#include "tegra30-asus-nexus7-grouper-common.dtsi"
#include "tegra30-asus-nexus7-tilapia-memory-timings.dtsi"
/ {
compatible = "asus,tilapia", "asus,grouper", "nvidia,tegra30";
display-panel {
enable-gpios = <&gpio TEGRA_GPIO(V, 6) GPIO_ACTIVE_HIGH>;
panel-timing {
clock-frequency = <81750000>;
hactive = <800>;
vactive = <1280>;
hfront-porch = <64>;
hback-porch = <128>;
hsync-len = <64>;
vsync-len = <1>;
vfront-porch = <5>;
vback-porch = <2>;
};
};
gpio@6000d000 {
init-mode-3g {
gpio-hog;
gpios = <TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(P, 1) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(X, 5) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(U, 5) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(EE, 1) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(Y, 2) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(Y, 3) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(U, 3) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(N, 1) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(N, 2) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(N, 0) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(N, 3) GPIO_ACTIVE_HIGH>;
output-low;
};
};
pinmux@70000868 {
state_default: pinmux {
lcd_dc1_pd2 {
nvidia,pins = "lcd_dc1_pd2";
nvidia,function = "displaya";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
lcd_pwr2_pc6 {
nvidia,pins = "lcd_pwr2_pc6";
nvidia,function = "displaya";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
spi2_cs2_n_pw3 {
nvidia,pins = "spi2_cs2_n_pw3";
nvidia,function = "spi2";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
dap3_din_pp1 {
nvidia,pins = "dap3_din_pp1";
nvidia,function = "i2s2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
spi1_sck_px5 {
nvidia,pins = "spi1_sck_px5";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pu5 {
nvidia,pins = "pu5";
nvidia,function = "pwm2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
spi1_miso_px7 {
nvidia,pins = "spi1_miso_px7";
nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
spi2_mosi_px0 {
nvidia,pins = "spi2_mosi_px0";
nvidia,function = "spi2";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
clk3_req_pee1 {
nvidia,pins = "clk3_req_pee1";
nvidia,function = "dev3";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
ulpi_nxt_py2 {
nvidia,pins = "ulpi_nxt_py2";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
ulpi_stp_py3 {
nvidia,pins = "ulpi_stp_py3";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
kb_row7_pr7 {
nvidia,pins = "kb_row7_pr7";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
pu4 {
nvidia,pins = "pu4";
nvidia,function = "pwm1";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
pu3 {
nvidia,pins = "pu3";
nvidia,function = "rsvd4";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
kb_row15_ps7 {
nvidia,pins = "kb_row15_ps7";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
dap3_sclk_pp3 {
nvidia,pins = "dap3_sclk_pp3";
nvidia,function = "i2s2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
kb_row3_pr3 {
nvidia,pins = "kb_row3_pr3",
"kb_row13_ps5";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
kb_row13_ps5 {
nvidia,pins = "kb_row13_ps5";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
gmi_wp_n_pc7 {
nvidia,pins = "gmi_wp_n_pc7",
"gmi_wait_pi7",
"gmi_cs4_n_pk2",
"gmi_cs3_n_pk4";
nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
gmi_cs6_n_pi3 {
nvidia,pins = "gmi_cs6_n_pi3";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
};
};
i2c@7000c500 {
proximity-sensor@28 {
compatible = "microchip,cap1106";
reg = <0x28>;
/*
* Binding doesn't support specifying linux,input-type
* and this results in unwanted key-presses handled by
* applications, hence keep it disabled for now.
*/
status = "disabled";
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(R, 3) IRQ_TYPE_LEVEL_HIGH>;
linux,keycodes = <KEY_RESERVED>,
<KEY_RESERVED>,
<KEY_RESERVED>,
<KEY_RESERVED>,
<KEY_RESERVED>,
<SW_FRONT_PROXIMITY>;
};
nfc@2a {
compatible = "nxp,pn544-i2c";
reg = <0x2a>;
clock-frequency = <100000>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
enable-gpios = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
firmware-gpios = <&gpio TEGRA_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
};
};
};

View File

@@ -1922,7 +1922,7 @@ i2s@70080400 {
};
};
sdhci@78000000 {
mmc@78000000 {
status = "okay";
vqmmc-supply = <&ldo5_reg>;
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
@@ -1931,7 +1931,7 @@ sdhci@78000000 {
bus-width = <4>;
};
sdhci@78000600 {
mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
@@ -1965,17 +1965,10 @@ usb-phy@7d008000 {
status = "okay";
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
gpio-leds {
@@ -1991,118 +1984,103 @@ gpled2 {
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_5v_in_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v_in";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_5v_in_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_5v_in";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
chargepump_5v_reg: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "chargepump_5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
enable-active-high;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
chargepump_5v_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "chargepump_5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
enable-active-high;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
ddr_reg: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
vin-supply = <&vdd_5v_in_reg>;
};
ddr_reg: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
vin-supply = <&vdd_5v_in_reg>;
};
vdd_5v_sata_reg: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v_sata";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
vin-supply = <&vdd_5v_in_reg>;
};
vdd_5v_sata_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd_5v_sata";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
vin-supply = <&vdd_5v_in_reg>;
};
usb1_vbus_reg: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v_in_reg>;
};
usb1_vbus_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v_in_reg>;
};
usb3_vbus_reg: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "usb3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v_in_reg>;
};
usb3_vbus_reg: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "usb3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v_in_reg>;
};
sys_3v3_reg: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "sys_3v3,vdd_3v3_alw";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
vin-supply = <&vdd_5v_in_reg>;
};
sys_3v3_reg: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "sys_3v3,vdd_3v3_alw";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
vin-supply = <&vdd_5v_in_reg>;
};
sys_3v3_pexs_reg: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "sys_3v3_pexs";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
sys_3v3_pexs_reg: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "sys_3v3_pexs";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_5v0_hdmi: regulator@8 {
compatible = "regulator-fixed";
reg = <8>;
regulator-name = "+VDD_5V_HDMI";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&sys_3v3_reg>;
};
vdd_5v0_hdmi: regulator@8 {
compatible = "regulator-fixed";
regulator-name = "+VDD_5V_HDMI";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&sys_3v3_reg>;
};
sound {

View File

@@ -9,87 +9,75 @@ / {
model = "NVIDIA Tegra30 Cardhu A02 evaluation board";
compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30";
sdhci@78000400 {
mmc@78000400 {
status = "okay";
power-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
keep-power-in-suspend;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
ddr_reg: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
};
ddr_reg: regulator@100 {
compatible = "regulator-fixed";
reg = <100>;
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
};
sys_3v3_reg: regulator@101 {
compatible = "regulator-fixed";
regulator-name = "sys_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
};
sys_3v3_reg: regulator@101 {
compatible = "regulator-fixed";
reg = <101>;
regulator-name = "sys_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
};
usb1_vbus_reg: regulator@102 {
compatible = "regulator-fixed";
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
usb1_vbus_reg: regulator@102 {
compatible = "regulator-fixed";
reg = <102>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
usb3_vbus_reg: regulator@103 {
compatible = "regulator-fixed";
regulator-name = "usb3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
usb3_vbus_reg: regulator@103 {
compatible = "regulator-fixed";
reg = <103>;
regulator-name = "usb3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
vdd_5v0_reg: regulator@104 {
compatible = "regulator-fixed";
regulator-name = "5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
};
vdd_5v0_reg: regulator@104 {
compatible = "regulator-fixed";
reg = <104>;
regulator-name = "5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
};
vdd_bl_reg: regulator@105 {
compatible = "regulator-fixed";
reg = <105>;
regulator-name = "vdd_bl";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_HIGH>;
};
vdd_bl_reg: regulator@105 {
compatible = "regulator-fixed";
regulator-name = "vdd_bl";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_HIGH>;
};
};

View File

@@ -11,99 +11,86 @@ / {
model = "NVIDIA Tegra30 Cardhu A04 (A05, A06, A07) evaluation board";
compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
sdhci@78000400 {
mmc@78000400 {
status = "okay";
power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
keep-power-in-suspend;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
ddr_reg: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "ddr";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
};
ddr_reg: regulator@100 {
compatible = "regulator-fixed";
regulator-name = "ddr";
reg = <100>;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
};
sys_3v3_reg: regulator@101 {
compatible = "regulator-fixed";
regulator-name = "sys_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
};
sys_3v3_reg: regulator@101 {
compatible = "regulator-fixed";
reg = <101>;
regulator-name = "sys_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
};
usb1_vbus_reg: regulator@102 {
compatible = "regulator-fixed";
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
usb1_vbus_reg: regulator@102 {
compatible = "regulator-fixed";
reg = <102>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
usb3_vbus_reg: regulator@103 {
compatible = "regulator-fixed";
regulator-name = "usb3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
usb3_vbus_reg: regulator@103 {
compatible = "regulator-fixed";
reg = <103>;
regulator-name = "usb3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
vdd_5v0_reg: regulator@104 {
compatible = "regulator-fixed";
regulator-name = "5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&pmic 8 GPIO_ACTIVE_HIGH>;
};
vdd_5v0_reg: regulator@104 {
compatible = "regulator-fixed";
reg = <104>;
regulator-name = "5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&pmic 8 GPIO_ACTIVE_HIGH>;
};
vdd_bl_reg: regulator@105 {
compatible = "regulator-fixed";
regulator-name = "vdd_bl";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
};
vdd_bl_reg: regulator@105 {
compatible = "regulator-fixed";
reg = <105>;
regulator-name = "vdd_bl";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
};
vdd_bl2_reg: regulator@106 {
compatible = "regulator-fixed";
reg = <106>;
regulator-name = "vdd_bl2";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
};
vdd_bl2_reg: regulator@106 {
compatible = "regulator-fixed";
regulator-name = "vdd_bl2";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
};
i2c@7000d000 {

View File

@@ -384,7 +384,7 @@ i2s@70080400 {
};
};
sdhci@78000000 {
mmc@78000000 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
@@ -392,7 +392,7 @@ sdhci@78000000 {
bus-width = <4>;
};
sdhci@78000600 {
mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;
@@ -418,17 +418,10 @@ backlight: backlight {
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: clock@0 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
panel: panel {
@@ -441,158 +434,139 @@ panel: panel {
backlight = <&backlight>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_ac_bat_reg: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd_ac_bat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_ac_bat_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_ac_bat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
cam_1v8_reg: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "cam_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
vin-supply = <&vio_reg>;
};
cam_1v8_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "cam_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
vin-supply = <&vio_reg>;
};
cp_5v_reg: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "cp_5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
enable-active-high;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
cp_5v_reg: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "cp_5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
enable-active-high;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
emmc_3v3_reg: regulator@3 {
compatible = "regulator-fixed";
regulator-name = "emmc_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
emmc_3v3_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "emmc_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
modem_3v3_reg: regulator@4 {
compatible = "regulator-fixed";
regulator-name = "modem_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
};
modem_3v3_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "modem_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
};
pex_hvdd_3v3_reg: regulator@5 {
compatible = "regulator-fixed";
regulator-name = "pex_hvdd_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
pex_hvdd_3v3_reg: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "pex_hvdd_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_cam1_ldo_reg: regulator@6 {
compatible = "regulator-fixed";
regulator-name = "vdd_cam1_ldo";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_cam1_ldo_reg: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "vdd_cam1_ldo";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_cam2_ldo_reg: regulator@7 {
compatible = "regulator-fixed";
regulator-name = "vdd_cam2_ldo";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_cam2_ldo_reg: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "vdd_cam2_ldo";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_cam3_ldo_reg: regulator@8 {
compatible = "regulator-fixed";
regulator-name = "vdd_cam3_ldo";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_cam3_ldo_reg: regulator@8 {
compatible = "regulator-fixed";
reg = <8>;
regulator-name = "vdd_cam3_ldo";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_com_reg: regulator@9 {
compatible = "regulator-fixed";
regulator-name = "vdd_com";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_com_reg: regulator@9 {
compatible = "regulator-fixed";
reg = <9>;
regulator-name = "vdd_com";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_fuse_3v3_reg: regulator@10 {
compatible = "regulator-fixed";
regulator-name = "vdd_fuse_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_fuse_3v3_reg: regulator@10 {
compatible = "regulator-fixed";
reg = <10>;
regulator-name = "vdd_fuse_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_pnl1_reg: regulator@11 {
compatible = "regulator-fixed";
regulator-name = "vdd_pnl1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_pnl1_reg: regulator@11 {
compatible = "regulator-fixed";
reg = <11>;
regulator-name = "vdd_pnl1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
vdd_vid_reg: regulator@12 {
compatible = "regulator-fixed";
reg = <12>;
regulator-name = "vddio_vid";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
vdd_vid_reg: regulator@12 {
compatible = "regulator-fixed";
regulator-name = "vddio_vid";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
sound {

View File

@@ -98,7 +98,7 @@ can@0 {
};
/* SD/MMC */
sdhci@78000200 {
mmc@78000200 {
status = "okay";
bus-width = <4>;
cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */

View File

@@ -527,7 +527,7 @@ spi2-cs1-n-pw2 {
};
/* Colibri USBH_OC */
spi2-cs2-n-pw3, {
spi2-cs2-n-pw3 {
nvidia,pins = "spi2_cs2_n_pw3";
nvidia,function = "spi2_alt";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
@@ -723,6 +723,7 @@ i2c@7000d000 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
VDDA-supply = <&reg_module_3v3_audio>;
VDDD-supply = <&reg_1v8_vio>;
VDDIO-supply = <&reg_module_3v3>;
@@ -933,7 +934,7 @@ i2s@70080500 {
};
/* eMMC */
sdhci@78000600 {
mmc@78000600 {
status = "okay";
bus-width = <8>;
non-removable;

View File

@@ -2,799 +2,799 @@
/ {
cpu0_opp_table: cpu_opp_table0 {
opp@51000000_800 {
opp@51000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
opp@51000000_850 {
opp@51000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@51000000_912 {
opp@51000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
opp@102000000_800 {
opp@102000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
opp@102000000_850 {
opp@102000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@102000000_912 {
opp@102000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
opp@204000000_800 {
opp@204000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
opp@204000000_850 {
opp@204000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@204000000_912 {
opp@204000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
opp@312000000_850 {
opp@312000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@312000000_912 {
opp@312000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
opp@340000000_800 {
opp@340000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
opp@340000000_850 {
opp@340000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@370000000_800 {
opp@370000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
opp@456000000_850 {
opp@456000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@456000000_912 {
opp@456000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
opp@475000000_800 {
opp@475000000,800 {
opp-microvolt = <800000 800000 1250000>;
};
opp@475000000_850 {
opp@475000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@475000000_850_0_1 {
opp@475000000,850,0,1 {
opp-microvolt = <850000 850000 1250000>;
};
opp@475000000_850_0_4 {
opp@475000000,850,0,4 {
opp-microvolt = <850000 850000 1250000>;
};
opp@475000000_850_0_7 {
opp@475000000,850,0,7 {
opp-microvolt = <850000 850000 1250000>;
};
opp@475000000_850_0_8 {
opp@475000000,850,0,8 {
opp-microvolt = <850000 850000 1250000>;
};
opp@608000000_850 {
opp@608000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@608000000_912 {
opp@608000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
opp@620000000_850 {
opp@620000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850 {
opp@640000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_1_1 {
opp@640000000,850,1,1 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_2_1 {
opp@640000000,850,2,1 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_3_1 {
opp@640000000,850,3,1 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_1_4 {
opp@640000000,850,1,4 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_2_4 {
opp@640000000,850,2,4 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_3_4 {
opp@640000000,850,3,4 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_1_7 {
opp@640000000,850,1,7 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_2_7 {
opp@640000000,850,2,7 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_3_7 {
opp@640000000,850,3,7 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_4_7 {
opp@640000000,850,4,7 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_1_8 {
opp@640000000,850,1,8 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_2_8 {
opp@640000000,850,2,8 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_3_8 {
opp@640000000,850,3,8 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_850_4_8 {
opp@640000000,850,4,8 {
opp-microvolt = <850000 850000 1250000>;
};
opp@640000000_900 {
opp@640000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_850 {
opp@760000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_850_3_1 {
opp@760000000,850,3,1 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_850_3_2 {
opp@760000000,850,3,2 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_850_3_3 {
opp@760000000,850,3,3 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_850_3_4 {
opp@760000000,850,3,4 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_850_3_7 {
opp@760000000,850,3,7 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_850_4_7 {
opp@760000000,850,4,7 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_850_3_8 {
opp@760000000,850,3,8 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_850_4_8 {
opp@760000000,850,4,8 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_850_0_10 {
opp@760000000,850,0,10 {
opp-microvolt = <850000 850000 1250000>;
};
opp@760000000_900 {
opp@760000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_1_1 {
opp@760000000,900,1,1 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_2_1 {
opp@760000000,900,2,1 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_1_2 {
opp@760000000,900,1,2 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_2_2 {
opp@760000000,900,2,2 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_1_3 {
opp@760000000,900,1,3 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_2_3 {
opp@760000000,900,2,3 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_1_4 {
opp@760000000,900,1,4 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_2_4 {
opp@760000000,900,2,4 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_1_7 {
opp@760000000,900,1,7 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_2_7 {
opp@760000000,900,2,7 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_1_8 {
opp@760000000,900,1,8 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_900_2_8 {
opp@760000000,900,2,8 {
opp-microvolt = <900000 900000 1250000>;
};
opp@760000000_912 {
opp@760000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
opp@760000000_975 {
opp@760000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
opp@816000000_850 {
opp@816000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@816000000_912 {
opp@816000000,912 {
opp-microvolt = <912000 912000 1250000>;
};
opp@860000000_850 {
opp@860000000,850 {
opp-microvolt = <850000 850000 1250000>;
};
opp@860000000_900 {
opp@860000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_2_1 {
opp@860000000,900,2,1 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_3_1 {
opp@860000000,900,3,1 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_2_2 {
opp@860000000,900,2,2 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_3_2 {
opp@860000000,900,3,2 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_2_3 {
opp@860000000,900,2,3 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_3_3 {
opp@860000000,900,3,3 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_2_4 {
opp@860000000,900,2,4 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_3_4 {
opp@860000000,900,3,4 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_2_7 {
opp@860000000,900,2,7 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_3_7 {
opp@860000000,900,3,7 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_4_7 {
opp@860000000,900,4,7 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_2_8 {
opp@860000000,900,2,8 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_3_8 {
opp@860000000,900,3,8 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_900_4_8 {
opp@860000000,900,4,8 {
opp-microvolt = <900000 900000 1250000>;
};
opp@860000000_975 {
opp@860000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
opp@860000000_975_1_1 {
opp@860000000,975,1,1 {
opp-microvolt = <975000 975000 1250000>;
};
opp@860000000_975_1_2 {
opp@860000000,975,1,2 {
opp-microvolt = <975000 975000 1250000>;
};
opp@860000000_975_1_3 {
opp@860000000,975,1,3 {
opp-microvolt = <975000 975000 1250000>;
};
opp@860000000_975_1_4 {
opp@860000000,975,1,4 {
opp-microvolt = <975000 975000 1250000>;
};
opp@860000000_975_1_7 {
opp@860000000,975,1,7 {
opp-microvolt = <975000 975000 1250000>;
};
opp@860000000_975_1_8 {
opp@860000000,975,1,8 {
opp-microvolt = <975000 975000 1250000>;
};
opp@860000000_1000 {
opp@860000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@910000000_900 {
opp@910000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
opp@1000000000_900 {
opp@1000000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
opp@1000000000_975 {
opp@1000000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_2_1 {
opp@1000000000,975,2,1 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_3_1 {
opp@1000000000,975,3,1 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_2_2 {
opp@1000000000,975,2,2 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_3_2 {
opp@1000000000,975,3,2 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_2_3 {
opp@1000000000,975,2,3 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_3_3 {
opp@1000000000,975,3,3 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_2_4 {
opp@1000000000,975,2,4 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_3_4 {
opp@1000000000,975,3,4 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_2_7 {
opp@1000000000,975,2,7 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_3_7 {
opp@1000000000,975,3,7 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_4_7 {
opp@1000000000,975,4,7 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_2_8 {
opp@1000000000,975,2,8 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_3_8 {
opp@1000000000,975,3,8 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_975_4_8 {
opp@1000000000,975,4,8 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1000000000_1000 {
opp@1000000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1000000000_1025 {
opp@1000000000,1025 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1100000000_900 {
opp@1100000000,900 {
opp-microvolt = <900000 900000 1250000>;
};
opp@1100000000_975 {
opp@1100000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1100000000_975_3_1 {
opp@1100000000,975,3,1 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1100000000_975_3_2 {
opp@1100000000,975,3,2 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1100000000_975_3_3 {
opp@1100000000,975,3,3 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1100000000_975_3_4 {
opp@1100000000,975,3,4 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1100000000_975_3_7 {
opp@1100000000,975,3,7 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1100000000_975_4_7 {
opp@1100000000,975,4,7 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1100000000_975_3_8 {
opp@1100000000,975,3,8 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1100000000_975_4_8 {
opp@1100000000,975,4,8 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1100000000_1000 {
opp@1100000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1100000000_1000_2_1 {
opp@1100000000,1000,2,1 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1100000000_1000_2_2 {
opp@1100000000,1000,2,2 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1100000000_1000_2_3 {
opp@1100000000,1000,2,3 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1100000000_1000_2_4 {
opp@1100000000,1000,2,4 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1100000000_1000_2_7 {
opp@1100000000,1000,2,7 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1100000000_1000_2_8 {
opp@1100000000,1000,2,8 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1100000000_1025 {
opp@1100000000,1025 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1100000000_1075 {
opp@1100000000,1075 {
opp-microvolt = <1075000 1075000 1250000>;
};
opp@1150000000_975 {
opp@1150000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1200000000_975 {
opp@1200000000,975 {
opp-microvolt = <975000 975000 1250000>;
};
opp@1200000000_1000 {
opp@1200000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1200000000_1000_3_1 {
opp@1200000000,1000,3,1 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1200000000_1000_3_2 {
opp@1200000000,1000,3,2 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1200000000_1000_3_3 {
opp@1200000000,1000,3,3 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1200000000_1000_3_4 {
opp@1200000000,1000,3,4 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1200000000_1000_3_7 {
opp@1200000000,1000,3,7 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1200000000_1000_4_7 {
opp@1200000000,1000,4,7 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1200000000_1000_3_8 {
opp@1200000000,1000,3,8 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1200000000_1000_4_8 {
opp@1200000000,1000,4,8 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1200000000_1025 {
opp@1200000000,1025 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1200000000_1025_2_1 {
opp@1200000000,1025,2,1 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1200000000_1025_2_2 {
opp@1200000000,1025,2,2 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1200000000_1025_2_3 {
opp@1200000000,1025,2,3 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1200000000_1025_2_4 {
opp@1200000000,1025,2,4 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1200000000_1025_2_7 {
opp@1200000000,1025,2,7 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1200000000_1025_2_8 {
opp@1200000000,1025,2,8 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1200000000_1050 {
opp@1200000000,1050 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1200000000_1075 {
opp@1200000000,1075 {
opp-microvolt = <1075000 1075000 1250000>;
};
opp@1200000000_1100 {
opp@1200000000,1100 {
opp-microvolt = <1100000 1100000 1250000>;
};
opp@1300000000_1000 {
opp@1300000000,1000 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1300000000_1000_4_7 {
opp@1300000000,1000,4,7 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1300000000_1000_4_8 {
opp@1300000000,1000,4,8 {
opp-microvolt = <1000000 1000000 1250000>;
};
opp@1300000000_1025 {
opp@1300000000,1025 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1300000000_1025_3_1 {
opp@1300000000,1025,3,1 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1300000000_1025_3_7 {
opp@1300000000,1025,3,7 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1300000000_1025_3_8 {
opp@1300000000,1025,3,8 {
opp-microvolt = <1025000 1025000 1250000>;
};
opp@1300000000_1050 {
opp@1300000000,1050 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_2_1 {
opp@1300000000,1050,2,1 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_3_2 {
opp@1300000000,1050,3,2 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_3_3 {
opp@1300000000,1050,3,3 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_3_4 {
opp@1300000000,1050,3,4 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_3_5 {
opp@1300000000,1050,3,5 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_3_6 {
opp@1300000000,1050,3,6 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_2_7 {
opp@1300000000,1050,2,7 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_2_8 {
opp@1300000000,1050,2,8 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_3_12 {
opp@1300000000,1050,3,12 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1050_3_13 {
opp@1300000000,1050,3,13 {
opp-microvolt = <1050000 1050000 1250000>;
};
opp@1300000000_1075 {
opp@1300000000,1075 {
opp-microvolt = <1075000 1075000 1250000>;
};
opp@1300000000_1075_2_2 {
opp@1300000000,1075,2,2 {
opp-microvolt = <1075000 1075000 1250000>;
};
opp@1300000000_1075_2_3 {
opp@1300000000,1075,2,3 {
opp-microvolt = <1075000 1075000 1250000>;
};
opp@1300000000_1075_2_4 {
opp@1300000000,1075,2,4 {
opp-microvolt = <1075000 1075000 1250000>;
};
opp@1300000000_1100 {
opp@1300000000,1100 {
opp-microvolt = <1100000 1100000 1250000>;
};
opp@1300000000_1125 {
opp@1300000000,1125 {
opp-microvolt = <1125000 1125000 1250000>;
};
opp@1300000000_1150 {
opp@1300000000,1150 {
opp-microvolt = <1150000 1150000 1250000>;
};
opp@1300000000_1175 {
opp@1300000000,1175 {
opp-microvolt = <1175000 1175000 1250000>;
};
opp@1400000000_1100 {
opp@1400000000,1100 {
opp-microvolt = <1100000 1100000 1250000>;
};
opp@1400000000_1125 {
opp@1400000000,1125 {
opp-microvolt = <1125000 1125000 1250000>;
};
opp@1400000000_1150 {
opp@1400000000,1150 {
opp-microvolt = <1150000 1150000 1250000>;
};
opp@1400000000_1150_2_4 {
opp@1400000000,1150,2,4 {
opp-microvolt = <1150000 1150000 1250000>;
};
opp@1400000000_1175 {
opp@1400000000,1175 {
opp-microvolt = <1175000 1175000 1250000>;
};
opp@1400000000_1237 {
opp@1400000000,1237 {
opp-microvolt = <1237000 1237000 1250000>;
};
opp@1500000000_1125 {
opp@1500000000,1125 {
opp-microvolt = <1125000 1125000 1250000>;
};
opp@1500000000_1125_4_5 {
opp@1500000000,1125,4,5 {
opp-microvolt = <1125000 1125000 1250000>;
};
opp@1500000000_1125_4_6 {
opp@1500000000,1125,4,6 {
opp-microvolt = <1125000 1125000 1250000>;
};
opp@1500000000_1125_4_12 {
opp@1500000000,1125,4,12 {
opp-microvolt = <1125000 1125000 1250000>;
};
opp@1500000000_1125_4_13 {
opp@1500000000,1125,4,13 {
opp-microvolt = <1125000 1125000 1250000>;
};
opp@1500000000_1150 {
opp@1500000000,1150 {
opp-microvolt = <1150000 1150000 1250000>;
};
opp@1500000000_1150_3_5 {
opp@1500000000,1150,3,5 {
opp-microvolt = <1150000 1150000 1250000>;
};
opp@1500000000_1150_3_6 {
opp@1500000000,1150,3,6 {
opp-microvolt = <1150000 1150000 1250000>;
};
opp@1500000000_1150_3_12 {
opp@1500000000,1150,3,12 {
opp-microvolt = <1150000 1150000 1250000>;
};
opp@1500000000_1150_3_13 {
opp@1500000000,1150,3,13 {
opp-microvolt = <1150000 1150000 1250000>;
};
opp@1500000000_1200 {
opp@1500000000,1200 {
opp-microvolt = <1200000 1200000 1250000>;
};
opp@1500000000_1237 {
opp@1500000000,1237 {
opp-microvolt = <1237000 1237000 1250000>;
};
opp@1600000000_1212 {
opp@1600000000,1212 {
opp-microvolt = <1212000 1212000 1250000>;
};
opp@1600000000_1237 {
opp@1600000000,1237 {
opp-microvolt = <1237000 1237000 1250000>;
};
opp@1700000000_1212 {
opp@1700000000,1212 {
opp-microvolt = <1212000 1212000 1250000>;
};
opp@1700000000_1237 {
opp@1700000000,1237 {
opp-microvolt = <1237000 1237000 1250000>;
};
};

File diff suppressed because it is too large Load Diff

View File

@@ -20,12 +20,12 @@ memory@80000000 {
pcie@3000 {
compatible = "nvidia,tegra30-pcie";
device_type = "pci";
reg = <0x00003000 0x00000800 /* PADS registers */
0x00003800 0x00000200 /* AFI registers */
0x10000000 0x10000000>; /* configuration space */
reg = <0x00003000 0x00000800>, /* PADS registers */
<0x00003800 0x00000200>, /* AFI registers */
<0x10000000 0x10000000>; /* configuration space */
reg-names = "pads", "afi", "cs";
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH /* controller interrupt */
GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
@@ -36,12 +36,12 @@ pcie@3000 {
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000 /* port 0 configuration space */
0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */
0x82000000 0 0x00004000 0x00004000 0 0x00001000 /* port 2 configuration space */
0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x20000000 0x20000000 0 0x08000000 /* non-prefetchable memory */
0xc2000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */
ranges = <0x02000000 0 0x00000000 0x00000000 0 0x00001000>, /* port 0 configuration space */
<0x02000000 0 0x00001000 0x00001000 0 0x00001000>, /* port 1 configuration space */
<0x02000000 0 0x00004000 0x00004000 0 0x00001000>, /* port 2 configuration space */
<0x01000000 0 0 0x02000000 0 0x00010000>, /* downstream I/O */
<0x02000000 0 0x20000000 0x20000000 0 0x08000000>, /* non-prefetchable memory */
<0x42000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */
clocks = <&tegra_car TEGRA30_CLK_PCIE>,
<&tegra_car TEGRA30_CLK_AFI>,
@@ -97,25 +97,27 @@ pci@3,0 {
};
};
iram@40000000 {
sram@40000000 {
compatible = "mmio-sram";
reg = <0x40000000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x40000000 0x40000>;
vde_pool: vde@400 {
vde_pool: sram@400 {
reg = <0x400 0x3fc00>;
pool;
};
};
host1x@50000000 {
compatible = "nvidia,tegra30-host1x", "simple-bus";
compatible = "nvidia,tegra30-host1x";
reg = <0x50000000 0x00024000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA30_CLK_HOST1X>;
clock-names = "host1x";
resets = <&tegra_car 28>;
reset-names = "host1x";
iommus = <&mc TEGRA_SWGROUP_HC>;
@@ -183,8 +185,8 @@ gr2d@54140000 {
gr3d@54180000 {
compatible = "nvidia,tegra30-gr3d";
reg = <0x54180000 0x00040000>;
clocks = <&tegra_car TEGRA30_CLK_GR3D
&tegra_car TEGRA30_CLK_GR3D2>;
clocks = <&tegra_car TEGRA30_CLK_GR3D>,
<&tegra_car TEGRA30_CLK_GR3D2>;
clock-names = "3d", "3d2";
resets = <&tegra_car 24>,
<&tegra_car 98>;
@@ -195,7 +197,7 @@ gr3d@54180000 {
};
dc@54200000 {
compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc";
compatible = "nvidia,tegra30-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_DISP1>,
@@ -255,11 +257,24 @@ tvo@542c0000 {
dsi@54300000 {
compatible = "nvidia,tegra30-dsi";
reg = <0x54300000 0x00040000>;
clocks = <&tegra_car TEGRA30_CLK_DSIA>;
clocks = <&tegra_car TEGRA30_CLK_DSIA>,
<&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
clock-names = "dsi", "parent";
resets = <&tegra_car 48>;
reset-names = "dsi";
status = "disabled";
};
dsi@54400000 {
compatible = "nvidia,tegra30-dsi";
reg = <0x54400000 0x00040000>;
clocks = <&tegra_car TEGRA30_CLK_DSIB>,
<&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
clock-names = "dsi", "parent";
resets = <&tegra_car 84>;
reset-names = "dsi";
status = "disabled";
};
};
timer@50040600 {
@@ -273,8 +288,8 @@ timer@50040600 {
intc: interrupt-controller@50041000 {
compatible = "arm,cortex-a9-gic";
reg = <0x50041000 0x1000
0x50040100 0x0100>;
reg = <0x50041000 0x1000>,
<0x50040100 0x0100>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&intc>;
@@ -404,15 +419,15 @@ gpio: gpio@6000d000 {
vde@6001a000 {
compatible = "nvidia,tegra30-vde", "nvidia,tegra20-vde";
reg = <0x6001a000 0x1000 /* Syntax Engine */
0x6001b000 0x1000 /* Video Bitstream Engine */
0x6001c000 0x100 /* Macroblock Engine */
0x6001c200 0x100 /* Post-processing Engine */
0x6001c400 0x100 /* Motion Compensation Engine */
0x6001c600 0x100 /* Transform Engine */
0x6001c800 0x100 /* Pixel prediction block */
0x6001ca00 0x100 /* Video DMA */
0x6001d800 0x400>; /* Video frame controls */
reg = <0x6001a000 0x1000>, /* Syntax Engine */
<0x6001b000 0x1000>, /* Video Bitstream Engine */
<0x6001c000 0x100>, /* Macroblock Engine */
<0x6001c200 0x100>, /* Post-processing Engine */
<0x6001c400 0x100>, /* Motion Compensation Engine */
<0x6001c600 0x100>, /* Transform Engine */
<0x6001c800 0x100>, /* Pixel prediction block */
<0x6001ca00 0x100>, /* Video DMA */
<0x6001d800 0x400>; /* Video frame controls */
reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
"tfe", "ppb", "vdma", "frameid";
iram = <&vde_pool>; /* IRAM region */
@@ -428,14 +443,14 @@ vde@6001a000 {
apbmisc@70000800 {
compatible = "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc";
reg = <0x70000800 0x64 /* Chip revision */
0x70000008 0x04>; /* Strapping options */
reg = <0x70000800 0x64>, /* Chip revision */
<0x70000008 0x04>; /* Strapping options */
};
pinmux: pinmux@70000868 {
compatible = "nvidia,tegra30-pinmux";
reg = <0x70000868 0xd4 /* Pad control registers */
0x70003000 0x3e4>; /* Mux registers */
reg = <0x70000868 0x0d4>, /* Pad control registers */
<0x70003000 0x3e4>; /* Mux registers */
};
/*
@@ -770,8 +785,8 @@ hda@70030000 {
ahub@70080000 {
compatible = "nvidia,tegra30-ahub";
reg = <0x70080000 0x200
0x70080200 0x100>;
reg = <0x70080000 0x200>,
<0x70080200 0x100>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_D_AUDIO>,
<&tegra_car TEGRA30_CLK_APBIF>;
@@ -851,41 +866,45 @@ tegra_i2s4: i2s@70080700 {
};
};
sdhci@78000000 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
mmc@78000000 {
compatible = "nvidia,tegra30-sdhci";
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC1>;
clock-names = "sdhci";
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@78000200 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
mmc@78000200 {
compatible = "nvidia,tegra30-sdhci";
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC2>;
clock-names = "sdhci";
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@78000400 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
mmc@78000400 {
compatible = "nvidia,tegra30-sdhci";
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
clock-names = "sdhci";
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disabled";
};
sdhci@78000600 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
mmc@78000600 {
compatible = "nvidia,tegra30-sdhci";
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC4>;
clock-names = "sdhci";
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disabled";
@@ -906,7 +925,8 @@ usb@7d000000 {
phy1: usb-phy@7d000000 {
compatible = "nvidia,tegra30-usb-phy";
reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
reg = <0x7d000000 0x4000>,
<0x7d000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USBD>,
<&tegra_car TEGRA30_CLK_PLL_U>,
@@ -914,6 +934,7 @@ phy1: usb-phy@7d000000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 22>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <9>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -943,7 +964,8 @@ usb@7d004000 {
phy2: usb-phy@7d004000 {
compatible = "nvidia,tegra30-usb-phy";
reg = <0x7d004000 0x4000 0x7d000000 0x4000>;
reg = <0x7d004000 0x4000>,
<0x7d000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB2>,
<&tegra_car TEGRA30_CLK_PLL_U>,
@@ -951,6 +973,7 @@ phy2: usb-phy@7d004000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <9>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
@@ -979,7 +1002,8 @@ usb@7d008000 {
phy3: usb-phy@7d008000 {
compatible = "nvidia,tegra30-usb-phy";
reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
reg = <0x7d008000 0x4000>,
<0x7d000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB3>,
<&tegra_car TEGRA30_CLK_PLL_U>,
@@ -987,6 +1011,7 @@ phy3: usb-phy@7d008000 {
clock-names = "reg", "pll_u", "utmi-pads";
resets = <&tegra_car 59>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";
#phy-cells = <0>;
nvidia,hssync-start-delay = <0>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;