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Merge tag 'stm32-dt-for-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

Browse Source 
STM32 DT for v6.3, round 1

Highlights:
----------

- MPU:
  - ST boards:
    - Add following peripherals support on stm32mp13:
      i2s, SAI, SPDIFRX, DFSDM, Timers
    - Add timers support on stm32mp135f-dk board.
    - Add decicated BSEC compatible on STM32MP13.
    - Rename sound card on STM32MP15 DKx.
    - Fix yaml validation issues.

* tag 'stm32-dt-for-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: fix compatible for BSEC on STM32MP13
  ARM: dts: stm32: Update part number NVMEM description on stm32mp131
  ARM: dts: stm32: Use new media bus type macros
  ARM: dts: stm32: Fix User button on stm32mp135f-dk
  ARM: dts: stm32: add timers support on stm32mp135f-dk
  ARM: dts: stm32: add timer pins muxing for stm32mp135f-dk
  ARM: dts: stm32: add timers support on stm32mp131
  ARM: dts: stm32: add dfsdm node on stm32mp131
  ARM: dts: stm32: add spdifrx node on stm32mp131
  ARM: dts: stm32: add sai nodes on stm32mp131
  ARM: dts: stm32: add i2s nodes on stm32mp131
  ARM: dts: stm32: Remove the pins-are-numbered property
  ARM: dts: stm32: rename sound card on stm32mp15xx-dkx
  ARM: dts: stm32: remove sai kernel clock on stm32mp15xx-dkx
  ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp151a-prtt1l
  ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp157c-emstamp-argon
  ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcom-som
  ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcor-som

Link: https://lore.kernel.org/r/3e815504-e85e-cbd3-6e6d-4e5a7aa7469a@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2023-02-03 14:12:04 +01:00
parent eacef7cc52 7e1790d26a
commit 34b84ce9c6
14 changed files with 856 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/stm32429i-eval.dts
View File

@@ -50,6 +50,7 @@
#include "stm32f429-pinctrl.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/media/video-interfaces.h>
/ {
model = "STMicroelectronics STM32429i-EVAL board";
@@ -186,7 +187,7 @@ &dcmi {
port {
dcmi_0: endpoint {
remote-endpoint = <&ov2640_0>;
bus-type = <5>;
bus-type = <MEDIA_BUS_TYPE_PARALLEL>;
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;

1
arch/arm/boot/dts/stm32f4-pinctrl.dtsi
View File

@@ -51,7 +51,6 @@ pinctrl: pinctrl@40020000 {
ranges = <0 0x40020000 0x3000>;
interrupt-parent = <&exti>;
st,syscfg = <&syscfg 0x8>;
pins-are-numbered;
gpioa: gpio@40020000 {
gpio-controller;

1
arch/arm/boot/dts/stm32f7-pinctrl.dtsi
View File

@@ -15,7 +15,6 @@ pinctrl: pinctrl@40020000 {
ranges = <0 0x40020000 0x3000>;
interrupt-parent = <&exti>;
st,syscfg = <&syscfg 0x8>;
pins-are-numbered;
gpioa: gpio@40020000 {
gpio-controller;

1
arch/arm/boot/dts/stm32h743.dtsi
View File

@@ -588,7 +588,6 @@ pinctrl: pinctrl@58020000 {
ranges = <0 0x58020000 0x3000>;
interrupt-parent = <&exti>;
st,syscfg = <&syscfg 0x8>;
pins-are-numbered;
gpioa: gpio@58020000 {
gpio-controller;

60
arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
View File

@@ -54,6 +54,66 @@ pins {
};
};
pwm3_pins_a: pwm3-0 {
pins {
pinmux = <STM32_PINMUX('B', 1, AF2)>; /* TIM3_CH4 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm3_sleep_pins_a: pwm3-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 1, ANALOG)>; /* TIM3_CH4 */
};
};
pwm4_pins_a: pwm4-0 {
pins {
pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm4_sleep_pins_a: pwm4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
};
};
pwm8_pins_a: pwm8-0 {
pins {
pinmux = <STM32_PINMUX('E', 5, AF3)>; /* TIM8_CH3 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm8_sleep_pins_a: pwm8-sleep-0 {
pins {
pinmux = <STM32_PINMUX('E', 5, ANALOG)>; /* TIM8_CH3 */
};
};
pwm14_pins_a: pwm14-0 {
pins {
pinmux = <STM32_PINMUX('F', 9, AF9)>; /* TIM14_CH1 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
pwm14_sleep_pins_a: pwm14-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 9, ANALOG)>; /* TIM14_CH1 */
};
};
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */

710
arch/arm/boot/dts/stm32mp131.dtsi
View File

@@ -119,6 +119,232 @@ scmi_shm: scmi-sram@0 {
};
};
timers2: timer@40000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40000000 0x400>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM2_K>;
clock-names = "int";
dmas = <&dmamux1 18 0x400 0x1>,
<&dmamux1 19 0x400 0x1>,
<&dmamux1 20 0x400 0x1>,
<&dmamux1 21 0x400 0x1>,
<&dmamux1 22 0x400 0x1>;
dma-names = "ch1", "ch2", "ch3", "ch4", "up";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@1 {
compatible = "st,stm32h7-timer-trigger";
reg = <1>;
status = "disabled";
};
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
};
timers3: timer@40001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40001000 0x400>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM3_K>;
clock-names = "int";
dmas = <&dmamux1 23 0x400 0x1>,
<&dmamux1 24 0x400 0x1>,
<&dmamux1 25 0x400 0x1>,
<&dmamux1 26 0x400 0x1>,
<&dmamux1 27 0x400 0x1>,
<&dmamux1 28 0x400 0x1>;
dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@2 {
compatible = "st,stm32h7-timer-trigger";
reg = <2>;
status = "disabled";
};
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
};
timers4: timer@40002000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM4_K>;
clock-names = "int";
dmas = <&dmamux1 29 0x400 0x1>,
<&dmamux1 30 0x400 0x1>,
<&dmamux1 31 0x400 0x1>,
<&dmamux1 32 0x400 0x1>;
dma-names = "ch1", "ch2", "ch3", "up";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@3 {
compatible = "st,stm32h7-timer-trigger";
reg = <3>;
status = "disabled";
};
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
};
timers5: timer@40003000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40003000 0x400>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM5_K>;
clock-names = "int";
dmas = <&dmamux1 55 0x400 0x1>,
<&dmamux1 56 0x400 0x1>,
<&dmamux1 57 0x400 0x1>,
<&dmamux1 58 0x400 0x1>,
<&dmamux1 59 0x400 0x1>,
<&dmamux1 60 0x400 0x1>;
dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@4 {
compatible = "st,stm32h7-timer-trigger";
reg = <4>;
status = "disabled";
};
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
};
timers6: timer@40004000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40004000 0x400>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM6_K>;
clock-names = "int";
dmas = <&dmamux1 69 0x400 0x1>;
dma-names = "up";
status = "disabled";
timer@5 {
compatible = "st,stm32h7-timer-trigger";
reg = <5>;
status = "disabled";
};
};
timers7: timer@40005000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40005000 0x400>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM7_K>;
clock-names = "int";
dmas = <&dmamux1 70 0x400 0x1>;
dma-names = "up";
status = "disabled";
timer@6 {
compatible = "st,stm32h7-timer-trigger";
reg = <6>;
status = "disabled";
};
};
lptimer1: timer@40009000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x40009000 0x400>;
interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc LPTIM1_K>;
clock-names = "mux";
wakeup-source;
status = "disabled";
pwm {
compatible = "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
trigger@0 {
compatible = "st,stm32-lptimer-trigger";
reg = <0>;
status = "disabled";
};
counter {
compatible = "st,stm32-lptimer-counter";
status = "disabled";
};
timer {
compatible = "st,stm32-lptimer-timer";
status = "disabled";
};
};
i2s2: audio-controller@4000b000 {
compatible = "st,stm32h7-i2s";
reg = <0x4000b000 0x400>;
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmamux1 39 0x400 0x01>,
<&dmamux1 40 0x400 0x01>;
dma-names = "rx", "tx";
status = "disabled";
};
spi2: spi@4000b000 {
compatible = "st,stm32h7-spi";
reg = <0x4000b000 0x400>;
@@ -133,6 +359,17 @@ spi2: spi@4000b000 {
status = "disabled";
};
i2s3: audio-controller@4000c000 {
compatible = "st,stm32h7-i2s";
reg = <0x4000c000 0x400>;
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmamux1 61 0x400 0x01>,
<&dmamux1 62 0x400 0x01>;
dma-names = "rx", "tx";
status = "disabled";
};
spi3: spi@4000c000 {
compatible = "st,stm32h7-spi";
reg = <0x4000c000 0x400>;
@@ -147,6 +384,19 @@ spi3: spi@4000c000 {
status = "disabled";
};
spdifrx: audio-controller@4000d000 {
compatible = "st,stm32h7-spdifrx";
reg = <0x4000d000 0x400>;
#sound-dai-cells = <0>;
clocks = <&rcc SPDIF_K>;
clock-names = "kclk";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmamux1 93 0x400 0x01>,
<&dmamux1 94 0x400 0x01>;
dma-names = "rx", "rx-ctrl";
status = "disabled";
};
uart4: serial@40010000 {
compatible = "st,stm32h7-uart";
reg = <0x40010000 0x400>;
@@ -192,6 +442,99 @@ i2c2: i2c@40013000 {
status = "disabled";
};
timers1: timer@44000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x44000000 0x400>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "brk", "up", "trg-com", "cc";
clocks = <&rcc TIM1_K>;
clock-names = "int";
dmas = <&dmamux1 11 0x400 0x1>,
<&dmamux1 12 0x400 0x1>,
<&dmamux1 13 0x400 0x1>,
<&dmamux1 14 0x400 0x1>,
<&dmamux1 15 0x400 0x1>,
<&dmamux1 16 0x400 0x1>,
<&dmamux1 17 0x400 0x1>;
dma-names = "ch1", "ch2", "ch3", "ch4",
"up", "trig", "com";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@0 {
compatible = "st,stm32h7-timer-trigger";
reg = <0>;
status = "disabled";
};
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
};
timers8: timer@44001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x44001000 0x400>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "brk", "up", "trg-com", "cc";
clocks = <&rcc TIM8_K>;
clock-names = "int";
dmas = <&dmamux1 47 0x400 0x1>,
<&dmamux1 48 0x400 0x1>,
<&dmamux1 49 0x400 0x1>,
<&dmamux1 50 0x400 0x1>,
<&dmamux1 51 0x400 0x1>,
<&dmamux1 52 0x400 0x1>,
<&dmamux1 53 0x400 0x1>;
dma-names = "ch1", "ch2", "ch3", "ch4",
"up", "trig", "com";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@7 {
compatible = "st,stm32h7-timer-trigger";
reg = <7>;
status = "disabled";
};
counter {
compatible = "st,stm32-timer-counter";
status = "disabled";
};
};
i2s1: audio-controller@44004000 {
compatible = "st,stm32h7-i2s";
reg = <0x44004000 0x400>;
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmamux1 37 0x400 0x01>,
<&dmamux1 38 0x400 0x01>;
dma-names = "rx", "tx";
status = "disabled";
};
spi1: spi@44004000 {
compatible = "st,stm32h7-spi";
reg = <0x44004000 0x400>;
@@ -206,6 +549,98 @@ spi1: spi@44004000 {
status = "disabled";
};
sai1: sai@4400a000 {
compatible = "st,stm32h7-sai";
reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>;
ranges = <0 0x4400a000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc SAI1_R>;
status = "disabled";
sai1a: audio-controller@4400a004 {
compatible = "st,stm32-sai-sub-a";
reg = <0x4 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc SAI1_K>;
clock-names = "sai_ck";
dmas = <&dmamux1 87 0x400 0x01>;
status = "disabled";
};
sai1b: audio-controller@4400a024 {
compatible = "st,stm32-sai-sub-b";
reg = <0x24 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc SAI1_K>;
clock-names = "sai_ck";
dmas = <&dmamux1 88 0x400 0x01>;
status = "disabled";
};
};
sai2: sai@4400b000 {
compatible = "st,stm32h7-sai";
reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>;
ranges = <0 0x4400b000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc SAI2_R>;
status = "disabled";
sai2a: audio-controller@4400b004 {
compatible = "st,stm32-sai-sub-a";
reg = <0x4 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc SAI2_K>;
clock-names = "sai_ck";
dmas = <&dmamux1 89 0x400 0x01>;
status = "disabled";
};
sai2b: audio-controller@4400b024 {
compatible = "st,stm32-sai-sub-b";
reg = <0x24 0x20>;
#sound-dai-cells = <0>;
clocks = <&rcc SAI2_K>;
clock-names = "sai_ck";
dmas = <&dmamux1 90 0x400 0x01>;
status = "disabled";
};
};
dfsdm: dfsdm@4400d000 {
compatible = "st,stm32mp1-dfsdm";
reg = <0x4400d000 0x800>;
clocks = <&rcc DFSDM_K>;
clock-names = "dfsdm";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
dfsdm0: filter@0 {
compatible = "st,stm32-dfsdm-adc";
reg = <0>;
#io-channel-cells = <1>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmamux1 101 0x400 0x01>;
dma-names = "rx";
status = "disabled";
};
dfsdm1: filter@1 {
compatible = "st,stm32-dfsdm-adc";
reg = <1>;
#io-channel-cells = <1>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmamux1 102 0x400 0x01>;
dma-names = "rx";
status = "disabled";
};
};
dma1: dma-controller@48000000 {
compatible = "st,stm32-dma";
reg = <0x48000000 0x400>;
@@ -313,6 +748,17 @@ usbotg_hs: usb@49000000 {
status = "disabled";
};
i2s4: audio-controller@4c002000 {
compatible = "st,stm32h7-i2s";
reg = <0x4c002000 0x400>;
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmamux1 83 0x400 0x01>,
<&dmamux1 84 0x400 0x01>;
dma-names = "rx", "tx";
status = "disabled";
};
spi4: spi@4c002000 {
compatible = "st,stm32h7-spi";
reg = <0x4c002000 0x400>;
@@ -395,6 +841,161 @@ i2c5: i2c@4c006000 {
status = "disabled";
};
timers12: timer@4c007000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x4c007000 0x400>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM12_K>;
clock-names = "int";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@11 {
compatible = "st,stm32h7-timer-trigger";
reg = <11>;
status = "disabled";
};
};
timers13: timer@4c008000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x4c008000 0x400>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM13_K>;
clock-names = "int";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@12 {
compatible = "st,stm32h7-timer-trigger";
reg = <12>;
status = "disabled";
};
};
timers14: timer@4c009000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x4c009000 0x400>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM14_K>;
clock-names = "int";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@13 {
compatible = "st,stm32h7-timer-trigger";
reg = <13>;
status = "disabled";
};
};
timers15: timer@4c00a000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x4c00a000 0x400>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM15_K>;
clock-names = "int";
dmas = <&dmamux1 105 0x400 0x1>,
<&dmamux1 106 0x400 0x1>,
<&dmamux1 107 0x400 0x1>,
<&dmamux1 108 0x400 0x1>;
dma-names = "ch1", "up", "trig", "com";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@14 {
compatible = "st,stm32h7-timer-trigger";
reg = <14>;
status = "disabled";
};
};
timers16: timer@4c00b000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x4c00b000 0x400>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM16_K>;
clock-names = "int";
dmas = <&dmamux1 109 0x400 0x1>,
<&dmamux1 110 0x400 0x1>;
dma-names = "ch1", "up";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@15 {
compatible = "st,stm32h7-timer-trigger";
reg = <15>;
status = "disabled";
};
};
timers17: timer@4c00c000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x4c00c000 0x400>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global";
clocks = <&rcc TIM17_K>;
clock-names = "int";
dmas = <&dmamux1 111 0x400 0x1>,
<&dmamux1 112 0x400 0x1>;
dma-names = "ch1", "up";
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@16 {
compatible = "st,stm32h7-timer-trigger";
reg = <16>;
status = "disabled";
};
};
rcc: rcc@50000000 {
compatible = "st,stm32mp13-rcc", "syscon";
reg = <0x50000000 0x1000>;
@@ -421,6 +1022,111 @@ syscfg: syscon@50020000 {
clocks = <&rcc SYSCFG>;
};
lptimer2: timer@50021000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x50021000 0x400>;
interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc LPTIM2_K>;
clock-names = "mux";
wakeup-source;
status = "disabled";
pwm {
compatible = "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
trigger@1 {
compatible = "st,stm32-lptimer-trigger";
reg = <1>;
status = "disabled";
};
counter {
compatible = "st,stm32-lptimer-counter";
status = "disabled";
};
timer {
compatible = "st,stm32-lptimer-timer";
status = "disabled";
};
};
lptimer3: timer@50022000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x50022000 0x400>;
interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc LPTIM3_K>;
clock-names = "mux";
wakeup-source;
status = "disabled";
pwm {
compatible = "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
trigger@2 {
compatible = "st,stm32-lptimer-trigger";
reg = <2>;
status = "disabled";
};
timer {
compatible = "st,stm32-lptimer-timer";
status = "disabled";
};
};
lptimer4: timer@50023000 {
compatible = "st,stm32-lptimer";
reg = <0x50023000 0x400>;
interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc LPTIM4_K>;
clock-names = "mux";
wakeup-source;
status = "disabled";
pwm {
compatible = "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
timer {
compatible = "st,stm32-lptimer-timer";
status = "disabled";
};
};
lptimer5: timer@50024000 {
compatible = "st,stm32-lptimer";
reg = <0x50024000 0x400>;
interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc LPTIM5_K>;
clock-names = "mux";
wakeup-source;
status = "disabled";
pwm {
compatible = "st,stm32-pwm-lp";
#pwm-cells = <3>;
status = "disabled";
};
timer {
compatible = "st,stm32-lptimer-timer";
status = "disabled";
};
};
mdma: dma-controller@58000000 {
compatible = "st,stm32h7-mdma";
reg = <0x58000000 0x1000>;
@@ -520,13 +1226,14 @@ rtc: rtc@5c004000 {
};
bsec: efuse@5c005000 {
compatible = "st,stm32mp15-bsec";
compatible = "st,stm32mp13-bsec";
reg = <0x5c005000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
part_number_otp: part_number_otp@4 {
reg = <0x4 0x2>;
bits = <0 12>;
};
ts_cal1: calib@5c {
reg = <0x5c 0x2>;
@@ -547,7 +1254,6 @@ pinctrl: pinctrl@50002000 {
ranges = <0 0x50002000 0x8400>;
interrupt-parent = <&exti>;
st,syscfg = <&exti 0x60 0xff>;
pins-are-numbered;
gpioa: gpio@50002000 {
gpio-controller;

60
arch/arm/boot/dts/stm32mp135f-dk.dts
View File

@@ -40,7 +40,7 @@ optee@dd000000 {
gpio-keys {
compatible = "gpio-keys";
user-pa13 {
button-user {
label = "User-PA13";
linux,code = <BTN_1>;
gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
@@ -208,6 +208,64 @@ &spi5 {
status = "disabled";
};
&timers3 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
pwm {
pinctrl-0 = <&pwm3_pins_a>;
pinctrl-1 = <&pwm3_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@2 {
status = "okay";
};
};
&timers4 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
pwm {
pinctrl-0 = <&pwm4_pins_a>;
pinctrl-1 = <&pwm4_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@3 {
status = "okay";
};
};
&timers8 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
pwm {
pinctrl-0 = <&pwm8_pins_a>;
pinctrl-1 = <&pwm8_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@7 {
status = "okay";
};
};
&timers14 {
status = "disabled";
pwm {
pinctrl-0 = <&pwm14_pins_a>;
pinctrl-1 = <&pwm14_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@13 {
status = "okay";
};
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_a>;

2
arch/arm/boot/dts/stm32mp151.dtsi
View File

@@ -1660,7 +1660,6 @@ pinctrl: pinctrl@50002000 {
ranges = <0 0x50002000 0xa400>;
interrupt-parent = <&exti>;
st,syscfg = <&exti 0x60 0xff>;
pins-are-numbered;
gpioa: gpio@50002000 {
gpio-controller;
@@ -1789,7 +1788,6 @@ pinctrl_z: pinctrl@54004000 {
#size-cells = <1>;
compatible = "st,stm32mp157-z-pinctrl";
ranges = <0 0x54004000 0x400>;
pins-are-numbered;
interrupt-parent = <&exti>;
st,syscfg = <&exti 0x60 0xff>;

8
arch/arm/boot/dts/stm32mp151a-prtt1l.dtsi
View File

@@ -101,8 +101,12 @@ &iwdg2 {
&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
pinctrl-0 = <&qspi_clk_pins_a
&qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;

8
arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
View File

@@ -391,8 +391,12 @@ &pwr_regulators {
&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
pinctrl-0 = <&qspi_clk_pins_a
&qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;

3
arch/arm/boot/dts/stm32mp157c-ev1.dts
View File

@@ -8,6 +8,7 @@
#include "stm32mp157c-ed1.dts"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/media/video-interfaces.h>
/ {
model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
@@ -90,7 +91,7 @@ &dcmi {
port {
dcmi_0: endpoint {
remote-endpoint = <&ov5640_0>;
bus-type = <5>;
bus-type = <MEDIA_BUS_TYPE_PARALLEL>;
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;

8
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
View File

@@ -428,8 +428,12 @@ &pwr_regulators {
&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
pinctrl-0 = <&qspi_clk_pins_a
&qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;

8
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
View File

@@ -247,8 +247,12 @@ &pwr_regulators {
&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
pinctrl-0 = <&qspi_clk_pins_a
&qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
#address-cells = <1>;
#size-cells = <0>;

4
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
View File

@@ -72,7 +72,7 @@ led-blue {
sound {
compatible = "audio-graph-card";
label = "STM32MP1-DK";
label = "STM32MP15-DK";
routing =
"Playback" , "MCLK",
"Capture" , "MCLK",
@@ -501,8 +501,6 @@ &sai2 {
sai2a: audio-controller@4400b004 {
#clock-cells = <0>;
dma-names = "tx";
clocks = <&rcc SAI2_K>;
clock-names = "sai_ck";
status = "okay";
sai2a_port: port {