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ARM: dts: rockchip: use DMA channels for UARTs for RK3288

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This patch enables to use DMAC for all UARTs that are connected to
dmac_peri core for Rochchip RK3288.

Only uart2 is connected different DMAC (dmac_bus_s) so keep current
settings on this patch.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Link: https://lore.kernel.org/r/20200315095115.10106-1-katsuhiro@katsuster.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Katsuhiro Suzuki
2020-03-15 18:51:15 +09:00
committed by Heiko Stuebner
parent c0044dc7d6
commit 3425fe335c
1 changed files with 8 additions and 0 deletions
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8
arch/arm/boot/dts/rk3288.dtsi
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@@ -420,6 +420,8 @@ uart0: serial@ff180000 {
reg-io-width = <4>;
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
clock-names = "baudclk", "apb_pclk";
dmas = <&dmac_peri 1>, <&dmac_peri 2>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer>;
status = "disabled";
@@ -433,6 +435,8 @@ uart1: serial@ff190000 {
reg-io-width = <4>;
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
clock-names = "baudclk", "apb_pclk";
dmas = <&dmac_peri 3>, <&dmac_peri 4>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart1_xfer>;
status = "disabled";
@@ -459,6 +463,8 @@ uart3: serial@ff1b0000 {
reg-io-width = <4>;
clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
clock-names = "baudclk", "apb_pclk";
dmas = <&dmac_peri 7>, <&dmac_peri 8>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart3_xfer>;
status = "disabled";
@@ -472,6 +478,8 @@ uart4: serial@ff1c0000 {
reg-io-width = <4>;
clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
clock-names = "baudclk", "apb_pclk";
dmas = <&dmac_peri 9>, <&dmac_peri 10>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart4_xfer>;
status = "disabled";