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coresight: tpda: add logic to configure TPDA_SYNCR register
The TPDA_SYNC counter tracks the number of bytes transferred from the aggregator. When this count reaches the value programmed in the TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace tools to accurately parse each valid packet. Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com> Reviewed-by: James Clark <james.clark@linaro.org> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> [ Fix kernel version in Documentation ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251223-add_sysfs_nodes_to_configure_tpda-v8-3-4c95db608b62@oss.qualcomm.com
This commit is contained in:
committed by
Suzuki K Poulose
parent
8e1c358a3b
commit
33f04ead7c
@@ -41,3 +41,21 @@ Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qu
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Description:
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(RW) Set global (all ports) flush request bit. The bit remains set until a
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global flush request sequence completes.
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What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Set mode the of the syncr counter.
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mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests
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mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K
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data by writing a value 13 to the COUNT[11:7] field.
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What: /sys/bus/coresight/devices/<tpda-name>/syncr_count
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Set value the of the syncr counter.
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Range: 0-4095
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@@ -163,6 +163,20 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
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*/
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if (drvdata->trig_flag_ts)
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writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
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/* Initialize with a value of 0 */
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val = 0;
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if (drvdata->syncr_mode)
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val |= TPDA_SYNCR_MODE_CTRL_MASK;
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if (drvdata->syncr_count > 0 &&
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drvdata->syncr_count < TPDA_SYNCR_COUNT_MASK)
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val |= drvdata->syncr_count;
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else
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/* Program the count to its MAX value by default */
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val |= TPDA_SYNCR_COUNT_MASK;
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writel_relaxed(val, drvdata->base + TPDA_SYNCR);
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}
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static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
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@@ -385,8 +399,84 @@ static ssize_t global_flush_req_store(struct device *dev,
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}
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static DEVICE_ATTR_RW(global_flush_req);
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static ssize_t syncr_mode_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
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unsigned long val, syncr_val;
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if (!drvdata->csdev->refcnt)
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return -EINVAL;
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guard(spinlock)(&drvdata->spinlock);
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syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR);
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val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val);
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return sysfs_emit(buf, "%lu\n", val);
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}
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static ssize_t syncr_mode_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t size)
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{
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struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
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unsigned long val;
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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guard(spinlock)(&drvdata->spinlock);
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/* set the mode when first enabling the device */
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drvdata->syncr_mode = !!val;
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return size;
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}
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static DEVICE_ATTR_RW(syncr_mode);
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static ssize_t syncr_count_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
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unsigned long val;
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if (!drvdata->csdev->refcnt)
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return -EINVAL;
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guard(spinlock)(&drvdata->spinlock);
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val = readl_relaxed(drvdata->base + TPDA_SYNCR);
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val &= TPDA_SYNCR_COUNT_MASK;
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return sysfs_emit(buf, "%lu\n", val);
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}
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static ssize_t syncr_count_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t size)
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{
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struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
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unsigned long val;
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if (kstrtoul(buf, 0, &val))
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return -EINVAL;
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if (val > TPDA_SYNCR_COUNT_MASK)
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return -EINVAL;
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guard(spinlock)(&drvdata->spinlock);
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drvdata->syncr_count = val;
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return size;
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}
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static DEVICE_ATTR_RW(syncr_count);
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static struct attribute *tpda_attrs[] = {
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&dev_attr_global_flush_req.attr,
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&dev_attr_syncr_mode.attr,
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&dev_attr_syncr_count.attr,
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tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
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tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
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tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
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@@ -9,6 +9,7 @@
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#define TPDA_CR (0x000)
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#define TPDA_Pn_CR(n) (0x004 + (n * 4))
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#define TPDA_FPID_CR (0x084)
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#define TPDA_SYNCR (0x08C)
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/* Cross trigger global (all ports) flush request bit */
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#define TPDA_CR_FLREQ BIT(0)
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@@ -36,6 +37,11 @@
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/* Aggregator port DSB data set element size bit */
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#define TPDA_Pn_CR_DSBSIZE BIT(8)
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/* TPDA_SYNCR count mask */
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#define TPDA_SYNCR_COUNT_MASK GENMASK(11, 0)
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/* TPDA_SYNCR mode control bit */
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#define TPDA_SYNCR_MODE_CTRL_MASK GENMASK(12, 12)
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#define TPDA_MAX_INPORTS 32
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/**
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@@ -52,6 +58,8 @@
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* @trig_freq: Enable/disable cross trigger FREQ packet request interface.
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* @freq_ts: Enable/disable the timestamp for all FREQ packets.
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* @cmbchan_mode: Configure the CMB/MCMB channel mode.
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* @syncr_mode: Setting the mode for counting packets.
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* @syncr_count: Setting the value of the count.
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*/
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struct tpda_drvdata {
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void __iomem *base;
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@@ -66,6 +74,8 @@ struct tpda_drvdata {
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bool trig_freq;
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bool freq_ts;
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bool cmbchan_mode;
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bool syncr_mode;
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u32 syncr_count;
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};
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/* Enumerate members of global control register(cr) */
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