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riscv: dts: thead: Adjust TH1520 GPIO labels

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Adjust labels for the TH1520 GPIO controllers such that GPIOs can be
referenced by the names used by the documentation. Eg.

GPIO0_X  -> <&gpio0 X Y>
GPIO1_X  -> <&gpio1 X Y>
GPIO2_X  -> <&gpio2 X Y>
GPIO3_X  -> <&gpio3 X Y>
GPIO4_X  -> <&gpio4 X Y>
AOGPIO_X -> <&aogpio X Y>

Remove labels for the parent GPIO devices that shouldn't need to be
referenced.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
This commit is contained in:
Emil Renner Berthing
2024-10-14 10:54:20 -07:00
committed by Drew Fustini
parent 5ec423d1df
commit 33d3a63f9a
3 changed files with 16 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
View File

@@ -17,6 +17,8 @@ aliases {
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
gpio5 = &aogpio;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;

2
arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
View File

@@ -14,6 +14,8 @@ aliases {
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
gpio5 = &aogpio;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;

24
arch/riscv/boot/dts/thead/th1520.dtsi
View File

@@ -323,14 +323,14 @@ uart3: serial@ffe7f04000 {
status = "disabled";
};
gpio2: gpio@ffe7f34000 {
gpio@ffe7f34000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f34000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk CLK_GPIO2>;
portc: gpio-controller@0 {
gpio2: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -343,14 +343,14 @@ portc: gpio-controller@0 {
};
};
gpio3: gpio@ffe7f38000 {
gpio@ffe7f38000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f38000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk CLK_GPIO3>;
portd: gpio-controller@0 {
gpio3: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -370,14 +370,14 @@ padctrl1_apsys: pinctrl@ffe7f3c000 {
thead,pad-group = <2>;
};
gpio0: gpio@ffec005000 {
gpio@ffec005000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec005000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk CLK_GPIO0>;
porta: gpio-controller@0 {
gpio0: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -390,14 +390,14 @@ porta: gpio-controller@0 {
};
};
gpio1: gpio@ffec006000 {
gpio@ffec006000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec006000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk CLK_GPIO1>;
portb: gpio-controller@0 {
gpio1: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -545,13 +545,13 @@ timer7: timer@ffffc3303c {
status = "disabled";
};
ao_gpio0: gpio@fffff41000 {
gpio@fffff41000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff41000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
porte: gpio-controller@0 {
aogpio: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -571,13 +571,13 @@ padctrl_aosys: pinctrl@fffff4a000 {
thead,pad-group = <1>;
};
ao_gpio1: gpio@fffff52000 {
gpio@fffff52000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff52000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
portf: gpio-controller@0 {
gpio4: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;