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Merge tag 'uniphier-dt64-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt

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UniPhier ARM64 SoC DT updates for v5.3

- Migrate to the new binding for the Denali NAND controller

- Use reserved-memory node instead of /memreserve/ for the
  secure memory area

* tag 'uniphier-dt64-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: add reserved-memory for secure memory
  arm64: dts: uniphier: update to new Denali NAND binding

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2019-06-26 19:22:19 -07:00
parent 2bfd84b3a5 aa38571246
commit 3395a968e5
5 changed files with 47 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
View File

@@ -163,4 +163,8 @@ ethphy: ethphy@1 {
&nand {
status = "okay";
nand@0 {
reg = <0>;
};
};

15
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
View File

@@ -8,8 +8,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
/memreserve/ 0x80000000 0x02000000;
/ {
compatible = "socionext,uniphier-ld11";
#address-cells = <2>;
@@ -110,6 +108,17 @@ timer {
<1 10 4>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secure-memory@81000000 {
reg = <0x0 0x81000000 0x0 0x01000000>;
no-map;
};
};
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -617,6 +626,8 @@ nand: nand@68000000 {
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;

15
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
View File

@@ -9,8 +9,6 @@
#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/thermal/thermal.h>
/memreserve/ 0x80000000 0x02000000;
/ {
compatible = "socionext,uniphier-ld20";
#address-cells = <2>;
@@ -215,6 +213,17 @@ map0 {
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secure-memory@81000000 {
reg = <0x0 0x81000000 0x0 0x01000000>;
no-map;
};
};
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -921,6 +930,8 @@ nand: nand@68000000 {
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;

4
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
View File

@@ -115,4 +115,8 @@ &pcie {
&nand {
status = "okay";
nand@0 {
reg = <0>;
};
};

15
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
View File

@@ -8,8 +8,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
/memreserve/ 0x80000000 0x02000000;
/ {
compatible = "socionext,uniphier-pxs3";
#address-cells = <2>;
@@ -138,6 +136,17 @@ timer {
<1 10 4>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secure-memory@81000000 {
reg = <0x0 0x81000000 0x0 0x01000000>;
no-map;
};
};
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -779,6 +788,8 @@ nand: nand@68000000 {
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;