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mips: dts: realtek: Correct uart interrupt-parent

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The uart interrupts on RTL838x chips do not lead to the CPU's interrupt
controller directly, but passes via the SoC interrupt controller. Update
the interrupt-parent property to fix this.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Sander Vanheule
2025-01-19 19:34:21 +01:00
committed by Thomas Bogendoerfer
parent 8e64481647
commit 31e96a0a98
1 changed files with 2 additions and 2 deletions
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4
arch/mips/boot/dts/realtek/rtl838x.dtsi
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@@ -46,7 +46,7 @@ uart0: serial@2000 {
clock-frequency = <200000000>;
interrupt-parent = <&cpuintc>;
interrupt-parent = <&intc>;
interrupts = <31>;
reg-io-width = <1>;
@@ -63,7 +63,7 @@ uart1: serial@2100 {
clock-frequency = <200000000>;
interrupt-parent = <&cpuintc>;
interrupt-parent = <&intc>;
interrupts = <30>;
reg-io-width = <1>;