wifi: iwlwifi: cfg: unify HR configs

Unify the HR configs to just one HR RF config. All the fields
were the same already, so this doesn't do anything.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Link: https://patch.msgid.link/20250509104454.2582160-5-miriam.rachel.korenblit@intel.com
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
This commit is contained in:
Johannes Berg
2025-05-09 13:44:43 +03:00
committed by Miri Korenblit
parent 5e3033970c
commit 2ffa48ab99
6 changed files with 124 additions and 134 deletions

View File

@@ -22,7 +22,7 @@ iwlwifi-$(CONFIG_IWLMVM) += cfg/9000.o cfg/22000.o
iwlwifi-$(CONFIG_IWLMVM) += cfg/ax210.o
iwlwifi-$(CONFIG_IWLMLD) += cfg/bz.o cfg/sc.o cfg/dr.o
# RF configurations
iwlwifi-$(CONFIG_IWLMVM) += cfg/rf-jf.o
iwlwifi-$(CONFIG_IWLMVM) += cfg/rf-jf.o cfg/rf-hr.o
iwlwifi-objs += iwl-dbg-tlv.o
iwlwifi-objs += iwl-trans.o

View File

@@ -15,9 +15,6 @@
/* Lowest firmware API version supported */
#define IWL_22000_UCODE_API_MIN 77
/* NVM versions */
#define IWL_22000_NVM_VERSION 0x0a1d
/* Memory offsets and lengths */
#define IWL_22000_SMEM_OFFSET 0x400000
#define IWL_22000_SMEM_LEN 0xD0000
@@ -87,19 +84,6 @@ static const struct iwl_family_base_params iwl_22000_base = {
.ucode_api_max = IWL_22000_UCODE_API_MAX,
};
#define IWL_DEVICE_22500 \
.led_mode = IWL_LED_RF_STATE, \
.non_shared_ant = ANT_B, \
.vht_mu_mimo_supported = true, \
.ht_params = { \
.stbc = true, \
.ldpc = true, \
.ht40_bands = BIT(NL80211_BAND_2GHZ) | \
BIT(NL80211_BAND_5GHZ), \
}, \
.nvm_ver = IWL_22000_NVM_VERSION, \
.nvm_type = IWL_NVM_EXT
const struct iwl_mac_cfg iwl_qu_mac_cfg = {
.mq_rx_supported = true,
.gen2 = true,
@@ -153,23 +137,6 @@ const char iwl_ax201_killer_1650s_name[] =
const char iwl_ax201_killer_1650i_name[] =
"Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)";
const struct iwl_cfg iwl_qu_hr1 = {
IWL_DEVICE_22500,
.tx_with_siso_diversity = true,
.num_rbds = IWL_NUM_RBDS_HE,
};
const struct iwl_cfg iwl_qu_hr = {
IWL_DEVICE_22500,
.num_rbds = IWL_NUM_RBDS_HE,
};
const struct iwl_cfg iwl_qu_hr_80mhz = {
IWL_DEVICE_22500,
.num_rbds = IWL_NUM_RBDS_HE,
.bw_limit = 80,
};
MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));

View File

@@ -175,17 +175,6 @@ const struct iwl_cfg iwl_cfg_ma = {
.num_rbds = IWL_NUM_RBDS_HE,
};
const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = {
IWL_DEVICE_AX210,
.num_rbds = IWL_NUM_RBDS_HE,
};
const struct iwl_cfg iwl_cfg_so_a0_hr_a0_80mhz = {
IWL_DEVICE_AX210,
.num_rbds = IWL_NUM_RBDS_HE,
.bw_limit = 80,
};
MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
IWL_FW_AND_PNVM(IWL_SO_A_GF_A_FW_PRE, IWL_AX210_UCODE_API_MAX);

View File

@@ -0,0 +1,37 @@
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
* Copyright (C) 2015-2017 Intel Deutschland GmbH
* Copyright (C) 2018-2025 Intel Corporation
*/
#include "iwl-config.h"
/* NVM versions */
#define IWL_HR_NVM_VERSION 0x0a1d
#define IWL_DEVICE_HR \
.led_mode = IWL_LED_RF_STATE, \
.non_shared_ant = ANT_B, \
.vht_mu_mimo_supported = true, \
.ht_params = { \
.stbc = true, \
.ldpc = true, \
.ht40_bands = BIT(NL80211_BAND_2GHZ) | \
BIT(NL80211_BAND_5GHZ), \
}, \
.num_rbds = IWL_NUM_RBDS_HE, \
.nvm_ver = IWL_HR_NVM_VERSION, \
.nvm_type = IWL_NVM_EXT
const struct iwl_cfg iwl_rf_hr1 = {
IWL_DEVICE_HR,
.tx_with_siso_diversity = true,
};
const struct iwl_cfg iwl_rf_hr = {
IWL_DEVICE_HR,
};
const struct iwl_cfg iwl_rf_hr_80mhz = {
IWL_DEVICE_HR,
.bw_limit = 80,
};

View File

@@ -686,14 +686,11 @@ extern const struct iwl_cfg iwl8260_cfg;
extern const struct iwl_cfg iwl8265_cfg;
extern const struct iwl_cfg iwl_rf_jf;
extern const struct iwl_cfg iwl_rf_jf_80mhz;
extern const struct iwl_cfg iwl_qu_hr1;
extern const struct iwl_cfg iwl_qu_hr;
extern const struct iwl_cfg iwl_qu_hr_80mhz;
extern const struct iwl_cfg iwl_rf_hr1;
extern const struct iwl_cfg iwl_rf_hr;
extern const struct iwl_cfg iwl_rf_hr_80mhz;
extern const struct iwl_cfg iwl_cfg_ma;
extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0;
extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0_80mhz;
#endif /* CONFIG_IWLMVM */
#if IS_ENABLED(CONFIG_IWLMLD)

View File

@@ -997,145 +997,145 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
DEVICE(0x7E40), SUBDEV(0x1692)),
/* AX200 */
IWL_DEV_INFO(iwl_qu_hr, iwl_ax200_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax200_name,
DEVICE(0x2723)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax200_killer_1650w_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax200_killer_1650w_name,
DEVICE(0x2723), SUBDEV(0x1653)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax200_killer_1650x_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax200_killer_1650x_name,
DEVICE(0x2723), SUBDEV(0x1654)),
/* Qu with Hr */
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x43F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x43F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x43F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x43F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650s_name,
DEVICE(0x43F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650i_name,
DEVICE(0x43F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x43F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x43F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0xA0F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0xA0F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0xA0F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0xA0F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0xA0F0), SUBDEV(0x0A10)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650s_name,
DEVICE(0xA0F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650i_name,
DEVICE(0xA0F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0xA0F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0xA0F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0xA0F0), SUBDEV(0x6074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x02F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x02F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x02F0), SUBDEV(0x6074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x02F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x02F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x02F0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650s_name,
DEVICE(0x02F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650i_name,
DEVICE(0x02F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x02F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x02F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x06F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x06F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x06F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x06F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x06F0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650s_name,
DEVICE(0x06F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650i_name,
DEVICE(0x06F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x06F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x06F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x34F0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x34F0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x34F0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x34F0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x34F0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650s_name,
DEVICE(0x34F0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650i_name,
DEVICE(0x34F0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x34F0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x34F0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x3DF0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x3DF0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x3DF0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x3DF0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x3DF0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650s_name,
DEVICE(0x3DF0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650i_name,
DEVICE(0x3DF0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x3DF0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x3DF0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x4DF0), SUBDEV(0x0070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x4DF0), SUBDEV(0x0074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x4DF0), SUBDEV(0x0078)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x4DF0), SUBDEV(0x007C)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x4DF0), SUBDEV(0x0310)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650s_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650s_name,
DEVICE(0x4DF0), SUBDEV(0x1651)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_killer_1650i_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650i_name,
DEVICE(0x4DF0), SUBDEV(0x1652)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x4DF0), SUBDEV(0x2074)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x4DF0), SUBDEV(0x4070)),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name,
DEVICE(0x4DF0), SUBDEV(0x6074)),
/* So with HR */
@@ -1357,25 +1357,25 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
/* Qu with Hr */
/* Qu B step */
IWL_DEV_INFO(iwl_qu_hr1, iwl_ax101_name, MAC_TYPE(QU),
IWL_DEV_INFO(iwl_rf_hr1, iwl_ax101_name, MAC_TYPE(QU),
MAC_STEP(B), RF_TYPE(HR1), NO_CDB),
IWL_DEV_INFO(iwl_qu_hr_80mhz, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(B),
IWL_DEV_INFO(iwl_rf_hr_80mhz, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(B),
RF_TYPE(HR2), BW_LIMITED, NO_CDB),
/* Qu C step */
IWL_DEV_INFO(iwl_qu_hr1, iwl_ax101_name, MAC_TYPE(QU),
IWL_DEV_INFO(iwl_rf_hr1, iwl_ax101_name, MAC_TYPE(QU),
MAC_STEP(C), RF_TYPE(HR1), NO_CDB),
IWL_DEV_INFO(iwl_qu_hr_80mhz, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(C),
IWL_DEV_INFO(iwl_rf_hr_80mhz, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(C),
RF_TYPE(HR2), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name, MAC_TYPE(QU), MAC_STEP(C),
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name, MAC_TYPE(QU), MAC_STEP(C),
RF_TYPE(HR2), BW_NOT_LIMITED, NO_CDB),
/* QuZ */
IWL_DEV_INFO(iwl_qu_hr1, iwl_ax101_name, MAC_TYPE(QUZ),
IWL_DEV_INFO(iwl_rf_hr1, iwl_ax101_name, MAC_TYPE(QUZ),
RF_TYPE(HR1), NO_CDB),
IWL_DEV_INFO(iwl_qu_hr_80mhz, iwl_ax203_name, MAC_TYPE(QUZ),
IWL_DEV_INFO(iwl_rf_hr_80mhz, iwl_ax203_name, MAC_TYPE(QUZ),
MAC_STEP(B), RF_TYPE(HR2), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name, MAC_TYPE(QUZ),
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name, MAC_TYPE(QUZ),
MAC_STEP(B), RF_TYPE(HR2), BW_NOT_LIMITED, NO_CDB),
/* Ma */
@@ -1386,22 +1386,22 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
NO_CDB),
/* So with Hr */
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0_80mhz, iwl_ax203_name, MAC_TYPE(SO),
IWL_DEV_INFO(iwl_rf_hr_80mhz, iwl_ax203_name, MAC_TYPE(SO),
RF_TYPE(HR2), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0_80mhz, iwl_ax101_name, MAC_TYPE(SO),
IWL_DEV_INFO(iwl_rf_hr_80mhz, iwl_ax101_name, MAC_TYPE(SO),
RF_TYPE(HR1), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax201_name, MAC_TYPE(SO),
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name, MAC_TYPE(SO),
RF_TYPE(HR2), BW_NOT_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax201_killer_1650i_name,
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_killer_1650i_name,
DEVICE(0x51f0), SUBDEV(0x1652),
MAC_TYPE(SO), RF_TYPE(HR2)),
/* So-F with Hr */
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0_80mhz, iwl_ax203_name, MAC_TYPE(SOF),
IWL_DEV_INFO(iwl_rf_hr_80mhz, iwl_ax203_name, MAC_TYPE(SOF),
RF_TYPE(HR2), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0_80mhz, iwl_ax101_name, MAC_TYPE(SOF),
IWL_DEV_INFO(iwl_rf_hr_80mhz, iwl_ax101_name, MAC_TYPE(SOF),
RF_TYPE(HR1), BW_LIMITED, NO_CDB),
IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax201_name, MAC_TYPE(SOF),
IWL_DEV_INFO(iwl_rf_hr, iwl_ax201_name, MAC_TYPE(SOF),
RF_TYPE(HR2), BW_NOT_LIMITED, NO_CDB),
/* So-F with Gf */