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soundwire: registers: add definitions for clearable interrupt fields

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DP0 has reserved fields and the read-only SDCA_CASCADE bit. We should
not try to write values in these fields, so add a formal definition
for clearable interrupts to be used in DP0 interrupt handling.

DPN also has reserved fields so add definitions for clearable
interrupts as well.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20201124013318.8963-4-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Pierre-Louis Bossart
2020-11-24 09:33:16 +08:00
committed by Vinod Koul
parent 7ffaba042e
commit 2fb9478495
1 changed files with 11 additions and 0 deletions
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11
include/linux/soundwire/sdw_registers.h
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@@ -41,6 +41,12 @@
#define SDW_DP0_INT_IMPDEF1 BIT(5)
#define SDW_DP0_INT_IMPDEF2 BIT(6)
#define SDW_DP0_INT_IMPDEF3 BIT(7)
#define SDW_DP0_INTERRUPTS (SDW_DP0_INT_TEST_FAIL | \
SDW_DP0_INT_PORT_READY | \
SDW_DP0_INT_BRA_FAILURE | \
SDW_DP0_INT_IMPDEF1 | \
SDW_DP0_INT_IMPDEF2 | \
SDW_DP0_INT_IMPDEF3)
#define SDW_DP0_PORTCTRL_DATAMODE GENMASK(3, 2)
#define SDW_DP0_PORTCTRL_NXTINVBANK BIT(4)
@@ -241,6 +247,11 @@
#define SDW_DPN_INT_IMPDEF1 BIT(5)
#define SDW_DPN_INT_IMPDEF2 BIT(6)
#define SDW_DPN_INT_IMPDEF3 BIT(7)
#define SDW_DPN_INTERRUPTS (SDW_DPN_INT_TEST_FAIL | \
SDW_DPN_INT_PORT_READY | \
SDW_DPN_INT_IMPDEF1 | \
SDW_DPN_INT_IMPDEF2 | \
SDW_DPN_INT_IMPDEF3)
#define SDW_DPN_PORTCTRL_FLOWMODE GENMASK(1, 0)
#define SDW_DPN_PORTCTRL_DATAMODE GENMASK(3, 2)