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clk: spacemit: k3: Fix PCIe clock register offset

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The offset of PCIe Clock CTRL register for port B and C controller was
wrongly swapped, correct it here.

Fixes: 091d19cc24 ("clk: spacemit: k3: extract common header")
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260511-06-pci-clk-fix-v2-2-c9a5e563bab3@kernel.org
Signed-off-by: Yixun Lan <dlan@kernel.org>
This commit is contained in:
Yixun Lan
2026-05-11 02:59:10 +00:00
parent d8a4cef90b
commit 2f20c859a8
1 changed files with 2 additions and 2 deletions
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4
include/soc/spacemit/k3-syscon.h
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@@ -168,8 +168,8 @@
#define APMU_CPU_C2_CLK_CTRL 0x394
#define APMU_CPU_C3_CLK_CTRL 0x208
#define APMU_PCIE_CLK_RES_CTRL_A 0x1f0
#define APMU_PCIE_CLK_RES_CTRL_B 0x1c8
#define APMU_PCIE_CLK_RES_CTRL_C 0x1d0
#define APMU_PCIE_CLK_RES_CTRL_B 0x1d0
#define APMU_PCIE_CLK_RES_CTRL_C 0x1c8
#define APMU_PCIE_CLK_RES_CTRL_D 0x1e0
#define APMU_PCIE_CLK_RES_CTRL_E 0x1e8
#define APMU_EMAC0_CLK_RES_CTRL 0x3e4